IRF6691PbF IRF6691TRPbF

Transcription

1 Typical R S(on) (mω) V GS, Gate-to-Source Voltage (V) l RoHs Compliant l Lead-Free (Qualified up to 260 C Reflow) l pplication Specific MOSFETs l Ideal for CPU Core C-C Converters l Low Conduction Losses l High Cdv/dt Immunity l Low Profile (<0.7mm) l ual Sided Cooling Compatible l Compatible with existing Surface Mount Techniques PROVISIONL irectfet Power MOSFET Typical values (unless otherwise specified) P IRF669PbF IRF669TRPbF V SS V GS R S(on) R S(on) 20V max ±2V max.2mω@ 0V.8mΩ@ 4.5V Q g tot Q gd Q gs2 Q rr Q oss V gs(th) 47nC 5nC 4.4nC 26nC 30nC 2.0V pplicable irectfet Outline and Substrate Outline (see p.7,8 for details) SQ SX ST MQ MX MT escription The IRF669PbF combines the latest HEXFET Power MOSFET Silicon technology with the advanced irectfet TM packaging to achieve the lowest on-state resistance in a package that has the footprint of a SO-8 and only 0.7 mm profile. The irectfet package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques. pplication note N-035 is followed regarding the manufacturing methods and processes. The irectfet package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%. The IRF669PbF balances industry leading on-state resistance while minimizing gate charge along with ultra low package inductance to reduce both conduction and switching losses. This part contains an integrated Schottky diode to reduce the Qrr of the body drain diode further reducing the losses in a Synchronous Buck circuit. The reduced losses make this product ideal for high frequency/high efficiency C-C converters that power high current loads such as the latest generation of microprocessors. The IRF669PbF has been optimized for parameters that are critical in synchronous buck converter s SyncFET sockets. bsolute Maximum Ratings T J = 25 C Parameter T J = 25 C I = V GS, Gate -to -Source Voltage (V) Fig. Typical On-Resistance vs. Gate-to-Source Voltage Notes: Click on this section to link to the appropriate technical paper. Click on this section to link to the irectfet Website. ƒ Surface mounted on in. square Cu board, steady state. irectfet ISOMETRIC V S rain-to-source Voltage 20 V V GS Gate-to-Source Voltage ±2 T = 25 C Continuous rain Current, V 0V e 32 T = 70 C Continuous rain Current, 0V e 26 T C = 25 C Continuous rain Current, V 0V f 80 j I M Pulsed rain Current g 260 E S Single Pulse valanche Energyh 230 mj I R valanche Currentg Q G Total Gate Charge (nc) Fig 2. Total Gate Charge vs. Gate-to-Source Voltage T C measured with thermocouple mounted to top (rain) of part. Repetitive rating; pulse width limited by max. junction temperature. Starting T J = 25 C, L = 0.72mH, R G = 25Ω, I S = I = 7 MT Max. V S = 6V V S = 0V Units 05/8/06

2 IRF669PbF PROVISIONL T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units BV SS rain-to-source Breakdown Voltage 20 V ΒV SS / T J Breakdown Voltage Temp. Coefficient 2 mv/ C R S(on) Static rain-to-source On-Resistance mω.2.8 V GS(th) Gate Threshold Voltage V V GS(th) / T J Gate Threshold Voltage Coefficient -4. mv/ C.4 m I SS rain-to-source Leakage Current 500 µ 5 m I GSS Gate-to-Source Forward Leakage 00 n Gate-to-Source Reverse Leakage -00 gfs Forward Transconductance 0 S Q g Total Gate Charge 47 7 Q gs Pre-Vth Gate-to-Source Charge 4 Q gs2 Post-Vth Gate-to-Source Charge 4.4 nc Q gd Gate-to-rain Charge 5 V S = 0V V GS = 4.5V I = 7 Q godr Gate Charge Overdrive 4 See Fig. 4 Q sw Switch Charge (Q gs2 Q gd ) 9 Q oss Output Charge 30 nc V S = 0V, V GS = 0V R G Gate Resistance Ω t d(on) Turn-On elay Time 23 V = 6V, V GS = 4.5Vi t r Rise Time 95 ns I = 26 t d(off) Turn-Off elay Time 25 Clamped Inductive Load t f Fall Time 0 See Fig. 5 & 6 C iss Input Capacitance 6580 V GS = 0V C oss Output Capacitance 2070 pf V S = 0V C rss Reverse Transfer Capacitance 840 ƒ =.0MHz iode Characteristics Parameter Min. Typ. Max. Units I S Continuous Source Current 200j (Body iode) I SM Pulsed Source Current 260 (Body iode)c V S iode Forward Voltage 0.65 V t rr Reverse Recovery Time ns Q rr Reverse Recovery Charge nc Conditions V GS = 0V, I =.0m Reference to 25 C, I = 0m V GS = 4.5V, I = 2 i V GS = 0V, I = 5 i V S = V GS, I = 250µ I = 0m, reference to 25 C V S = 20V, V GS = 0V V S = 6V, V GS = 0V V S = 6V, V GS = 0V, T J = 25 C V GS = 2V V GS = -2V V S = 0V, I = 26 Conditions MOSFET symbol showing the integral reverse p-n junction diode. T J = 25 C, I S = 25, V GS = 0V i T J = 25 C, I F = 25 di/dt = 00/µs isee Fig. 7 Notes: Repetitive rating; pulse width limited by max. junction temperature. Pulse width 400µs; duty cycle 2%. ˆ Calculated continuous current based on maximum allowable junction temperature. Package limitation current is

3 PROVISIONL IRF669PbF bsolute Maximum Ratings = 25 C Power issipation e 2.8 = 70 C Power issipation e.8 C = 25 C Power issipation f 89 W T P Peak Soldering Temperature 270 C T J Operating Junction and -40 to 50 T STG Storage Temperature Range Thermal Resistance Parameter Typ. Max. Units R θj Junction-to-mbient em 45 R θj Junction-to-mbient km 2.5 R θj Junction-to-mbient lm 20 C/W R θjc Junction-to-Case fm.4 R θj-pcb Junction-to-PCB Mounted.0 Linear erating Factor e W/ C 00 0 = Thermal Response ( Z thj ) 0. R R R 2 R 2 R 3 R 3 τ J τ J τ τ τ τ τ 2 τ 0.0 τ 3 τ 4 2 τ 3 τ Ci= τi/ri SINGLE PULSE Ci= τi/ri ( THERML RESPONSE ) Notes:. uty Factor = t/t2 2. Peak Tj = P dm x Zthja Tc E-006 E t, Rectangular Pulse uration (sec) R 4 R 4 Ri ( C/W) τi (sec) Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-mbient Notes: Used double sided cooling, mounting pad. Š Mounted on minimum footprint full size board with metalized back and with small clip heatsink. R θ is measured at T J of approximately 90 C. ƒ Surface mounted on in. square Cu Mounted to a PCB with Š Mounted on minimum (still air). small clip heatsink (still air) footprint full size board with metalized back and with small clip heatsink (still air) 3

4 C, Capacitance(pF) I, rain-to-source Current (Α) R S(on), rain-to-source On Resistance (Normalized) I, rain-to-source Current () I, rain-to-source Current () IRF669PbF PROVISIONL VGS TOP 0V 7.0V 4.5V 4.0V 3.5V 3.2V 2.9V BOTTOM 2.7V VGS TOP 0V 7.0V 4.5V 4.0V 3.5V 3.2V 2.9V BOTTOM 2.7V 0 2.7V 2.7V 0 60µs PULSE WITH Tj = 25 C V S, rain-to-source Voltage (V) Fig 4. Typical Output Characteristics 60µs PULSE WITH Tj = 50 C V S, rain-to-source Voltage (V) Fig 5. Typical Output Characteristics I = 32 V GS = 0V 00 0 T J = 50 C.0 T J = 25 C V S = 0V 60µs PULSE WITH V GS, Gate-to-Source Voltage (V) Fig 6. Typical Transfer Characteristics T J, Junction Temperature ( C) Fig 7. Normalized On-Resistance vs. Temperature V GS = 0V, f = MHZ C iss = C gs C gd, C ds SHORTE C rss = C gd C oss = C ds C gd 0000 C iss C oss 000 C rss V S, rain-to-source Voltage (V) Fig 8. Typical Capacitance vs.rain-to-source Voltage 4

5 E S, Single Pulse valanche Energy (mj) I, rain Current () V GS(th) Gate threshold Voltage (V) I S, Reverse rain Current () I, rain-to-source Current () PROVISIONL IRF669PbF OPERTION IN THIS RE LIMITE BY R S (on) 00 T J = 50 C 00 00µsec T J = 25 C 0 0 msec V GS = 0V V S, Source-to-rain Voltage (V) Fig 9. Typical Source-rain iode Forward Voltage 200 T = 25 C Tj = 50 C Single Pulse 0msec V S, rain-to-source Voltage (V) Fig0. Maximum Safe Operating rea I = 250µ T C, Case Temperature ( C) Fig. Maximum rain Current vs. Case Temperature T J, Temperature ( C ) Fig 2. Threshold Voltage vs. Temperature I TOP 2 5 BOTTOM Starting T J, Junction Temperature ( C) Fig 3. Maximum valanche Energy vs. rain Current 5

6 IRF669PbF PROVISIONL Current Regulator Same Type as.u.t. Vds Id 2V.2µF 50KΩ.3µF Vgs.U.T. V - S V GS Vgs(th) 3m I G I Current Sampling Resistors Qgs Qgs2 Qgd Qgodr Fig 4a. Gate Charge Test Circuit Fig 4b. Gate Charge Waveform V (BR)SS 5V tp V S L RIVER R G V GS 20V tp.u.t I S 0.0Ω - V I S Fig 5a. Unclamped Inductive Test Circuit Fig 5b. Unclamped Inductive Waveforms L V S V - V S 90%.U.T 0% V GS V GS Pulse Width < µs uty Factor < 0.% t d(on) t r t d(off) t f Fig 6a. Switching Time Test Circuit Fig 6b. Switching Time Waveforms 6

7 PROVISIONL IRF669PbF -.U.T ƒ - Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer - Reverse Recovery Current river Gate rive Period P.W..U.T. I S Waveform Body iode Forward Current di/dt.u.t. V S Waveform iode Recovery dv/dt = P.W. Period V GS =0V V * R G di/dt controlled by R G river same type as.u.t. I S controlled by uty Factor "".U.T. - evice Under Test V - Re-pplied Voltage Body iode Inductor Curent Current Forward rop Ripple 5% I S * V GS = 5V for Logic Level evices Fig 7. iode Reverse Recovery Test Circuit for N-Channel HEXFET Power MOSFETs irectfet Board Footprint, MT Outline ƒ (Medium Size Can, T-esignation). Please see irectfet application note N-035 for all details regarding the assembly of irectfet. This includes all recommendations for stencil and substrate designs. G = GTE = RIN S = SOURCE S G S 7

8 IRF669PbF PROVISIONL irectfet Outline imension, MT Outline (Medium Size Can, T-esignation). Please see irectfet application note N-035 for all details regarding the assembly of irectfet. This includes all recommendations for stencil and substrate designs. irectfet Part Marking COE B C E F G H J K L M R P IMENSIONS METRIC IMPERIL MX MX

9 PROVISIONL irectfet Tape & Reel imension (Showing component orientation). IRF669PbF NOTE: Controlling dimensions in mm Std reel quantity is 4800 parts. (ordered as IRF669TRPBF). For 000 parts on 7" reel, order IRF669TRPBF COE B C E F G H REEL IMENSIONS STNR OPTION (QTY 4800) TR OPTION (QTY 000) METRIC IMPERIL METRIC IMPERIL MX MX MX MX LOE TPE FEE IRECTION NOTE: CONTROLLING IMENSIONS IN MM IMENSIONS METRIC IMPERIL COE MX MX B C E F G H ata and specifications subject to change without notice. This product has been designed and qualified for the Consumer market. Qualification Standards can be found on IR s Web site. IR WORL HEQURTERS: 233 Kansas St., El Segundo, California 90245, US Tel: (30) TC Fax: (30) Visit us at for sales contact information.05/06 9

10 Note: For the most current drawings please refer to the IR website at: