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1 l dvanced Process Technology l Ultra Low On-Resistance l Isolated Package l High Voltage Isolation = 2.5KVRMS l Sink to Lead Creepage ist. = 4.8mm l Fully valanche Rated l Lead-Free escription Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. G P IRFI3205PbF HEXFET Power MOSFET S V SS = 55V R S(on) = 0.008Ω I = 64 The TO-220 Fullpak eliminates the need for additional insulating hardware in commercial-industrial applications. The moulding compound used provides a high isolation capability and a low thermal resistance between the tab and external heatsink. This isolation is equivalent to using TO-220 FULLPK a 0 micron mica barrier with standard TO-220 product. The Fullpak is mounted to a heatsink using a single clip or by a single screw fixing. bsolute Maximum Ratings Parameter Max. Units T C = 25 C Continuous rain Current, V V 64 T C = 0 C Continuous rain Current, V V 45 I M Pulsed rain Current 390 C = 25 C Power issipation 63 W Linear erating Factor 0.42 W/ C V GS Gate-to-Source Voltage ± 20 V E S Single Pulse valanche Energy 480 mj I R valanche Current 59 E R Repetitive valanche Energy 6.3 mj dv/dt Peak iode Recovery dv/dt ƒ 5.0 V/ns T J Operating Junction and -55 to 175 T STG Storage Temperature Range C Soldering Temperature, for seconds 300 (1.6mm from case ) Mounting torque, 6-32 or M3 srew lbf in (1.1N m) Thermal Resistance Parameter Typ. Max. Units R θjc Junction-to-Case 2.4 C/W R θj Junction-to-mbient 65 C/W 11/25/09

2 Electrical T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions V (BR)SS rain-to-source Breakdown Voltage 55 V V GS = 0V, I = 250µ V (BR)SS/ T J Breakdown Voltage Temp. Coefficient V/ C Reference to 25 C, I = 1m R S(on) Static rain-to-source On-Resistance Ω V GS = V, I = 34 V GS(th) Gate Threshold Voltage V V S = V GS, I = 250µ g fs Forward Transconductance 42 S V S = 25V, I = 59 I SS rain-to-source Leakage Current 25 V µ S = 55V, V GS = 0V 250 V S = 44V, V GS = 0V, T J = 150 C I GSS Gate-to-Source Forward Leakage 0 V GS = 20V n Gate-to-Source Reverse Leakage -0 V GS = -20V Q g Total Gate Charge 170 I = 59 Q gs Gate-to-Source Charge 32 nc V S = 44V Q gd Gate-to-rain ("Miller") Charge 74 V GS = V, See Fig. 6 and 13 t d(on) Turn-On elay Time 14 V = 28V t r Rise Time 0 I = 59 ns t d(off) Turn-Off elay Time 43 R G = 2.5Ω t f Fall Time 70 R = 0.39Ω, See Fig. Between lead, L Internal rain Inductance 4.5 6mm (0.25in.) nh G from package L S Internal Source Inductance 7.5 and center of die contact C iss Input Capacitance 4000 V GS = 0V C oss Output Capacitance 1300 pf V S = 25V C rss Reverse Transfer Capacitance 480 ƒ = 1.0MHz, See Fig. 5 C rain to Sink Capacitance 12 ƒ = 1.0MHz S Source-rain Ratings and Characteristics Parameter Min. Typ. Max. Units Conditions I S Continuous Source Current MOSFET symbol 64 (Body iode) showing the I SM Pulsed Source Current integral reverse G 390 (Body iode) p-n junction diode. S V S iode Forward Voltage 1.3 V T J = 25 C, I S = 34, V GS = 0V t rr Reverse Recovery Time ns T J = 25 C, I F = 59 Q rr Reverse Recovery Charge nc di/dt = 0/µs t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by L S L ) Notes: Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) V = 25V, starting T J = 25 C, L = 190µH R G = 25Ω, I S = 59. (See Figure 12) ƒ I S 59, di/dt 290/µs, V V (BR)SS, T J 175 C Pulse width 300µs; duty cycle 2%. t=60s, ƒ=60hz Uses IRF3205 data and test conditions

3 I, rain-to-source Current () 00 0 VGS TOP 15V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 4.5V 20µs PULSE WITH TC J = 25 C V S, rain-to-source Voltage (V) I, rain-to-source Current () 00 0 VGS TOP 15V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 4.5V 20µs PULSE WITH TC J = 175 C V S, rain-to-source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics I, rain-to-source Current () 00 0 T = 25 C J T = 175 C J V S= 25V 20µs PULSE WITH V GS, Gate-to-Source Voltage (V) R S(on), rain-to-source On Resistance (Normalized) I = 98 V GS = V T J, Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature

4 C, Capacitance (pf) V GS = 0V, f = 1MHz C iss = C gs C gd, C ds SHORTE C rss = Cgd C oss = C ds Cgd C iss C oss C rss V S, rain-to-source Voltage (V) V, Gate-to-Source Voltage (V) GS I = 59 V S = 44V V S = 28V V S = 11V FOR TEST CIRCUIT SEE FIGURE Q, Total Gate Charge (nc) G Fig 5. Typical Capacitance Vs. rain-to-source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage I S, Reverse rain Current () 00 0 T = 175 C J T = 25 C J I, rain Current () 00 0 OPERTION IN THIS RE LIMITE BY RS(on) µs 0µs 1ms ms V GS = 0V V S, Source-to-rain Voltage (V) Fig 7. Typical Source-rain iode Forward Voltage T C = 25 C T J = 175 C Single Pulse V S, rain-to-source Voltage (V) Fig 8. Maximum Safe Operating rea

5 70 V S R I, rain Current () R G V GS V Pulse Width 1 µs uty Factor 0.1 %.U.T. Fig a. Switching Time Test Circuit - V T C, Case Temperature ( C) Fig 9. Maximum rain Current Vs. Case Temperature V S 90% % V GS t d(on) t r t d(off) t f Fig b. Switching Time Waveforms Thermal Response (Z thjc ) = SINGLE PULSE Notes: (THERML RESPONSE) 1. uty factor = t 1 / t 2 2. Peak T J= P M x Z thjc TC t 1, Rectangular Pulse uration (sec) PM t1 t2 Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

6 L V S.U.T. R G V - V I S t p 0.01Ω Fig 12a. Unclamped Inductive Test Circuit V (BR)SS t p V V S E S, Single Pulse valanche Energy (mj) TOP BOTTOM V = 25V Starting T J, Junction Temperature ( C) Fig 12c. Maximum valanche Energy Vs. rain Current I I S Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as.u.t. 50KΩ Q G 12V.2µF.3µF V Q GS Q G.U.T. V - S V GS V G 3m Charge I G I Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit

7 Peak iode Recovery dv/dt Test Circuit.U.T ƒ - Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer - - R G dv/dt controlled by R G river same type as.u.t. I S controlled by uty Factor "".U.T. - evice Under Test - V river Gate rive Period P.W. = P.W. Period V GS =V *.U.T. I S Waveform Reverse Recovery Current Body iode Forward Current di/dt.u.t. V S Waveform iode Recovery dv/dt V Re-pplied Voltage Inductor Curent Body iode Forward rop Ripple 5% I S * V GS = 5V for Logic Level evices Fig 14. For N-Channel HEXFETS

8 TO-220 Full-Pak Package Outline imensions are shown in millimeters (inches) TO-220 Full-Pak Part Marking Information (;$03/( 7,6,6$1,5),* :,7$66(0%/< /27&2'( $66(0%/('21::,17($66(0%/</,1(.,17(51$7,21$/ 5(&7,),(5 /2*2,5),*. 3$57180%(5 '$7(&2'( 1RWH3LQVVHPEO\OLQHSRVLWLRQ LQGLFWHV/HG)UHH $66(0%/< /27&2'( <($5 :((. /,1(. Note: For the most current drawing please refer to IR website at ata and specifications subject to change without notice. IR WORL HEQURTERS: 233 Kansas St., El Segundo, California 90245, US Tel: (3) TC Fax: (3) Visit us at for sales contact information.11/2009

9 Mouser Electronics uthorized istributor Click to View Pricing, Inventory, elivery & Lifecycle Information: International Rectifier: IRFI3205PBF

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