IRLR8726PbF IRLU8726PbF

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1 Applications l High Frequency Synchronous Buck Converters for Computer Processor Power l High Frequency Isolated DC-DC Converters with Synchronous Rectification for Telecom and Industrial Use Benefits l Very Low R DS(on) at 4.5V V GS l Ultra-Low Gate Impedance l Fully Characterized Avalanche Voltage and Current l Lead-Free l RoHS compliant Absolute Maximum Ratings Parameter Notes through are on page 11 IRLR8726PbF IRLU8726PbF HEXFET Power MOSFET V DSS R DS(on) max Qg (typ.) 30V 5.8m:@V GS = V 15nC D-Pak IRLR8726PbF I-Pak IRLU8726PbF ORDERING INFORMATION: See detailed ordering and shipping information on the last page of this data sheet. 1 D S D G S D G G D S Gate Drain Source V DS Drain-to-Source Voltage 30 V V GS Gate-to-Source Voltage ± 20 I T C = 25 C Continuous Drain Current, V V 86f I T C = C Continuous Drain Current, V V 61f A I DM Pulsed Drain Current c 340 P C = 25 C Maximum Power Dissipation h 75 W P C = C Maximum Power Dissipation h 38 D Units Linear Derating Factor 0.5 W/ C T J Operating Junction and -55 to 175 C T STG Storage Temperature Range Soldering Temperature, for seconds 300 (1.6mm from case) Thermal Resistance Parameter Typ. Max. Units R θjc Junction-to-Case h 2.0 R θja Junction-to-Ambient (PCB Mount) gh 50 C/W R θja Junction-to-Ambient h 1 Max. PD A 11/23/09

2 T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions BV DSS Drain-to-Source Breakdown Voltage 30 V V GS = 0V, I D = 250µA ΒV DSS / T J Breakdown Voltage Temp. Coefficient 20 mv/ C Reference to 25 C, I D = 1mA R DS(on) Static Drain-to-Source On-Resistance mω V GS = V, I D = 25A e V GS = 4.5V, I D = 20A e V GS(th) Gate Threshold Voltage V V DS = V GS, I D = 50µA V GS(th) / T J Gate Threshold Voltage Coefficient -8.6 mv/ C I DSS Drain-to-Source Leakage Current 1.0 µa V DS = 24V, V GS = 0V 150 V DS = 24V, V GS = 0V, T J = 125 C I GSS Gate-to-Source Forward Leakage na V GS = 20V Gate-to-Source Reverse Leakage - V GS = -20V gfs Forward Transconductance 73 S V DS = 15V, I D = 20A Q g Total Gate Charge Q gs1 Pre-Vth Gate-to-Source Charge 3.7 V DS = 15V Q gs2 Post-Vth Gate-to-Source Charge 1.9 nc V GS = 4.5V Q gd Gate-to-Drain Charge 5.7 I D = 20A Q godr Gate Charge Overdrive 3.7 See Fig. 15 Q sw Switch Charge (Q gs2 Q gd ) 7.6 Q oss Output Charge nc V DS = 15V, V GS = 0V R G Gate Resistance Ω t d(on) Turn-On Delay Time 12 V DD = 15V, V GS = 4.5Ve t r Rise Time 49 I D = 20A t d(off) Turn-Off Delay Time 15 ns R G = 1.8Ω t f Fall Time 16 See Fig. 13 C iss Input Capacitance 2150 V GS = 0V C oss Output Capacitance 480 pf V DS = 15V C rss Reverse Transfer Capacitance 205 ƒ = 1.0MHz Avalanche Characteristics Parameter Typ. Max. Units E AS Single Pulse Avalanche Energyd 120 mj I AR Avalanche Currentc 20 A Diode Characteristics Parameter Min. Typ. Max. Units I S Continuous Source Current 86f (Body Diode) A I SM Pulsed Source Current 340 (Body Diode)c V SD Diode Forward Voltage 1.0 V t rr Reverse Recovery Time ns Q rr Reverse Recovery Charge nc Conditions MOSFET symbol showing the integral reverse p-n junction diode. T J = 25 C, I S = 20A, V GS = 0V e T J = 25 C, I F = 20A, V DD = 15V di/dt = 300A/µs e 2

3 I D, Drain-to-Source Current (A) R DS(on), Drain-to-Source On Resistance (Normalized) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) IRLR/U8726PbF 0 VGS TOP V 5.0V 4.5V 3.5V 3.3V 3.0V 2.7V BOTTOM 2.5V 0 VGS TOP V 5.0V 4.5V 3.5V 3.3V 3.0V 2.7V BOTTOM 2.5V V 60µs PULSE WIDTH Tj = 25 C V 60µs PULSE WIDTH Tj = 175 C V DS, Drain-to-Source Voltage (V) V DS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics I D = 25A V GS = V 1.5 T J = 175 C 1 T J = 25 C 1.0 V DS = 15V 60µs PULSE WIDTH V GS, Gate-to-Source Voltage (V) T J, Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance vs. Temperature 3

4 C, Capacitance (pf) I SD, Reverse Drain Current (A) I D, Drain-to-Source Current (A) V GS, Gate-to-Source Voltage (V) IRLR/U8726PbF 00 V GS = 0V, f = 1 MHZ C iss = C gs C gd, C ds SHORTED C rss = C gd C oss = C ds C gd 12 I D = 20A V DS = 24V V DS = 15V Ciss Coss 4 Crss 2 1 V DS, Drain-to-Source Voltage (V) Q G Total Gate Charge (nc) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage 0 T J = 175 C 00 0 OPERATION IN THIS AREA LIMITED BY R DS (on) T J = 25 C 1msec msec µsec 1 V GS = 0V V SD, Source-to-Drain Voltage (V) 1 T C = 25 C T J = 175 C Single Pulse V DS, Drain-toSource Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4

5 I D, Drain Current (A) V GS (th) Gate threshold Voltage (V) IRLR/U8726PbF 80 LIMITED BY PACKAGE I D = 500µA I D = 50µA I D = 25µA T C, Case Temperature ( C) T J, Temperature ( C ) Fig 9. Maximum Drain Current vs. Case Temperature Fig. Threshold Voltage vs. Temperature 1 D = 0.50 Thermal Response ( Z thjc ) SINGLE PULSE ( THERMAL RESPONSE ) 1E-006 1E t 1, Rectangular Pulse Duration (sec) Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc Tc Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case Ri ( C/W) τι (sec) τj τj τ1 τ1 Ci= τi/ri Ci i/ri R 1 R 2 R 3 R 1 R 2 R 3 τ 2 τ 3 τ 2 τ 3 R4 R4 τ4 τ4 τc τ

6 E AS, Single Pulse Avalanche Energy (mj) IRLR/U8726PbF I D TOP 5.6A 8.2A BOTTOM 20A Starting T J, Junction Temperature ( C) Fig 12a. Maximum Avalanche Energy Vs. Drain Current 15V tp V (BR)DSS V DS L DRIVER R G 20V V GS tp D.U.T IAS 0.01Ω - V DD A I AS Fig 12b. Unclamped Inductive Test Circuit Fig 12c. Unclamped Inductive Waveforms V DS R D V DS R G V GS D.U.T. - V DD 90% V GS Pulse Width 1 µs Duty Factor 0.1 % % V GS t d(on) t r t d(off) t f Fig 13a. Switching Time Test Circuit Fig 13b. Switching Time Waveforms 6

7 - R G D.U.T * ƒ - Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer - dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test V DD ** - Reverse Recovery Current Re-Applied Voltage Driver Gate Drive Period P.W. D.U.T. I SD Waveform Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt Inductor Curent Body Diode Forward Drop D = P.W. Period *** V GS =V V DD Ripple 5% I SD * Use P-Channel Driver for P-Channel Measurements ** Reverse Polarity for P-Channel *** V GS = 5V for Logic Level Devices Fig 14. Diode Reverse Recovery Test Circuit for HEXFET Power MOSFETs Id Vds Vgs 0 20K 1K DUT L VCC Vgs(th) Qgodr Qgd Qgs2 Qgs1 Fig 15. Gate Charge Test Circuit Fig 16. Gate Charge Waveform 7

8 D-Pak (TO-252AA) Package Outline Dimensions are shown in millimeters (inches) D-Pak (TO-252AA) Part Marking Information (;$03/( 7,6,6$1,5)5 :,7$66(0%/< $66(0%/('21::,17($66(0%/</,1($ 1RWH3LQDVVHPEO\OLQHSRVLWLRQ LQGLFDWHV/HDG)UHH,17(51$7,21$/ 5(&7,),(5 /2*2 $66(0%/<,5)5 $ 3$57180%(5 '$7(&2'( <($5 :((. /,1($ 3LQDVVHPEO\OLQHSRVLWLRQLQGLFDWHV /HDG)UHHTXDOLILFDWLRQWRWKHFRQVXPHUOHYHO 25,17(51$7,21$/ 5(&7,),(5 /2*2 $66(0%/<,5)5 3$57180%(5 '$7(&2'( 3 '(6,*1$7(6/($')5(( 352'8&7237,21$/ 3 '(6,*1$7(6/($')5(( 352'8&748$/,),('727( &21680(5/(9(/237,21$/ <($5 :((. $ $66(0%/<6,7(&2'( Note: For the most current drawing please refer to IR website at 8

9 I-Pak (TO-251AA) Package Outline Dimensions are shown in millimeters (inches) I-Pak (TO-251AA) Part Marking Information (;$03/( 7,6,6$1,5)8 :,7$66(0%/< $66(0%/('21::,17($66(0%/</,1($ 1RWH3LQDVVHPEO\OLQHSRVLWLRQ LQGLFDWHV/HDG)UHH,17(51$7,21$/ 5(&7,),(5 /2*2 $66(0%/<,5)8 $ 3$57180%(5 '$7(&2'( <($5 :((. /,1($ 25,17(51$7,21$/ 5(&7,),(5 /2*2 $66(0%/<,5)8 3$57180%(5 '$7(&2'( 3 '(6,*1$7(6/($')5(( 352'8&7237,21$/ <($5 :((. $ $66(0%/<6,7(&2'( Note: For the most current drawing please refer to IR website at 9

10 D-Pak (TO-252AA) Tape & Reel Information Dimensions are shown in millimeters (inches) TR TRR TRL 16.3 (.641 ) 15.7 (.619 ) 16.3 (.641 ) 15.7 (.619 ) 12.1 (.476 ) 11.9 (.469 ) FEED DIRECTION 8.1 (.318 ) 7.9 (.312 ) FEED DIRECTION NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA INCH NOTES : 1. OUTLINE CONFORMS TO EIA mm Note: For the most current drawing please refer to IR website at

11 Orderable part number Package Type Standard Pack Form Quantity IRLR8726PBF D-PAK Tube/Bulk 75 IRLR8726TRPBF D-PAK Tape and Reel 2000 Note IRLU8726PBF I-PAK Tube/Bulk 75 Qualification information D-PAK Qualification level Consumer Moisture Sensitivity Level RoHS compliant MS L1 (per JEDEC J-S T D-020D ) Yes I-PAK Qualification level Moisture Sensitivity Level RoHS compliant Industrial Not applicable Yes Qualification standards can be found at International Rectifier s web site Higher qualification ratings may be available should the user have such requirements. Please contact your International Rectifier sales representative for further information: Notes: Repetitive rating; pulse width limited by max. junction temperature. Starting T J = 25 C, L = 0.605mH, R G = 25Ω, I AS = 20A. ƒ Pulse width 400µs; duty cycle 2%. Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 50A. When mounted on 1" square PCB (FR-4 or G- Material).For recommended footprint and soldering techniques refer to application note #AN-994. R θ is measured at T J approximately at 90 C Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (3) TAC Fax: (3) Visit us at for sales contact information.11/

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