IRF6646 DirectFET Power MOSFET

Transcription

1 Typical R DS(on) (Ω) V GS, Gate-to-Source Voltage (V) l RoHS compliant containing no lead or bromide l Low Profile (<0.7 mm) l Dual Sided Cooling Compatible l Ultra Low Package Inductance l Optimized for High Frequency Switching l Ideal for High Performance Isolated Converter Primary Switch Socket l Optimized for Synchronous Rectification l Low Conduction Losses l Compatible with existing Surface Mount Techniques PD E IRF6646 DirectFET Power MOSFET Typical values (unless otherwise specified) V DSS V GS R DS(on) 80V max ±20V max 7.6mΩ@ V Q g tot Q gd V gs(th) 36nC 2nC 3.8V MN DirectFET ISOMETRIC Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details) SQ SX ST MQ MX MT MN Description The IRF6646 combines the latest HEXFET Power MOSFET Silicon technology with the advanced DirectFET TM packaging to achieve the lowest on-state resistance in a package that has the footprint of an SO-8 and only 0.7 mm profile. The DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques, when application note AN-35 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%. The IRF6646 is optimized for primary side bridge topologies in isolated DC-DC applications, for 48V(±%) or 36V to 60V ETSI input voltage range systems, and is also ideal for secondary side synchronous rectification in regulated isolated DC-DC topologies. The reduced total losses in the device coupled with the high level of thermal performance enables high efficiency and low temperatures, which are key for system reliability improvements, and makes this device ideal for high performance isolated DC-DC converters. Absolute Maximum Ratings Parameter Max. Units V DS Drain-to-Source Voltage 80 V V GS Gate-to-Source Voltage ±20 I T A = 25 C Continuous Drain Current, V V e 2 I T A = 70 C Continuous Drain Current, V V e 9.6 A I T C = 25 C Continuous Drain Current, V V f 68 I DM Pulsed Drain Current g 96 E AS Single Pulse Avalanche Energy h 230 mj I AR Avalanche Currentg 7.2 A T J = 25 C T J = 25 C I D = 7.2A Q V GS, Gate -to -Source Voltage (V) G Total Gate Charge (nc) Fig 2. Typical Total Gate Charge vs. Gate-to-Source Fig. Typical On-Resistance vs. Gate Voltage Voltage Notes: Click on this section to link to the appropriate technical paper. T C measured with thermocouple mounted to top (Drain) of part. Click on this section to link to the DirectFET Website. Repetitive rating; pulse width limited by max. junction temperature. ƒ Surface mounted on in. square Cu board, steady state. Starting T J = 25 C, L = 8.8mH, R G = 25Ω, I AS = 7.2A I D = 7.2A V DS = 40V V DS = 6V /04/05

2 IRF6646 T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units BV DSS Drain-to-Source Breakdown Voltage 80 V Conditions V GS = 0V, I D = 250µA ΒV DSS / T J Breakdown Voltage Temp. Coefficient 0. V/ C Reference to 25 C, I D = ma R DS(on) Static Drain-to-Source On-Resistance mω V GS = V, I D = 2A c V GS(th) Gate Threshold Voltage V V DS = V GS, I D = 50µA V GS(th) / T J Gate Threshold Voltage Coefficient - mv/ C I DSS Drain-to-Source Leakage Current 20 µa V DS = 80V, V GS = 0V 250 V DS = 64V, V GS = 0V, T J = 25 C I GSS Gate-to-Source Forward Leakage 0 na V GS = 20V Gate-to-Source Reverse Leakage -0 V GS = -20V gfs Forward Transconductance 7 S V DS = V, I D = 7.2A Q g Total Gate Charge Q gs Pre-Vth Gate-to-Source Charge 7.6 V DS = 40V Q gs2 Post-Vth Gate-to-Source Charge 2.0 nc V GS = V Q gd Gate-to-Drain Charge 2 I D = 7.2A Q godr Gate Charge Overdrive 4 See Fig. 7 Q sw Switch Charge (Q gs2 Q gd ) 4 Q oss Output Charge 8 nc V DS = 6V, V GS = 0V R G Gate Resistance.0 Ω t d(on) Turn-On Delay Time 7 V DD = 40V, V GS = Vc t r Rise Time 20 I D = 7.2A t d(off) Turn-Off Delay Time 3 ns R G =6.2Ω t f Fall Time 2 C iss Input Capacitance 2060 V GS = 0V C oss Output Capacitance 480 pf V DS = 25V C rss Reverse Transfer Capacitance 20 ƒ =.0MHz C oss Output Capacitance 280 V GS = 0V, V DS =.0V, f=.0mhz C oss Output Capacitance 3 V GS = 0V, V DS = 64V, f=.0mhz Diode Characteristics Parameter Min. Typ. Max. Units Conditions I S Continuous Source Current 2.5e MOSFET symbol (Body Diode) A showing the I SM Pulsed Source Current 96 integral reverse (Body Diode)d p-n junction diode. V SD Diode Forward Voltage.3 V T J = 25 C, I S = 7.2A, V GS = 0V c t rr Reverse Recovery Time ns T J = 25 C, I F = 7.2A, V DD = 40V Q rr Reverse Recovery Charge nc di/dt = 0A/µs c Notes: Pulse width 400µs; duty cycle 2%. Repetitive rating; pulse width limited by max. junction temperature. ƒ Thermally limited and used R θja to calculate. 2

3 Absolute Maximum Ratings IRF6646 Parameter Max. Units P A = 25 C Power Dissipation c 2.8 W P A = 70 C Power Dissipation c.8 P C = 25 C Power Dissipation f 89 T P Peak Soldering Temperature 270 C T J Operating Junction and -40 to 50 Storage Temperature Range T STG Thermal Resistance Parameter Typ. Max. Units R θja Junction-to-Ambient cg 45 R θja Junction-to-Ambient dg 2.5 R θja Junction-to-Ambient eg 20 C/W R θjc Junction-to-Case fg.4 R θj-pcb Junction-to-PCB Mounted.0 0 Thermal Response ( Z thja ) D = E-006 E Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient Notes: Surface mounted on in. square Cu board, steady state. Used double sided cooling, mounting pad. ƒ Mounted on minimum footprint full size board with metalized back and with small clip heatsink. R R R 2 R 2 R 3 R 3 τ J τ J τ τ τ 2 τ 2 τ 3 τ 3 Ci= τi/ri Ci= τi/ri SINGLE PULSE ( THERMAL RESPONSE ) Notes:. Duty Factor D = t/t2 2. Peak Tj = P dm x Zthja Tc t, Rectangular Pulse Duration (sec) R 4 R 4 τ 4 τ 4 τ A τ Ri ( C/W) τi (sec) T C measured with thermocouple incontact with top (Drain) of part. R θ is measured at T J of approximately 90 C. Surface mounted on in. square Cu ƒ Mounted to a PCB with ƒ Mounted on minimum board (still air). small clip heatsink (still air) footprint full size board with metalized back and with small clip heatsink (still air) 3

4 C, Capacitance(pF) Typical R DS (on) ( Ω) I D, Drain-to-Source Current (Α) Typical R DS(on) (Normalized) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) IRF VGS TOP 5V V 8.0V 7.0V BOTTOM 6.0V 0 6.0V VGS TOP 5V V 8.0V 7.0V BOTTOM 6.0V 6.0V 60µs PULSE WIDTH Tj = 25 C 0. 0 V DS, Drain-to-Source Voltage (V) Fig 4. Typical Output Characteristics 60µs PULSE WIDTH Tj = 50 C 0. 0 V DS, Drain-to-Source Voltage (V) Fig 5. Typical Output Characteristics 00 V DS = V 60µs PULSE WIDTH 2.0 I D = 2A V GS = V 0.5 T J = 50 C T J = 25 C T J = -40 C V GS, Gate-to-Source Voltage (V) Fig 6. Typical Transfer Characteristics T J, Junction Temperature ( C) Fig 7. Normalized On-Resistance vs. Temperature V GS = 0V, f = MHZ C iss = C gs C gd, C ds SHORTED C rss = C gd C oss = C ds C gd C iss C oss T J = 25 C Vgs = 7.0V Vgs = 8.0V Vgs = V Vgs = 5V 5 C rss V DS, Drain-to-Source Voltage (V) Fig 8. Typical Capacitance vs.drain-to-source Voltage I D, Drain Current (A) Fig 9. Typical On-Resistance vs. Drain Current 4

5 E AS, Single Pulse Avalanche Energy (mj) I D, Drain Current (A) Typical V GS(th) Gate threshold Voltage (V) I SD, Reverse Drain Current (A) I D, Drain-to-Source Current (A) OPERATION IN THIS AREA LIMITED BY R DS (on) IRF6646 0µsec T J = 50 C T J = 25 C T J = -40 C V GS = 0V V SD, Source-to-Drain Voltage (V) Fig. Typical Source-Drain Diode Forward Voltage 0. T A = 25 C T J = 50 C msec msec Single Pulse V DS, Drain-to-Source Voltage (V) Fig. Maximum Safe Operating Area I D = 50µA I D = 250µA I D =.0mA I D =.0A T A, Ambient Temperature ( C) Fig 2. Maximum Drain Current vs. Ambient Temperature I D TOP 3.3A 4.0A BOTTOM 7.2A T J, Temperature ( C ) Fig 3. Typical Threshold Voltage vs. Junction Temperature Starting T J, Junction Temperature ( C) Fig 4. Maximum Avalanche Energy vs. Drain Current 5

6 IRF6646 Current Regulator Same Type as D.U.T. Vds Id 2V.2µF 50KΩ.3µF Vgs D.U.T. V - DS V GS Vgs(th) 3mA I G I D Current Sampling Resistors Qgs Qgs2 Qgd Qgodr Fig 5a. Gate Charge Test Circuit Fig 5b. Gate Charge Waveform V (BR)DSS 5V tp V DS L DRIVER R G 20V V GS tp D.U.T I AS 0.0Ω - V DD A I AS Fig 6a. Unclamped Inductive Test Circuit Fig 6b. Unclamped Inductive Waveforms V DS R D V DS 90% V GS D.U.T. R G - V DD % V GS V Pulse Width µs t d(on) t r t d(off) t f Duty Factor 0. % Fig 7a. Switching Time Test Circuit Fig 7b. Switching Time Waveforms 6

7 IRF D.U.T ƒ - Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer - Reverse Recovery Current Driver Gate Drive Period P.W. D.U.T. I SD Waveform Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt D = P.W. Period V GS =V V DD * R G di/dt controlled by R G Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test V DD - Re-Applied Voltage Body Diode Inductor Curent Current Forward Drop Ripple 5% I SD * V GS = 5V for Logic Level Devices Fig 8. Diode Reverse Recovery Test Circuit for N-Channel HEXFET Power MOSFETs DirectFET Substrate and PCB Layout, MN Outline (Medium Size Can, N-Designation). Please see DirectFET application note AN-35 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs. 7

8 IRF6646 DirectFET Outline Dimension, MN Outline (Medium Size Can, N-Designation). Please see DirectFET application note AN-35 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs. 06'%64..0) &/'055#4'0// %&' Ã# Ã$ Ã% Ã& Ã' Ã( Ã) Ã* Ã, Ã- Ã. Ã/ Ã0 Ã2 &/'055 /'64% /0 /#: /2'4#. Ã/0 Ã/#: DirectFET Part Marking 8

9 DirectFET Tape & Reel Dimension (Showing component orientation). IRF6646 NOTE: Controlling dimensions in mm Std reel quantity is 4800 parts. (ordered as IRF6646). For 00 parts on 7" reel, order IRF6646TR REEL DIMENSIONS STANDARD OPTION (QTY 4800) TR OPTION (QTY 00) METRIC IMPERIAL METRIC IMPERIAL CODE A B C D E F G H MIN MAX MIN MAX MIN MAX MIN MAX Data and specifications subject to change without notice. This product has been designed and qualified for the Consumer market. Qualification Standards can be found on IR s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (3) TAC Fax: (3) Visit us at for sales contact information./05 9

10 Note: For the most current drawings please refer to the IR website at: