Building Blocks of Integrated-Circuit Amplifiers

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1 Building Blocks of ntegrated-circuit Amplifiers 1

2 The Basic Gain Cell CS and CE Amplifiers with Current Source Loads Current-source- or active-loaded CS amplifier Rin A o R A o g r r o g r 0 m o m o Current-source- or active-loaded CE amplifier Rin r A o g r m o R o A r o g r 0 m o

3 The Basic Gain Cell ntrinsic Gain The max. gain obtainable in a CS or CE amplifier For the BJT C, VA gm ro V A 0 For the MOSFET T g r m o V V A T C (00V/V~5000V/V) D g C W / L V / m n ox D OV r o V A D V' A D L V V' V' C A A A n ox A0 V OV / V OV D L WL (0V/V~40V/V) 3

4 The Basic Gain Cell EX μm technology NMOS with L=0.4μm, W=4μm, k n =67μA/V, and V A =10V/μm. BJT with β=100 and V A =10V. Assume D = C = 100μA. Compare NMOS with BJT. Neglecting the Early effect, for the NMOS For the BJT, 4

5 The Basic Gain Cell Effect of the Output Resistance of the Current Source Loads Current-source load can be implemented using a PMOS. Voltage gain f r o = r o1, 5

6 The Basic Gain Cell Practical implementation of the active-loaded CS amplifier 6

7 The Basic Gain Cell EX 6.3 V DD =3V, V tn = V tp =0.6V, k n =00A/V, k p =65A/V. L=0.4m, W=4m, V An =0V, V ap =10V, REF =100A. A v=? W g k r ' m1 n REF L 1 o1 VAn 0V 00k 0.1mA D mA/V 0.4 r o VAp 10V 100k 0.1mA D m1( o1 o) 0.63(mA/V) (00 100)(k ) 4V/V A g r r V SG of Q and Q3 corresponding to D3 = REF =100A 1 ' W V D k p VSG Vtp 1 L 3 V V OV VOV VOV 3 V V OV 3 OV V SD Ap V V SG 7

8 The Basic Gain Cell VOA VDD VOV 3.47 V Expression for v O vs. v i 1 k i D1 D W O V 1 V An ' n tn L 1 1 ' W VDD O k p VSG Vtp 1 L V Ap O O O O Substituting v O = V OA =.47V, V A =0.88V. Substituting V OB = V B V tn, V B =0.93V, V OB =0.33V V V 0.05V B A V V.14V O OB OA O V/V 0.05 t is very close to A v = -4, indicating that segment is quite linear. 8

9 The Basic Gain Cell ncreasing the Gain of the Basic Cell Current buffer between the load and the drain of Q1 increasing the output resistance. 9

10 The Cascode Amplifier Cascoding - CS(CE)+CG(CB) high trans-conductance, high output resistance, wide bandwidth 10

11 The Cascode Amplifier MOS Cascode n Fig. (c), n Fig. (d), Since g m 1/r o1, 1/r o, At the d node, 11

12 The Cascode Amplifier Thus, Output resistance Voltage at the source of Q 1

13 The Cascode Amplifier Voltage Gain For the case and, Cascoding to raise the output resistance of the current source load 13

14 The Cascode Amplifier Combining the cascode amplifier with a cascode current source Thus, For the case in which all transistor are identical, 14

15 The Cascode Amplifier Ex 6.4 Cascode current source with =100mA and R o =500kΩ. Assume 0.18-μm technology CMOS with V DD =1.8V, V tp = 0.5V, k p =90mA/V and V A = 10V/μm. Use V OV =0.3V. Output resistance For the largest signal swing, use the min. voltage across Q4 Assuming Q3 and Q4 are identical, 15

16 The Cascode Amplifier Distribution of Voltage Gain in a Cascode Amplifier Recalling and, 16

17 The Cascode Amplifier R d1 = r o1 R in, where R in is the input resistance of Q. Since g m r o 1, Total resistance at the drain of Q1 Voltage gain of Q1 mpedance transformation of CG amplifier 17

18 The Cascode Amplifier Table 6.1 Gain Distribution in the MOS Cascode Amplifier for Various Values of R L * * For the case r o1 = r o = r o 18

19 The Cascode Amplifier Output Resistance of a Source-Degenerated CS Amplifier Source-degeneration resistance reducing the effective transconductance to g m /(1 + g m R s ) The output resistance expression of the cascode can be used to find the output resistance of a source-degenerated common-source amplifier. Here, a useful interpretation of the result is that R s increases the output resistance by the factor (1 + g m R s ). Since g m r o 1, 19

20 The Cascode Amplifier Double Cascoding Higher output resistance and higher gain For the case of identical transistors, R ( g r ) r o m o o A ( g r ) A v m o Folded Cascode CS NMOS + CG PMOS 0

21 The Cascode Amplifier BJT Cascode BJT Cascode amplifier with an ideal current-source load. n Fig (c), 1

22 The Cascode Amplifier Node equation for (c 1, e ), Since g m 1/ r π, 1/ r o1 and 1/ r o, Node equation for c, Thus,

23 The Cascode Amplifier We set v i = 0, Voltage at the emitter node, Loop eq. around the c-e-ground loop Substituting for v π, Since g m ( r o1 r π ) 1, The maximum possible R o 3

24 The Cascode Amplifier Open ckt. Voltage gain, For the case of identical transistors, When r o r π, the maximum possible gain magnitude, the current source load must also be cascoded. 4

25 The Cascode Amplifier Output Resistance of an Emitter-Degenerated CE Amplifier Output resistance, Since g m r o 1, mpedance transformation of CB amplifier. 5

26 The Cascode Amplifier BiCMOS Cascodes nfinite input resistance and high output resistance. 6

27 C Biasing Current Sources and Current Mirrors Basic MOSFET Current Source Diode connected transistor forcing it to operate in the saturation mode. 1 W k V V ' D1 n GS tn L 1 D1 REF V DD V Assuming Q is operating in saturation, R GS 1 W k V V ' O D n GS tn L REF W / L / 1 O W L n the case of identical transistors, O = REF current mirror 7

28 C Biasing Current Sources and Current Mirrors Effect of V O on O To ensure that Q is saturated, V V V V O GS t O V OV Output resistance, R V O o ro O V A Output current considering the Early effect, O / O REF 1 W / L VA W L V V 1 O GS 8

29 C Biasing Current Sources and Current Mirrors EX 6.5 V DD =3V and REF =100μA, design the current source to obtain O of 100μA. Find R if Q1and Q are matched and L=1μm, W=10μm, V t =0.7V, and k n =00μA/V. What is the lowest value of V O? Assuming V A =0V/μm, find R O and the change in output current resulting from a +1V change in V O. 1 W k V ' D1 REF n OV L VOV V VGS Vt VOV V VDD VGS 31 R 0k 0.1mA REF V OV V Omin V OV 0.3 V VA V R O 0V ro 0.M 100A VO 1V O 5A r 0.M o 9

30 C Biasing Current Sources and Current Mirrors MOS Current-Steering Circuits Current mirrors can be used to implement a current-steering function. 3 REF REF W / L W / L 1 W / L 3 W / L To operate in the saturation region, V, V V V V D D3 SS GS1 tn 3 is fed to the input side of a current mirror formed by Q4 and Q W / L 5 W / L To keep Q5 in saturation, V V V D5 DD OV

31 C Biasing Current Sources and Current Mirrors BJT Circuits BJT current mirror i B 0(finite β) n case of sufficiently high β, C1 = REF. f Q is matched to Q1, O REF The area of the EBJ of Q is m times that of Q. O m REF O Area of EBJ of Q Area of EBJ of Q REF S S1 1 For the finite β, REF C C / C 1 O REF C C For a nominal current transfer ratio m ( S = m S1 ) O REF m m

32 C Biasing Current Sources and Current Mirrors Output resistance R V O o ro O V A O O will be at its nominal value only when Q has the same V CE as Q1 (V O =V BE ). Taking both the finite β and the finite R o into account, O m V V 1 O BE REF 1 ( m1) VA Simple current source REF V CC V R BE O REF 1 / 1 VO V BE VA R o V A ro O V A REF 3

33 C Biasing Current Sources and Current Mirrors Current steering REF V V V V R CC EE EB1 BE 1 = REF, 3 = REF (double EBJ area) = REF, 4 =3 REF (three times EBJ area) 33

34 Current-Mirror Circuits with mproved Performance Current mirrors biasing and active load. Two performance parameters the accuracy of the transfer ratio, the output resistance. Cascode MOS Mirrors Assuming the signal voltages at the gates of Q and Q3 are zero, R r 1 g g r r o o3 m3 mb3 o3 o g r r m3 o3 o Bipolar Mirror with Base-Current compensation REF C 1 1 O C O REF 1 Connecting node x to V CC and R instead of REF, REF V V V R CC BE1 BE 3 34

35 Current-Mirror Circuits with mproved Performance Wilson Current Mirror O REF 1 1 C C Output resistance R o r o / 35

36 Current-Mirror Circuits with mproved Performance Wilson MOS Mirror Output resistance R r g r o o3 m3 o g r r m3 o3 o 36

37 Current-Mirror Circuits with mproved Performance Widlar Current Source Neglecting base currents, V V V REF BE1 T ln S V O BE T ln S REF VBE1VBE VT ln O V V R BE1 BE O E R O E T REF V ln O Assuming the signal voltages at the base of Q are zero, R 1g R r r o m E o 37

38 Current-Mirror Circuits with mproved Performance Ex 6.14 O =10A. ( REF =1mA at V BE =0.7V) For the basic current-source circuit, V R R BE1 1 10μA 0.7 VT ln 0.58 V 1mA k 0.01 For the Widlar current source k 1 1mA R3 0.05ln 10μA R3 11.5k 38

39 Some Useful Transistor Pairings CC-CE, CD-CS, and CD-CE Configuratiosn - Wide bandwidth, high R in 39

Some Useful Transistor Pairings Ex 6.13 1 = = 1mA, =100. R sig =4k, R L =4k. G v =? (gnore r o ) gm R 40mA/V re 5 r 100.5k g 40 m in r.5k 1 R r R in 1 e1 in 101 0.05.5 55k Vb1 Rin 55 0.

40 Some Useful Transistor Pairings Ex = = 1mA, =100. R sig =4k, R L =4k. G v =? (gnore r o ) gm R 40mA/V re 5 r 100.5k g 40 m in r.5k 1 R r R in 1 e1 in k Vb1 Rin V/V V R R 55 4 sig in sig Vb Rin V/V V R r V b1 in e1 o gmrl V b V/V For the CE amplifier, G v Vo V/V V sig * CC-CE configuration.5 times of G v 40

41 Some Useful Transistor Pairings Darling Configuration nput resistance 1 1 R r r R in 1 e1 e E - Output resistance R R // r out E e r R e1 sig Voltage gain Vo RE Vsig RE re re 1 Rsig

42 Some Useful Transistor Pairings CC-CB and CD-CG Configurations - Wide bandwidth, low-frequency gain equal to the CB with high input resistance. 4

43 Some Useful Transistor Pairings Ex 6.8 Find R in, v o /v i, and v o /v sig. (Neglect r o ) - nput resistance - Overall voltage gain Rin 1 1 r - Voltage gain vo RL v r i e e v R R v R R r o in L sig in sig e 43

Solid State Devices & Circuits. 18. Advanced Techniques

ECE 442 Solid State Devices & Circuits 18. Advanced Techniques Jose E. Schutt-Aine Electrical l&c Computer Engineering i University of Illinois jschutt@emlab.uiuc.edu 1 Darlington Configuration - Popular