C H A P T E R 5. Amplifier Design

Transcription

1 C H A P T E 5 Amplifier Design

2 The Common-Source Amplifier v 0 = r ( g mvgs )( D 0 ) A v0 = g m r ( D 0 )

3 Performing the analysis directly on the circuit diagram with the MOSFET model used implicitly.

4 The CS amplifier with a source resistance s : (a) Circuit without bias details; (b) Equivalent circuit with the MOSFET represented by its T model. s m D m v g g A + = 1 0 S m L D m s m L D v g g g A + = + = 1 ) ( 1 0

5 The Common-Gate (CG) Amplifier v A v = 0 0 = v i g m D Figure 5.48 (a) Common-gate (CG) amplifier with bias arrangement omitted. (b) Equivalent circuit of the CG amplifier with the MOSFET replaced with its T model.

6 The Common-Drain Amplifier or Source Follower A v0 = v v 0 i = L + L 1 g m, = 1 L A 0 = v 0 = 1 g m Figure 5.49 Illustrating the need for a unity-gain buffer amplifier.

7

8 Summary and Comparison

9 Biasing in MOS Amplifier

10 Biasing by Fixing V GS Figure 5.51 The use of fixed bias (constant V GS ) can result in a large variability in the value of I D. Devices 1 and 2 represent extremes among units of the same type.

11 Biasing by Fixing VG and Connecting of esistance in the Source V G = V GS S I D Figure 5.52 Biasing using a fixed voltage at the gate, V G, and a resistance in the source lead, S : (a) basic arrangement; (b) reduced variability in I D

12 Biasing by Fixing VG and Connecting of esistance in the Source Figure 5.52 Biasing using a fixed voltage at the gate, V G, and a resistance in the source lead, S : (c) practical implementation using a single supply; (d) coupling of a signal source to the gate using a capacitor C C1 ; (e) practical implementation using two supplies.

13 Example 5.12.

14 Biasing the MOSFET using a large drain-to-gate feedback resistance, G. V V GS DD = V = V DS GS = V + DD D I D D I D

15 Figure 5.55 (a) Biasing the MOSFET using a constant-current source I. (b) Implementation of the constant-current source I using a current mirror. Biasing Using a Constant-Current Source 2 1 ' 1 ) ( ) ( 2 1 t GS n D V V L W k I = 2 2 ' 2 ) ( ) ( 2 1 t GS n D V V L W k I I = = V V V I I GS SS DD EF D + = = ) / ( ) / ( L W L W I I EF = Current Mirror Circuit

16 Figure E5.37

17 Basic Structure Figure 5.56 Basic structure of the circuit used to realize single-stage, discrete-circuit MOS amplifier configurations.

18 Common Source (CS) Amplifier in = G G v = G G + sig g m ( D L r0 ) Figure 5.57 (a) Common-source amplifier based on the circuit of Fig (b) Equivalent circuit of the amplifier for small-signal analysis.

19 Common Gate (CG) Amplifier Figure 5.58 (a) Common-source amplifier with a resistance S in the source lead

20 Common Gate (CG) Amplifier Figure 5.58 (b) Small-signal equivalent circuit with r o neglected.

21 The Source Follower G v = G + G sig ( L L r 0 r 0 ) + 1 g m Figure 5.60 (a) A source-follower amplifier. (b) Small-signal, equivalent-circuit model.

22 BW=f H -f L GB= A M BW Figure 5.61 A sketch of the frequency response of a CS amplifier delineating the three frequency bands of interest.

23 The role of the Substrate The Body Effect Figure 5.62 Small-signal, equivalent-circuit model of a MOSFET in which the source is not connected to the body.

24 The Inverter Figure The CMOS inverter.

25 Input = Vdd

26 Input = GND

27 Figure The voltage-transfer characteristic of the CMOS inverter when Q N and Q P are matched.

28 Figure Dynamic operation of a capacitively loaded CMOS inverter: (a) circuit; (b) input and output waveforms; (c) equivalent circuit during the capacitor discharge; (d) trajectory of the operating point as the input goes high and C discharges through Q N.