F7 Transistor Amplifiers
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1 Lars Ohlsson F7 Transistor Amplifiers Outline Transfer characteristics Small signal operation and models Basic configurations Common source (CS) CS/CE w/ source/ emitter degeneration resistance Common gate (CG) Common drain (CD or source follower) Biasing Discrete circuit amplifiers Reading Guide Sedra/Smith 7ed int Chapter (Chapter ) Problems Sedra/Smith 7ed int P6.5, 6.13, 6.27, 6.48,
2 n-mosfet Modes of Operation (recap) MOSFET cutoff(/ weak inversion) Not interesting for basic amplifier operation MOSFET triode(/ linear) Not interesting for basic amplifier operation MOSFET saturation(/ active) i D = i S i G = 1 2 k n W L v GS V 2 tn 1 + λv DS = i D (1 + λv DS ) i G = 0 i S = i D 0 < v OV = v GS V tn = V DSsat v DS > V DSsat Saturation mode is used in a MOSFET amplifier, sometimes (cf. BJT) called active mode. 2
3 npn-bjt Modes of Operation (recap) BJT cutoff Not interesting for basic amplifier operation BJT saturation Not interesting for basic amplifier operation BJT active (EB forward, CB reverse) i C = i E i B = I S exp v BE V T i B = i C β = 1 α α i C i E = i C α = 1 + β β i C v CE = v BE v BC 0.3 V v BC = v CE v BE 0.4 V v BE 0.7 V 1 + v CE V A = i C 1 + v CE V A Active mode is used in a BJT amplifier. 3
4 Voltage Transfer Characteristics (VTC) MOSFET and BJT on a load line Non-linear characteristics v DS = V DD R D i D v BE = V CC R C i C 4
5 Quiescent (Bias) Point Selection MOSFET saturation(/ BJT active) region Voltage controlled current source Load line limits selection of quiescent point, Q, and the allowed signal swing Quiescent point yields from device technology and circuit design specification. 5
6 Bias and Signal Notation Bias voltages, V GS, V DS, and currents, I G, I D, I E Set the quiescent (no signal) conditions of the circuit Isolated signal voltages, v gs, v ds, and currents, i g, i d, i e Describe variations about the quiescent conditions Total signal voltages, v GS = V GS + v gs, v DS = V DS + v ds, and currents, i G = I G + i g, i D = I D + i d, i E = I E + i e Superposition of the bias and signal components (BJT? Same principle, different terminal names.) Notation is case sensitive in signal parameter and terminal subscript. 6
7 Small Signal Approximation (Linearization) Large signals require iterative solution of non-linear transistor (MOSFET or BJT) current-voltage equations i D = 1 2 k n W L v GS V tn λv DS i C = I S exp v BE V T 1 + v CE V A Operation with small signals about quiescent point Approximately linear range (cf. Taylor series) f n X f X + x = n=0 n! x X n f X + f X 1 x X 1 Small signal parameters at Q-point Input resistance, R i = v I i I = V I+v i I I +i i Transconductance, g m = v O i I = v i i i = V O+v o I I +i i Output resistance, R o = v O i O = V O+v o I O +i o = v o i i, or current gain, β = i O i I = I O+i o I I +i i = v o i o = i o i i Physical origins of the MOSFET and BJT currentvoltage characteristics were discussed earlier. 7
8 Which effects limit the allowed signal range at Q? 8
9 Input and Output Signal Range MOSFET only linear for very small signals MOSFET must stay in saturation mode on load line MOSFET breakdown effects at high voltages Input voltage above threshold, but allow saturation v GSmin > V tn v GSmax < V DD v DSmin Output voltage above overdrive, but allow saturation v GSmax V tn < v DSmin < V DD 9
10 MOSFET as Small Signal Amplifier i Transconductance, g m = D ቚ v GS Q Slope of (voltage-current) transfer characteristics at Q-point i D V GS + v gs = = 1 2 k n W L V 2 2 OV + 2V OV v gs + v gs 1 + λv DS Linear term must dominate high order term(s) v gs 2V OV = 2 V GS V tn v Voltage gain, A v = DS ቚ = v GS Q Slope of VTC at Q-point v DS i ቚ D ቚ i D Q v GS Q Load resistance converts current to voltage v DS = V DD R D i D v GS, v DS Linearization of polynomial. 10
11 MOSFET Hybrid Pi Model (recap) Gate resistance r g = v gs i g = Transconductance g m = i d v gs = k n W L V W OV = 2k n L I D = 2I D V OV Output resistance r o = v ds i d = 1 λi D = L λ I = V A D I D L = V A I D Physical origins of the MOSFET and BJT hybrid pi small signal models were discussed earlier. 11
12 MOSFET Body Effect Substrate well devices have a parasitic body transistor Body effect can be circumvented by connection of body to source Body effect is often small and is typically bypassed, unless specifically noted. 12
13 BJT as Small Signal Amplifier i Transconductance, g m = C ቚ v BE Q Slope of (voltage-current) transfer characteristics at Q-point i C V BE + v be = I C V BE 1 + v be + v 2 be V 2 T 2V + v 3 be 3 T 6V + T Linear term must dominate high order term(s) v be 2V T v Voltage gain, A v = CE ቚ = v BE Q Slope of VTC at Q-point v CE i ቚ C ቚ i C Q v BE Q Load resistance converts current to voltage v CE = V CC R C i C v BE, v CE Linearization of exponential by reduced Taylor series. 13
14 BJT Hybrid Pi Model (recap) Base resistance r π = v be ቤ i b vce =0 = I C V T = β g m Transconductance or current gain g m = i c ቤ v be vce =0 i c = V T = β β = ቤ I B r π i b vce =0 = g m r π Output resistance r o = v ce ቤ i c vbe =v π =0 = V A I C Physical origins of the MOSFET and BJT hybrid pi small signal models were discussed earlier. 14
15 BJT vs MOSFET, what is the difference from a circuit perspective? 15
16 MOSFET T-Model A useful transformation of the hybrid pi model Equivalent terminal characteristics as compared to hybrid pi Simplifies circuit analysis if component in the source lead 16
17 BJT T-Model A useful transformation of the hybrid pi model Equivalent terminal characteristics as compared to hybrid pi Simplifies circuit analysis if component in the emitter lead I C = βi B = β β + 1 I E = αi E r e = v be ቤ i e vce =0 = V T I E = r π 1 + β = α g m 1 g m 17
18 How does R E = r e + R e transform from emitter to base R π? 18
19 BJT Resistance Reflection Hybrid pi model Base resistance, r π T model Emitter resistance, r e = α g m 1 g m Input resistance towards base or emitter, with the other terminal grounded Inversely proportional to terminal current i e = i b + i c = 1 + β i b r π = 1 + β r e The resistance reflection factor yields from conservation of base-emitter voltage and the terminal currents. 19
20 Systematic Analysis of Transistor Amplifier Circuits Linearization of large signal characteristics Eliminate signal sources; v = {short circuit} = 0 i = open circuit = 0 Determine dc operating point of the transistor Calculate parameter values for small signal model Linear analysis of small signal characteristics Eliminate dc sources; V = {short circuit} = 0 I = open circuit = 0 Replace transistor with small signal model Hybrid pi model: often most useful T model: simplifies analysis if component at source(/ emitter) Analyse the linearized circuit to determine characteristics Open circuit eliminates a current, short circuit eliminates a voltage. 20
21 BREAK 21
22 Basic Amplifier Configurations Amplifier designation scheme Common terminal (ground) Input (MOSFET) terminal Gate (CS/CD) or source (CG) Never drain input Output (MOSFET) terminal Drain (CS/CG) or source (CD) Never gate output BJT vs MOSFET amplifiers BJT has finite input resistance BJT has higher gain BJT has other terminal names 22
23 Characterisation of Voltage Amplifiers Input resistance R i = v i i i Output resistance v o R o = ቤ i o vsig =0 Open circuit voltage gain (neglect source and load) A vo = A v ቚ RL = Voltage gain (neglect source) Overall gain A v = v o v i = A vo G v = v o v sig = R L R L + R o R i R i + R sig A vo R L R L + R o To find a port resistance, cancel independent sources and inject a test signal. 23
24 Common Source (CS) Amplifier High input resistance, moderate output resistance R i = v i i i = v R o = o ቚ = R i D o vsig =0 A vo = ȁ A v RL = = g m R D A v = A vo R L R L +R o = g m R D ȁȁr L G v = R i R A L R i +R vo = A sig R L +R v o 24
25 Common Source (CS) Amplifier w/ Source Degeneration Resistance High input resistance, moderate output resistance R i = v i i i = v R o = o ቚ = R i D o vsig =0 A vo = A v ȁ RL = = g mr D 1+g m R s A v = A vo R L R L +R o = g m R D ȁȁr L 1+g m R s G v = R i R A L R i +R vo = A sig R L +R v o Transistor output resistance would somewhat complicate analysis. 25
26 Common Emitter (CE) Amplifier w/ Emitter Degeneration Resistance Quite high input resistance, moderate output resistance R i = v i i i = resistance reflection = 1 + β r e + R e v R o = o ቚ = R i C o vsig =0 A vo = A v ȁ RL = = g mr C g mr C 1+R e /r e 1+g m R e A v = A vo R L R L +R o g m R C ȁȁr L 1+g m R e G v = R i R A L R i +R vo β sig R L +R o 1+β R C ȁȁr L r e +R e +R sig Transistor output resistance would somewhat complicate analysis. 26
27 Current Buffer Problem Supply current signal from low impedance source to high impedance load Current buffer Protects source (Norton/ Thevenin) from output current depletion Ideal characteristics Unity current gain, A i = i L 1 i s Low input impedance, R i R s High output impedance, R o R L Current gain includes source and load effects, in contrast to short circuit current gain. 27
28 Common Gate (CG) Amplifier Low input resistance, moderate output resistance R i = v i i i = 1 g m v R o = o ቚ = R i D o vsig =0 A vo = ȁ A v RL = = g m R D A v = A vo R L R L +R o = g m R D ȁȁr L G v = R i R i +R sig A vo R L R L +R o = R DȁȁR L R sig +1/g m < A v Transistor output resistance would somewhat complicate analysis. 28
29 Voltage Buffer Problem Supply voltage signal from high impedance source to low impedance load Voltage buffer Protects source (Thevenin/ Norton) from output voltage depletion Ideal characteristics Unity voltage gain, A v = v L 1 v s High input impedance, R i R s Low output impedance, R o R L Voltage gain includes source and load effects, in contrast to open circuit voltage gain. 29
30 Common Drain (CD) Amplifier a.k.a. Source Follower High input resistance, moderate output resistance R i = v i i i = v R o = o ቚ i o vsig =0 = 1 g m A vo = ȁ A v RL = = 1 A v = A vo R L R L +R o = R L R L +1/g m G v = R i R A L R i +R vo = A sig R L +R v o First evaluate voltage gain, then open circuit gain. 30
31 Discrete Transistor Biasing Discrete MOSFET variations Threshold voltage, V tn Gate width to length ratio, W L Oxide (thickness) capacitance, C ox g m = k n Discrete BJT variations Current gain, β W L g m = I C V T = β r π V GS V tn = 2k n W L I D = 2I D V OV Typical biasing method Identify required drain(/ collector) current Negative feedback used to combat performance variations Devices in integrated circuits (ICs) have more uniform performance, as compared to discrete devices. 31
32 MOSFET Biasing: Problem Naïve bias attempt Fixing V GS to fraction of V DD I D = 1 2 k n W L V GS V tn λv DS = 1 2 k n W L V OV λv DS Problem Transconductance and overdrive variations yield current variations 32
33 MOSFET Biasing: Solution 1 Source degeneration resistance, R S Load line relation for MOSFET and R S Negative feedback from I D to V GS V G = V GS + R S I D V GS = V G R S I D 33
34 MOSFET Biasing: Solution 2 Drain feedback (large) resistance No dc voltage difference between gate and drain Negative feedback from I D to V GS V GS = V DS = V DD R D I D Drain to gate connection (w/o resistance) is known as a diode connection. 34
35 BJT Biasing: Problem and Solution Naïve bias attempt 1 Fixing V BE to fraction of V CC I C = βi B = β β + 1 I E = I S exp V BE V T 1 + V BE V A Naïve bias attempt 2 Fixing I B = V CC V BE R B by selecting R B Problem Current gain variations yield current variations Solutions Emitter degeneration resistance Collector feedback resistance (diode connection) BJT biasing is very similar to MOSFET, except for the finite base current. 35
36 How to achieve biasing (dc) and small signal operation simultaneously? 36
37 Discrete Circuit Amplifier: CS w/ Source Degeneration Bias circuits Gate divider Source degeneration Z C = 1 jωc Signal paths Gate input coupling Drain output coupling Source bypass Analysis algorithm Find transistor quiescent point Replace transistor symbol w/ small signal model (Short circuit bypass/ coupling) Linear circuit analysis Coupling and bypass capacitors used to separate bias and small signal circuit. 37
38 Discrete Circuit Amplifier: Low Corner Frequency Bypass and coupling capacitors produces a low corner frequency 38
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