The Miller Approximation. CE Frequency Response. The exact analysis is worked out on pp of H&S.

Transcription

1 CE Frequency Response The exact analysis is worked out on pp of H&S. The Miller Approximation Therefore, we consider the effect of C µ on the input node only V out V s = r g π m ( ro r r π + R oc R L ) ( jω ω z ) S ( + jω ω p ) ( + jω ω p2 ) r The low-frequency voltage gain (loaded) is g π m ( ro r r π + R oc R L ) S The zero is higher than the transition frequency ω T = g m ( C π + C µ ) The first (lowest frequency) pole is (approximately) where ω p = {( R S r π )C [ π + ( + g m R out ')C µ ] + R out 'C µ } R out ' = r o r oc R L neglect the feedforward current I µ in comparison with g m V π... a good approximation I t = (V t - V o ) / Z µ V o = - g m V t R L / (R L + R out ) = A vcµ V t where A vcµ is the low frequency voltage gain across C µ The second pole is (approximately) ( R S r π )R ( out ') ω p2 = ( R S r π )C [ π + ( + g m R out ')C µ ] + R out 'C µ I t = V t (- A v ) / Z µ Z eff = V t / I t = Z µ / ( - A v ) Z eff = jωc µ A = = vcµ jω( C µ ( A vcµ )) jωc M Brute force analysis is not particularly helpful for gaining insight into the frequency response... C M = ( A vcµ )C µ is the Miller capacitor EE 05 Fall 2000 Page Week 2 EE 05 Fall 2000 Page 2 Week 2

2 Generalized Miller Approximation An impedance Z connected across an amplifier with voltage gain A vz can be replaced by an impedance to ground... multiplied by ( - A vz ) Voltage Gain vs. Frequency for CE Amplifier Using the Miller Approximation The Miller capacitance is lumped together with C π, which results in a singlepole low-pass RC filter at the input Common-emitter and common-source: A vz = large and negative for C µ or C gd --> capacitance at the input is magnified Transfer function has one pole and no zero after Miller approximation: ω 3dB = ( r π R S )C ( π + C M ) Common-collector and common-drain: A vz --> capacitance at the input due to C π or C gs is greatly reduced ω 3dB = ( r π R S )C [ π + ( + g m r o r oc R L )C µ ] ω 3dB ω from the exact analysis (final term R out C µ is missing) The break frequency is reduced by the Miller effect... which results in a large Miller capacitor at the input. EE 05 Fall 2000 Page 3 Week 2 EE 05 Fall 2000 Page 4 Week 2

3 Common Collector Frequency Response Basic approach: two-port model from Chapter 8, decorated with device capacitances Common-Collector Frequency Response Voltage buffer two-port model has input at base and output at emitter: Note carefully where the capacitances are connected! The DC output voltage V OUT is selected to be 0 V, so that the output voltage is just the small-signal voltage v out (phasor representation V out ) R Millerize the base-emitter capacitor: gain across it is A L vπ = R L + R out R C M C π ( A vπ ) C π L R C out = = = R L + R π out R L + R out The break frequency of the common-collector is: ω 3dB = ( R S )C ( µ + C M ) can approach the transition frequency for small source resistances EE 05 Fall 2000 Page 5 Week 2 EE 05 Fall 2000 Page 6 Week 2

4 Common-Base Frequency Response Similar approach: start with two-port and add capacitors... Common-Base Frequency Response Poles are separate (no coupling between input and output) ω pin, = ( R S )C π ω pout, = ( R out R L )C µ The input pole is beyond the transition frequency, due to the low value of = /g m The output pole is a function of R L since the output resistance is so large. For small load resistances, the output pole can approach the transition frequency Two-port model: Summary of single-stage amplifiers: CE/CS: Miller effect decreases the bandwidth severely CC/CD: wideband CB/CG: wideband EE 05 Fall 2000 Page 7 Week 2 EE 05 Fall 2000 Page 8 Week 2

5 Multistage Amplifiers Single-stage transistor amplifiers are inadequate for meeting most design requirements for any of the four amplifier types (voltage, current, transconductance, and transresistance.) Therefore, we use more than one amplifying stage. The challenge is to gain insight into when to use which of the 9 single stages that are available in a modern BiCMOS process: Bipolar Junction Transistor: CE, CB, CC -- in npn and pnp * versions MOSFET: CS, CG, CD -- in n-channel and p-channel versions * in most BiCMOS technologies, only the npn BJT is available How to design multi-stage amplifiers that satisfy the required performance goals? Example : Cascaded Voltage Amplifier Want --> infinity, R out --> 0, with high voltage gain. Try CS as first stage, followed by CS to get more gain... use 2-port models Rout CS CS 2 solve for overall voltage gain... higher, but R out = R out2 which is too large * Two fundamental requirements:. Impedance matching: output resistance of stage n, R out, n and input resistance of stage n +,, (n+), must be in the proper ratio, (n+) / R out, n --> or, (n+) / R out, n --> 0 to avoid degrading the overall gain parameter for the amplifier 2. DC coupling: we will directly connect stages: effect on DC signal levels must be considered, too EE 05 Fall 2000 Page 9 Week 2 EE 05 Fall 2000 Page 0 Week 2

6 Three-Stage Voltage Amplifier Fix output resistance problem by adding a common drain stage (voltage buffer) Cascaded Transconductance Amplifier input resistance should be high; output resistance should also be high initial idea: use CS stages (they are natural transconductance amps) CS CS 2 Rout Output resistance is not that low... few kω for a typical MOSFET and bias --> could pay an area penalty by making (W/L) very large to fix. Overall G m = - g m (r o r oc ) g m2 = A v g m2... can be very large BUT, output resistance is only moderately large... need to increase it EE 05 Fall 2000 Page Week 2 EE 05 Fall 2000 Page 2 Week 2

7 Improved Transconductance Amplifier Output resistance: boost using CB or CG stage Two-Stage Current Buffers since one CB stage boosted the output resistance substantially, why not add another one... CS CS 2 CB Rout high-source resistance current sources are needed to avoid having r oc3 limit the resistance The base-emitter resistance of the 2 nd stage BJT is r π2 which is much less than the 2 nd stage source resistance = st stage output resistance R S2 = R out = β o r o r oc Therefore, the output resistance expression reduces to R out g m2 r o2 r π2 r oc2 = β o2 r o2 r oc2... no improvement over a single CB stage EE 05 Fall 2000 Page 3 Week 2 EE 05 Fall 2000 Page 4 Week 2

8 Improved Two-Stage Current Buffer: CB/CG The addition of a common-gate stage results in further increases in the output resistance, making the current buffer closer to an ideal current source at the output port The product of transconductance and output resistance g m2 r o2 can be on the order of for a MOSFET --> R out is increased by over two orders of magnitude... practical limit... on the order of 00 MΩ Of course, the current supply for the CG stage has to have at least the same order of magnitude of output resistance in order for it not to limit R out. General resistance matching... try not to lose much in doing a current divider or a voltage divider. Which of these is appropriate depends on whether the signal is current or voltage at the port. EE 05 Fall 2000 Page 5 Week 2