Lecture 33: Context. Prof. J. S. Smith
|
|
- Evelyn Harrell
- 5 years ago
- Views:
Transcription
1 Lecture 33: Prof J. S. Smith Context We are continuing to review some of the building blocks for multi-stage amplifiers, including current sources and cascode connected devices, and we will also look at the general objectives of multi-state amplifier configurations. 1
2 Reading Chapter 9, multi-stage amplifiers Lecture Outline Current Mirrors An Example Using Cascodes Multistage Amps Example 1: Cascode Amp Design Example 2: Two Stage CS Amp 2
3 Current Sinks and Sources Sink: output current goes to ground Source: output current comes from voltage supply Current Mirrors We only need one reference current to set up all the current sources and sinks needed for a multistage amplifier. 3
4 Multistage Amplifiers Necessary to meet typical specifications for any of the 4 types We have 2 flavors (NMOS, PMOS) of CS, CG, and CD and the npn versions of CE, CB, and CC (for a BiCMOS process) What are the constraints? 1. Input/output resistance matching 2. DC coupling (no passive elements to block the signal) Summary of Cascaded Amplifiers General goals: 1. Boost the gain parameter (except for buffers) 2. Optimize the input and output resistances Voltage: Current: Transconductance: R in 0 R out 0 Transresistance: 0 0 4
5 Start: Two-Stage Voltage Amplifier Use two-port models to explore whether the combination works CE 1 CE 2 CE 1,2 Results of new 2-port: R in = R in1, R out = R out2 ( ) ( ) A = G R R G R v m1 in2 out1 m2 out 2 ( )( ) A = G G R R R v m1 m2 in2 out1 out 2 Add a Third Stage: CC Goal: reduce the output resistance (important spec. for a voltage amp) CE 1 CE 2 CC 3 Output resistance: R out 1 R 1 r r = + = + g β g β S o2 oc2 m3 m3 5
6 Using CMOS Stages CS 1 CS 2 CD 3 Input resistance: Voltage gain (2-port parameter): Output resistance: ( ) ( ) A = g r r g r r v m1 o1 oc1 m2 o2 oc2 R out = g m 1 + g mb Multistage Current Buffers Are two cascaded common-base stages better than one? CB 1 CB 2 Input resistance: R in = R in1 6
7 Two-Port Models R out = R ( 1+ gm2rπ 2 RS 2 ) roc2 out 2 r02 Output impedance of stage #1 (large) ( ) ( β ) R r g r r = r r out 02 m2 π 2 oc2 o o2 oc2 Common-Gate 2 nd Stage R = R + out ( 1 gm2rs 2 ) roc2 out 2 r02 ( ) R = R r 1 + g r r r out out 2 02 m2 o1 oc1 oc2 7
8 Second Design Issue: DC Coupling Constraint: large inductors and capacitors are not available Output of one stage is directly connected to the input of the next stage must consider DC levels why? 3.2V Alternative CG-CC Cascade Use a PMOS CD Stage: DC level shifts upward 3.2V 8
9 CG Cascade: DC Biasing Two stages can have different supply currents Extreme case: I BIAS2 = 0 A CG Cascade: Sharing a Supply First stage has no current supply of its own its output resistance is modified 9
10 The Cascode Configuration Common source / common gate cascade is one version of a cascode (all have shared supplies) DC bias: Two-port model: first stage has no current supply of its own Cascode Two-Port Model CS 1 * CG 2 R = R = r Output resistance of first stage = * down, CS o1 out, CS R r (1 + g r ) r out oc2 m o1 o2 G = g m m1 R in = Why is the cascode such an important configuration? 10
11 Miller Capacitance of Input Stage Find the Miller capacitance for C gd1 Input resistance to common-gate second stage is low gain across C gd1 is small. CG Cascade: DC Biasing Two stages can have different supply currents Extreme case: I BIAS2 = 0 A 11
12 CG Cascade: Sharing a Supply First stage has no current supply of its own its output resistance is modified The Cascode Configuration Common source / common gate cascade is one version of a cascode (all have shared supplies) DC bias: Two-port model: first stage has no current supply of its own 12
13 Cascode Two-Port Model CS 1 * CG 2 R = R = r Output resistance of first stage = * down, CS o1 out, CS R r (1 + g r ) r out oc2 m o1 o2 G = g m m1 R in = Why is the cascode such an important configuration? Miller Capacitance of Input Stage Find the Miller capacitance for C gd1 Input resistance to common-gate second stage is low gain across C gd1 is small. 13
14 Two-Port Model with Capacitors C = ( 1 A ) C 1 gd Miller capacitance: M vc 1 1 A g r = m1 vc 1 1( 1) 1 gd m o g m2 g = m2 gd g C M = 2C gd1 Generating Multiple DC Voltages Stack-up diode-connected MOSFETs or BJTs and run a reference current through them pick off voltages from gates or bases as references 14
15 Multistage Amplifier Design Examples Start with basic two-stage transconductance amplifier: Why do this combination? Current Supply Design Output resistance goal requires large r oc use cascode current source 15
16 Totem Pole Voltage Supply DC voltages must be set for the cascode current supply transistors M 3 and M 4, as well as the gate of M 2. Why include M 2B? Complete Amplifier Schematic Goals: g m1 = 1 ms, R out =10 MΩ 16
Reading. Lecture 33: Context. Lecture Outline. Chapter 9, multi-stage amplifiers. Prof. J. S. Smith
eading Lecture 33: Chapter 9, multi-stage amplifiers Prof J. S. Smith Context Lecture Outline We are continuing to review some of the building blocks for multi-stage amplifiers, including current sources
More informationMultistage Amplifiers
Multistage Amplifiers Single-stage transistor amplifiers are inadequate for meeting most design requirements for any of the four amplifier types (voltage, current, transconductance, and transresistance.)
More informationThe Miller Approximation. CE Frequency Response. The exact analysis is worked out on pp of H&S.
CE Frequency Response The exact analysis is worked out on pp. 639-64 of H&S. The Miller Approximation Therefore, we consider the effect of C µ on the input node only V ---------- out V s = r g π m ------------------
More informationLecture 34: Designing amplifiers, biasing, frequency response. Context
Lecture 34: Designing amplifiers, biasing, frequency response Prof J. S. Smith Context We will figure out more of the design parameters for the amplifier we looked at in the last lecture, and then we will
More informationLecture 21: Voltage/Current Buffer Freq Response
Lecture 21: Voltage/Current Buffer Freq Response Prof. Niknejad Lecture Outline Last Time: Frequency Response of Voltage Buffer Frequency Response of Current Buffer Current Mirrors Biasing Schemes Detailed
More informationDC Coupling: General Trends
DC Coupling: General Trends * Goal: want both input and output to be centered at halfway between the positive and negative supplies (or ground, for a single supply) -- in order to have maximum possible
More informationEE105 Fall 2015 Microelectronic Devices and Circuits
EE105 Fall 2015 Microelectronic Devices and Circuits Multi-Stage Amplifiers Prof. Ming C. Wu wu@eecs.berkeley.edu 511 Sutardja Dai Hall (SDH) Terminal Gain and I/O Resistances of MOS Amplifiers Common
More informationLecture 21 - Multistage Amplifiers (I) Multistage Amplifiers. November 22, 2005
6.02 Microelectronic Devices and Circuits Fall 2005 Lecture 2 Lecture 2 Multistage Amplifiers (I) Multistage Amplifiers November 22, 2005 Contents:. Introduction 2. CMOS multistage voltage amplifier 3.
More informationCurrent Supply Topology. CMOS Cascode Transconductance Amplifier. Basic topology. p-channel cascode current supply is an obvious solution
CMOS Cascode Transconductance Amplifier Basic topology. Current Supply Topology p-channel cascode current supply is an obvious solution Current supply must have a very high source resistance r oc since
More informationCMOS Cascode Transconductance Amplifier
CMOS Cascode Transconductance Amplifier Basic topology. 5 V I SUP v s V G2 M 2 iout C L v OUT Device Data V Tn = 1 V V Tp = 1 V µ n C ox = 50 µa/v 2 µ p C ox = 25 µa/v 2 λ n = 0.05 V 1 λ p = 0.02 V 1 @
More informationUNIT I BIASING OF DISCRETE BJT AND MOSFET PART A
UNIT I BIASING OF DISCRETE BJT AND MOSFET PART A 1. Why do we choose Q point at the center of the load line? 2. Name the two techniques used in the stability of the q point.explain. 3. Give the expression
More informationBJT Circuits (MCQs of Moderate Complexity)
BJT Circuits (MCQs of Moderate Complexity) 1. The current ib through base of a silicon npn transistor is 1+0.1 cos (1000πt) ma. At 300K, the rπ in the small signal model of the transistor is i b B C r
More informationMicroelectronic Devices and Circuits Lecture 22 - Diff-Amp Anal. III: Cascode, µa Outline Announcements DP:
6.012 Microelectronic Devices and Circuits Lecture 22 DiffAmp Anal. III: Cascode, µa741 Outline Announcements DP: Discussion of Q13, Q13' impact. Gain expressions. Review Output Stages DC Offset of an
More informationECE 255, Discrete-Circuit Amplifiers
ECE 255, Discrete-Circuit Amplifiers 20 March 2018 In this lecture, we will continue with the study of transistor amplifiers with the presence of biasing circuits and coupling capacitors in place. We will
More information(a) BJT-OPERATING MODES & CONFIGURATIONS
(a) BJT-OPERATING MODES & CONFIGURATIONS 1. The leakage current I CBO flows in (a) The emitter, base and collector leads (b) The emitter and base leads. (c) The emitter and collector leads. (d) The base
More informationChapter 7 Building Blocks of Integrated Circuit Amplifiers: Part D: Advanced Current Mirrors
1 Chapter 7 Building Blocks of Integrated Circuit Amplifiers: Part D: Advanced Current Mirrors Current Mirror Example 2 Two Stage Op Amp (MOSFET) Current Mirror Example Three Stage 741 Opamp (BJT) 3 4
More informationChapter 15 Goals. ac-coupled Amplifiers Example of a Three-Stage Amplifier
Chapter 15 Goals ac-coupled multistage amplifiers including voltage gain, input and output resistances, and small-signal limitations. dc-coupled multistage amplifiers. Darlington configuration and cascode
More informationF9 Differential and Multistage Amplifiers
Lars Ohlsson 018-10-0 F9 Differential and Multistage Amplifiers Outline MOS differential pair Common mode signal operation Differential mode signal operation Large signal operation Small signal operation
More informationMicroelectronics Circuit Analysis and Design
Neamen Microelectronics Chapter 6-1 Microelectronics Circuit Analysis and Design Donald A. Neamen Chapter 6 Basic BJT Amplifiers Neamen Microelectronics Chapter 6-2 In this chapter, we will: Understand
More informationBuilding Blocks of Integrated-Circuit Amplifiers
Building Blocks of ntegrated-circuit Amplifiers 1 The Basic Gain Cell CS and CE Amplifiers with Current Source Loads Current-source- or active-loaded CS amplifier Rin A o R A o g r r o g r 0 m o m o Current-source-
More informationECE 255, MOSFET Basic Configurations
ECE 255, MOSFET Basic Configurations 8 March 2018 In this lecture, we will go back to Section 7.3, and the basic configurations of MOSFET amplifiers will be studied similar to that of BJT. Previously,
More informationRadio Frequency Electronics
Radio Frequency Electronics Active Components IV Samuel Morse Born in 79 in Massachusetts Fairly accomplished painter After witnessing various electrical experiments, got intrigued by electricity Designed
More information6.776 High Speed Communication Circuits Lecture 7 High Freqeuncy, Broadband Amplifiers
6.776 High Speed Communication Circuits Lecture 7 High Freqeuncy, Broadband Amplifiers Massachusetts Institute of Technology February 24, 2005 Copyright 2005 by Hae-Seung Lee and Michael H. Perrott High
More informationEE105 Fall 2015 Microelectronic Devices and Circuits. Basic Single-Transistor Amplifier Configurations
EE05 Fall 205 Microelectronic Devices and Circuits Prof. Ming C. Wu wu@eecs.berkeley.edu 5 Sutardja Dai Hall (SDH 2- MOSFET Basic Single-Transistor Amplifier Configurations BJT 2-2 Two-Port Model of Amplifiers
More informationES 330 Electronics II Fall 2016
ES 330 Electronics II Fall 2016 Sect Lectures Location Instructor Office Office Hours Email Tel 001 001 9:00 am to 9:50 am Wednesday 10:00 am to 10 :50 am 2001 2001 Dr. Donald Estreich Dr. Donald Estreich
More informationRadivoje Đurić, 2015, Analogna Integrisana Kola 1
OTA-output buffer 1 According to the types of loads, the driving capability of the output stages differs. For switched capacitor circuits which have high impedance capacitive loads, class A output stage
More informationMulti-stage Amplifiers Prof. Ali M. Niknejad Prof. Rikky Muller
EECS 105 Spring 2017, Modue 4 Muti-stage Ampifiers Prof. Ai M. Niknejad Department of EECS Announcements HW10 due on Friday Lab 5 due this week 2 weeks of ecture eft! 2 Mutistage Ampifiers Why cascade
More informationLecture 12 OUTLINE. Cascode Stage (cont d) Current Mirrors Reading: Chapter 9.2. EE105 Fall 2007 Lecture 12, Slide 1 Prof.
Lecture 12 ANNOUNCEMENTS Review session: 3 5PM 5PMFriday (10/5)in 306Soda (HP Auditorium) Midterm #1 (Thursday 10/11, 3:30PM 5:00PM) location: 106 Stanley Hall: Students with last names starting with A
More informationIndex. Small-Signal Models, 14 saturation current, 3, 5 Transistor Cutoff Frequency, 18 transconductance, 16, 22 transit time, 10
Index A absolute value, 308 additional pole, 271 analog multiplier, 190 B BiCMOS,107 Bode plot, 266 base-emitter voltage, 16, 50 base-emitter voltages, 296 bias current, 111, 124, 133, 137, 166, 185 bipolar
More informationLecture #4 BJT AC Analysis
November 2014 Ahmad El-Banna Integrated Technical Education Cluster At AlAmeeria J-601-1448 Electronic Principals Lecture #4 BJT AC Analysis Instructor: Dr. Ahmad El-Banna Agenda BJT transistor Modeling
More informationSolid State Devices & Circuits. 18. Advanced Techniques
ECE 442 Solid State Devices & Circuits 18. Advanced Techniques Jose E. Schutt-Aine Electrical l&c Computer Engineering i University of Illinois jschutt@emlab.uiuc.edu 1 Darlington Configuration - Popular
More informationAnalysis and Design of Analog Integrated Circuits Lecture 8. Cascode Techniques
Analysis and Design of Analog Integrated Circuits Lecture 8 Cascode Techniques Michael H. Perrott February 15, 2012 Copyright 2012 by Michael H. Perrott All rights reserved. Review of Large Signal Analysis
More informationExperiment #7 MOSFET Dynamic Circuits II
Experiment #7 MOSFET Dynamic Circuits II Jonathan Roderick Introduction The previous experiment introduced the canonic cells for MOSFETs. The small signal model was presented and was used to discuss the
More informationElectronic Devices. Floyd. Chapter 6. Ninth Edition. Electronic Devices, 9th edition Thomas L. Floyd
Electronic Devices Ninth Edition Floyd Chapter 6 Agenda BJT AC Analysis Linear Amplifier AC Load Line Transistor AC Model Common Emitter Amplifier Common Collector Amplifier Common Base Amplifier Special
More informationLecture 20 Transistor Amplifiers (II) Other Amplifier Stages
Lecture 20 Transistor Amplifiers (II) Other Amplifier Stages Outline Common drain amplifier Common gate amplifier Reading Assignment: Howe and Sodini; Chapter 8, Sections 8.78.9 6.02 Spring 2009 . Common
More informationIn a cascade configuration, the overall voltage and current gains are given by:
ECE 3274 Two-Stage Amplifier Project 1. Objective The objective of this lab is to design and build a direct coupled two-stage amplifier, including a common-source gain stage and a common-collector buffer
More informationCarleton University. Faculty of Engineering and Design, Department of Electronics. ELEC 2507 Electronic - I Summer Term 2017
Carleton University Faculty of Engineering and Design, Department of Electronics Instructors: ELEC 2507 Electronic - I Summer Term 2017 Name Section Office Email Prof. Q. J. Zhang Section A 4148 ME qjz@doe.carleton.ca
More informationECE 255, MOSFET Amplifiers
ECE 255, MOSFET Amplifiers 26 October 2017 In this lecture, the basic configurations of MOSFET amplifiers will be studied similar to that of BJT. Previously, it has been shown that with the transistor
More informationANALOG FUNDAMENTALS C. Topic 4 BASIC FET AMPLIFIER CONFIGURATIONS
AV18-AFC ANALOG FUNDAMENTALS C Topic 4 BASIC FET AMPLIFIER CONFIGURATIONS 1 ANALOG FUNDAMENTALS C AV18-AFC Overview This topic identifies the basic FET amplifier configurations and their principles of
More informationElectronics Prof. D. C. Dube Department of Physics Indian Institute of Technology, Delhi
Electronics Prof. D. C. Dube Department of Physics Indian Institute of Technology, Delhi Module No # 05 FETS and MOSFETS Lecture No # 06 FET/MOSFET Amplifiers and their Analysis In the previous lecture
More informationLecture 7. ANNOUNCEMENTS MIDTERM #1 willbe held in class on Thursday, October 11 Review session will be held on Friday, October 5
Lecture 7 ANNOUNCEMENTS MIDTERM #1 willbe held in class on Thursday, October 11 Review session will be held on Friday, October 5 MIDTERM #2 will be held in class on Tuesday, November 13 OUTLINE BJT Amplifiers
More informationLecture 20 Transistor Amplifiers (II) Other Amplifier Stages. November 17, 2005
6.012 Microelectronic Devices and Circuits Fall 2005 Lecture 20 1 Lecture 20 Transistor Amplifiers (II) Other Amplifier Stages November 17, 2005 Contents: 1. Common source amplifier (cont.) 2. Common drain
More informationSingle-Stage Integrated- Circuit Amplifiers
Single-Stage Integrated- Circuit Amplifiers Outline Comparison between the MOS and the BJT From discrete circuit to integrated circuit - Philosophy, Biasing, etc. Frequency response The Common-Source and
More informationLecture 2, Amplifiers 1. Analog building blocks
Lecture 2, Amplifiers 1 Analog building blocks Outline of today's lecture Further work on the analog building blocks Common-source, common-drain, common-gate Active vs passive load Other "simple" analog
More informationF7 Transistor Amplifiers
Lars Ohlsson 2018-09-25 F7 Transistor Amplifiers Outline Transfer characteristics Small signal operation and models Basic configurations Common source (CS) CS/CE w/ source/ emitter degeneration resistance
More informationGOPALAN COLLEGE OF ENGINEERING AND MANAGEMENT Department of Electronics and Communication Engineering COURSE PLAN
Appendix - C GOPALAN COLLEGE OF ENGINEERING AND MANAGEMENT Department of Electronics and Communication Engineering Academic Year: 2016-17 Semester: EVEN COURSE PLAN Semester: VI Subject Code& Name: 10EC63
More informationMicroelectronic Devices and Circuits- EECS105 Final Exam
EECS105 1 of 13 Fall 2000 Microelectronic Devices and Circuits- EECS105 Final Exam Wednesday, December 13, 2000 Costas J. Spanos University of California at Berkeley College of Engineering Department of
More informationTransistor Digital Circuits
Recapitulation Transistor Digital Circuits The transistor Operating principle and regions Utilization of the transistor Transfer characteristics, symbols Controlled switch model BJT digital circuits MOSFET
More informationAnalog Integrated Circuit Configurations
Analog Integrated Circuit Configurations Basic stages: differential pairs, current biasing, mirrors, etc. Approximate analysis for initial design MOSFET and Bipolar circuits Basic Current Bias Sources
More informationSAMPLE FINAL EXAMINATION FALL TERM
ENGINEERING SCIENCES 154 ELECTRONIC DEVICES AND CIRCUITS SAMPLE FINAL EXAMINATION FALL TERM 2001-2002 NAME Some Possible Solutions a. Please answer all of the questions in the spaces provided. If you need
More informationPg: 1 VALLIAMMAI ENGINEERING COLLEGE SRM Nagar, Kattankulathur 603 203 Department of Electronics & Communication Engineering Regulation: 2013 Acadamic Year : 2015 2016 EC6304 Electronic Circuits I Question
More informationII/IV B. TECH. DEGREE EXAMINATIONS, NOVEMBER Second Semester EC/EE ELECTRONIC CIRCUIT ANALYSIS. Time : Three Hours Max.
Total No. of Questions : 9] [Total No. of Pages : 02 B.Tech. II/ IV YEAR DEGREE EXAMINATION, APRIL/MAY - 2014 (Second Semester) EC/EE/EI Electronic Circuit Analysis Time : 03 Hours Maximum Marks : 70 Q1)
More informationLecture 14. FET Current and Voltage Sources and Current Mirrors. The Building Blocks of Analog Circuits - IV
Lecture 4 FET Current and oltage s and Current Mirrors The Building Blocks of Analog Circuits n this lecture you will learn: Current and voltage sources using FETs FET current mirrors Cascode current mirror
More informationBJT Amplifier. Superposition principle (linear amplifier)
BJT Amplifier Two types analysis DC analysis Applied DC voltage source AC analysis Time varying signal source Superposition principle (linear amplifier) The response of a linear amplifier circuit excited
More informationLecture 030 ECE4430 Review III (1/9/04) Page 030-1
Lecture 030 ECE4430 Review III (1/9/04) Page 0301 LECTURE 030 ECE 4430 REVIEW III (READING: GHLM Chaps. 3 and 4) Objective The objective of this presentation is: 1.) Identify the prerequisite material
More informationUnit- I- Biasing Of Discrete BJT and MOSFET
Part- A QUESTIONS: Unit- I- Biasing Of Discrete BJT and MOSFET 1. Describe about BJT? BJT consists of 2 PN junctions. It has three terminals: emitter, base and collector. Transistor can be operated in
More informationEE105 Fall 2015 Microelectronic Devices and Circuits
EE105 Fall 2015 Microelectronic Devices and Circuits Prof. Ming C. Wu wu@eecs.berkeley.edu 511 Sutardja Dai Hall (SDH) 11-1 Transistor Operating Mode in Amplifiers Transistors are biased in flat part of
More informationAnalysis and Design of Analog Integrated Circuits Lecture 20. Advanced Opamp Topologies (Part II)
Analysis and Design of Analog Integrated Circuits Lecture 20 Advanced Opamp Topologies (Part II) Michael H. Perrott April 15, 2012 Copyright 2012 by Michael H. Perrott All rights reserved. Outline of Lecture
More informationLecture 25 - Frequency Response of Amplifiers (III) Other Amplifier Stages. December 8, 2005
6.012 Microelectronic Devices and Circuits Fall 2005 Lecture 251 Lecture 25 Frequency Response of Amplifiers (III) Other Amplifier Stages December 8, 2005 Contents: 1. Frequency response of commondrain
More informationMicroelectronics Circuit Analysis and Design
Microelectronics Circuit Analysis and Design Donald A. Neamen Chapter 3 The Field Effect Transistor Neamen Microelectronics, 4e Chapter 3-1 In this chapter, we will: Study and understand the operation
More informationMicroelectronic Circuits - Fifth Edition Sedra/Smith Copyright 2004 by Oxford University Press, Inc.
Feedback 1 Figure 8.1 General structure of the feedback amplifier. This is a signal-flow diagram, and the quantities x represent either voltage or current signals. 2 Figure E8.1 3 Figure 8.2 Illustrating
More informationRail-To-Rail Output Op-Amp Design with Negative Miller Capacitance Compensation
Rail-To-Rail Op-Amp Design with Negative Miller Capacitance Compensation Muhaned Zaidi, Ian Grout, Abu Khari bin A ain Abstract In this paper, a two-stage op-amp design is considered using both Miller
More informationvisit website regularly for updates and announcements
ESE 372: Electronics Spring 2013 Web site: www.ece.sunysb.edu/~oe/leon.html visit website regularly for updates and announcements Prerequisite: ESE 271 Corequisites: ESE 211 Text Books: A.S. Sedra, K.C.
More informationET475 Electronic Circuit Design I [Onsite]
ET475 Electronic Circuit Design I [Onsite] Course Description: This course covers the analysis and design of electronic circuits, and includes a laboratory that utilizes computer-aided software tools for
More informationd. Can you find intrinsic gain more easily by examining the equation for current? Explain.
EECS140 Final Spring 2017 Name SID 1. [8] In a vacuum tube, the plate (or anode) current is a function of the plate voltage (output) and the grid voltage (input). I P = k(v P + µv G ) 3/2 where µ is a
More informationANALYSIS AND DESIGN OF ANALOG INTEGRATED CIRCUITS
ANALYSIS AND DESIGN OF ANALOG INTEGRATED CIRCUITS Fourth Edition PAUL R. GRAY University of California, Berkeley PAUL J. HURST University of California, Davis STEPHEN H. LEWIS University of California,
More informationImproving Amplifier Voltage Gain
15.1 Multistage ac-coupled Amplifiers 1077 TABLE 15.3 Three-Stage Amplifier Summary HAND ANALYSIS SPICE RESULTS Voltage gain 998 1010 Input signal range 92.7 V Input resistance 1 M 1M Output resistance
More informationA High Gain and Improved Linearity 5.7GHz CMOS LNA with Inductive Source Degeneration Topology
A High Gain and Improved Linearity 5.7GHz CMOS LNA with Inductive Source Degeneration Topology Ch. Anandini 1, Ram Kumar 2, F. A. Talukdar 3 1,2,3 Department of Electronics & Communication Engineering,
More informationCHAPTER 11. Feedback. Microelectronic Circuits, Seventh Edition. Copyright 2015 by Oxford University Press
CHAPTER 11 Feedback Figure 11.1 General structure of the feedback amplifier. This is a signal-flow diagram, and the quantities x represent either voltage or current signals. Figure 11.2 Determining the
More informationWell we know that the battery Vcc must be 9V, so that is taken care of.
HW 4 For the following problems assume a 9Volt battery available. 1. (50 points, BJT CE design) a) Design a common emitter amplifier using a 2N3904 transistor for a voltage gain of Av=-10 with the collector
More informationPerformance Analysis of Low Power, High Gain Operational Amplifier Using CMOS VLSI Design
RESEARCH ARTICLE OPEN ACCESS Performance Analysis of Low Power, High Gain Operational Amplifier Using CMOS VLSI Design Ankush S. Patharkar*, Dr. Shirish M. Deshmukh** *(Department of Electronics and Telecommunication,
More informationINTRODUCTION TO ELECTRONICS EHB 222E
INTRODUCTION TO ELECTRONICS EHB 222E MOS Field Effect Transistors (MOSFETS II) MOSFETS 1/ INTRODUCTION TO ELECTRONICS 1 MOSFETS Amplifiers Cut off when v GS < V t v DS decreases starting point A, once
More informationMicroelectronic Circuits
SECOND EDITION ISHBWHBI \ ' -' Microelectronic Circuits Adel S. Sedra University of Toronto Kenneth С Smith University of Toronto HOLT, RINEHART AND WINSTON HOLT, RINEHART AND WINSTON, INC. New York Chicago
More informationSYLLABUS OSMANIA UNIVERSITY (HYDERABAD)
UNIT - 1 i SYLLABUS OSMANIA UNIVERSITY (HYDERABAD) JUNCTION DIODE Different Types of PN Junction Formation Techniques, PN Junction Characteristics, Biasing, Band Diagrams and Current Flow, Diode Current
More informationSingle-Stage BJT Amplifiers and BJT High-Frequency Model. Single-Stage BJT Amplifier Configurations
1 Single-Stage BJT Amplifiers and BJT High-Frequency Model Asst. Prof. MONTREE SIRIPRUCHYANUN, D. Eng. Dept. of Teacher Training in Electrical Engineering, Faculty of Technical Education King Mongkut s
More informationIFB270 Advanced Electronic Circuits
IFB270 Advanced Electronic Circuits Chapter 9: FET amplifiers and switching circuits Prof. Manar Mohaisen Department of EEC Engineering Review of the Precedent Lecture Review of basic electronic devices
More informationLecture (06) BJT Amplifiers 3
Lecture (06) BJT Amplifiers 3 By: Dr. Ahmed ElShafee 1 Current Gain 2 Power Gain The overall power gain is the product of the overall voltage gain (Av ) and the overall current gain (Ai). 3 THE COMMON
More informationBuilding Blocks of Integrated-Circuit Amplifiers
CHAPTER 7 Building Blocks of Integrated-Circuit Amplifiers Introduction 7. 493 IC Design Philosophy 7. The Basic Gain Cell 494 495 7.3 The Cascode Amplifier 506 7.4 IC Biasing Current Sources, Current
More informationReview Sheet for Midterm #2
Review Sheet for Midterm #2 Brian Bircumshaw brianb@eecs.berkeley.edu 1 Miterm #1 Review See Table 1 on the following page for a list of the most important equations you should know from Midterm #1. 2
More informationECE315 / ECE515 Lecture 7 Date:
Lecture 7 ate: 01.09.2016 CG Amplifier Examples Biasing in MOS Amplifier Circuits Common Gate (CG) Amplifier CG Amplifier- nput is applied at the Source and the output is sensed at the rain. The Gate terminal
More informationPartIIILectures. Multistage Amplifiers
University of missan Electronic II, Second year 2015-2016 PartIIILectures Assistant Lecture: 1 Multistage and Compound Amplifiers Basic Definitions: 1- Gain of Multistage Amplifier: Fig.(1-1) A general
More informationC H A P T E R 5. Amplifier Design
C H A P T E 5 Amplifier Design The Common-Source Amplifier v 0 = r ( g mvgs )( D 0 ) A v0 = g m r ( D 0 ) Performing the analysis directly on the circuit diagram with the MOSFET model used implicitly.
More informationGeorgia Institute of Technology School of Electrical and Computer Engineering. Midterm Exam
Georgia Institute of Technology School of Electrical and Computer Engineering Midterm Exam ECE-3400 Fall 2013 Tue, September 24, 2013 Duration: 80min First name Solutions Last name Solutions ID number
More informationChapter 12 Opertational Amplifier Circuits
1 Chapter 12 Opertational Amplifier Circuits Learning Objectives 1) The design and analysis of the two basic CMOS op-amp architectures: the two-stage circuit and the single-stage, folded cascode circuit.
More informationLast time: BJT CE and CB amplifiers biased by current source
Last time: BJT CE and CB amplifiers biased by current source Assume FA regime, then VB VC V E I B I E, β 1 I Q C α I, V 0. 7V Calculate V CE and confirm it is > 0.2-0.3V, then BJT can be replaced with
More informationANALYSIS AND DESIGN OF ANALOG INTEGRATED CIRCUITS
ANALYSIS AND DESIGN OF ANALOG INTEGRATED CIRCUITS Fourth Edition PAUL R. GRAY University of California, Berkeley PAUL J. HURST University of California, Davis STEPHEN H. LEWIS University of California,
More informationElectronic Circuits EE359A
Electronic Circuits EE359A Bruce McNair B206 bmcnair@stevens.edu 201-216-5549 Lecture 18 488 Class C operation 4 2 h( t) 0 2 4 0 0.2 0.4 0.6 0.8 t 0 ( ) 20 log A j 20 40 60 0 10 20 30 Cconduction_angle
More informationBasic Circuits. Current Mirror, Gain stage, Source Follower, Cascode, Differential Pair,
Basic Circuits Current Mirror, Gain stage, Source Follower, Cascode, Differential Pair, CCS - Basic Circuits P. Fischer, ZITI, Uni Heidelberg, Seite 1 Reminder: Effect of Transistor Sizes Very crude classification:
More informationAmplifiers Frequency Response Examples
ECE 5/45 Analog IC Design We will use the following MOSFET parameters for hand-calculations and the µm CMOS models for corresponding simulations. Table : Long-channel MOSFET parameters. Parameter NMOS
More informationChapter 4 Single-stage MOS amplifiers
Chapter 4 Single-stage MOS amplifiers ELEC-H402/CH4: Single-stage MOS amplifiers 1 Single-stage MOS amplifiers NMOS as an amplifier: example of common-source circuit NMOS amplifier example Introduction
More informationLab 4: Supply Independent Current Source Design
Lab 4: Supply Independent Current Source Design Curtis Mayberry EE435 In this lab a current mirror is designed that is robust against variations in the supply voltage. The current mirror is required to
More informationWhat is the typical voltage gain of the basic two stage CMOS opamp we studied? (i) 20dB (ii) 40dB (iii) 80dB (iv) 100dB
Department of Electronic ELEC 5808 (ELG 6388) Signal Processing Electronics Final Examination Dec 14th, 2010 5:30PM - 7:30PM R. Mason answer all questions one 8.5 x 11 crib sheets allowed 1. (5 points)
More informationCSE 577 Spring Insoo Kim, Kyusun Choi Mixed Signal CHIP Design Lab. Department of Computer Science & Engineering The Penn State University
CSE 577 Spring 2011 Basic Amplifiers and Differential Amplifier, Kyusun Choi Mixed Signal CHIP Design Lab. Department of Computer Science & Engineering The Penn State University Don t let the computer
More informationITT Technical Institute. ET215 Devices 1. Chapter
ITT Technical Institute ET215 Devices 1 Chapter 4.6 4.7 Chapter 4 Section 4.6 FET Linear Amplifiers Transconductance of FETs The output drain current is controlled by the input signal voltage. As we earlier
More informationIntegrated Circuit Amplifiers. Comparison of MOSFETs and BJTs
Integrated Circuit Amplifiers Comparison of MOSFETs and BJTs 17 Typical CMOS Device Parameters 0.8 µm 0.25 µm 0.13 µm Parameter NMOS PMOS NMOS PMOS NMOS PMOS t ox (nm) 15 15 6 6 2.7 2.7 C ox (ff/µm 2 )
More informationMASSACHUSETTS INSTITUTE OF TECHNOLOGY Department of Electrical Engineering and Computer Science Microelectronic Devices and Circuits Fall 2009
1 MASSACHUSETTS INSTITUTE OF TECHNOLOGY Department of Electrical Engineering and Computer Science 6.012 Microelectronic Devices and Circuits Fall 2009 SPECIAL PROBLEM ON CIRCUIT DESIGN 12/1/09 edition
More informationES 330 Electronics II Homework # 2 (Fall 2016 Due Wednesday, September 7, 2016)
Page1 Name ES 330 Electronics II Homework # 2 (Fall 2016 Due Wednesday, September 7, 2016) Problem 1 (15 points) You are given an NMOS amplifier with drain load resistor R D = 20 k. The DC voltage (V RD
More informationChapter 4. CMOS Cascode Amplifiers. 4.1 Introduction. 4.2 CMOS Cascode Amplifiers
Chapter 4 CMOS Cascode Amplifiers 4.1 Introduction A single stage CMOS amplifier cannot give desired dc voltage gain, output resistance and transconductance. The voltage gain can be made to attain higher
More informationESE319 Introduction to Microelectronics High Frequency BJT Model & Cascode BJT Amplifier
High Frequency BJT Model & Cascode BJT Amplifier 1 Gain of 10 Amplifier Non-ideal Transistor C in R 1 V CC R 2 v s Gain starts dropping at > 1MHz. Why! Because of internal transistor capacitances that
More informationFully integrated CMOS transmitter design considerations
Semiconductor Technology Fully integrated CMOS transmitter design considerations Traditionally, multiple IC chips are needed to build transmitters (Tx) used in wireless communications. The difficulty with
More information