Lecture 33: Context. Prof. J. S. Smith

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1 Lecture 33: Prof J. S. Smith Context We are continuing to review some of the building blocks for multi-stage amplifiers, including current sources and cascode connected devices, and we will also look at the general objectives of multi-state amplifier configurations. 1

2 Reading Chapter 9, multi-stage amplifiers Lecture Outline Current Mirrors An Example Using Cascodes Multistage Amps Example 1: Cascode Amp Design Example 2: Two Stage CS Amp 2

3 Current Sinks and Sources Sink: output current goes to ground Source: output current comes from voltage supply Current Mirrors We only need one reference current to set up all the current sources and sinks needed for a multistage amplifier. 3

4 Multistage Amplifiers Necessary to meet typical specifications for any of the 4 types We have 2 flavors (NMOS, PMOS) of CS, CG, and CD and the npn versions of CE, CB, and CC (for a BiCMOS process) What are the constraints? 1. Input/output resistance matching 2. DC coupling (no passive elements to block the signal) Summary of Cascaded Amplifiers General goals: 1. Boost the gain parameter (except for buffers) 2. Optimize the input and output resistances Voltage: Current: Transconductance: R in 0 R out 0 Transresistance: 0 0 4

5 Start: Two-Stage Voltage Amplifier Use two-port models to explore whether the combination works CE 1 CE 2 CE 1,2 Results of new 2-port: R in = R in1, R out = R out2 ( ) ( ) A = G R R G R v m1 in2 out1 m2 out 2 ( )( ) A = G G R R R v m1 m2 in2 out1 out 2 Add a Third Stage: CC Goal: reduce the output resistance (important spec. for a voltage amp) CE 1 CE 2 CC 3 Output resistance: R out 1 R 1 r r = + = + g β g β S o2 oc2 m3 m3 5

6 Using CMOS Stages CS 1 CS 2 CD 3 Input resistance: Voltage gain (2-port parameter): Output resistance: ( ) ( ) A = g r r g r r v m1 o1 oc1 m2 o2 oc2 R out = g m 1 + g mb Multistage Current Buffers Are two cascaded common-base stages better than one? CB 1 CB 2 Input resistance: R in = R in1 6

7 Two-Port Models R out = R ( 1+ gm2rπ 2 RS 2 ) roc2 out 2 r02 Output impedance of stage #1 (large) ( ) ( β ) R r g r r = r r out 02 m2 π 2 oc2 o o2 oc2 Common-Gate 2 nd Stage R = R + out ( 1 gm2rs 2 ) roc2 out 2 r02 ( ) R = R r 1 + g r r r out out 2 02 m2 o1 oc1 oc2 7

8 Second Design Issue: DC Coupling Constraint: large inductors and capacitors are not available Output of one stage is directly connected to the input of the next stage must consider DC levels why? 3.2V Alternative CG-CC Cascade Use a PMOS CD Stage: DC level shifts upward 3.2V 8

9 CG Cascade: DC Biasing Two stages can have different supply currents Extreme case: I BIAS2 = 0 A CG Cascade: Sharing a Supply First stage has no current supply of its own its output resistance is modified 9

10 The Cascode Configuration Common source / common gate cascade is one version of a cascode (all have shared supplies) DC bias: Two-port model: first stage has no current supply of its own Cascode Two-Port Model CS 1 * CG 2 R = R = r Output resistance of first stage = * down, CS o1 out, CS R r (1 + g r ) r out oc2 m o1 o2 G = g m m1 R in = Why is the cascode such an important configuration? 10

11 Miller Capacitance of Input Stage Find the Miller capacitance for C gd1 Input resistance to common-gate second stage is low gain across C gd1 is small. CG Cascade: DC Biasing Two stages can have different supply currents Extreme case: I BIAS2 = 0 A 11

12 CG Cascade: Sharing a Supply First stage has no current supply of its own its output resistance is modified The Cascode Configuration Common source / common gate cascade is one version of a cascode (all have shared supplies) DC bias: Two-port model: first stage has no current supply of its own 12

13 Cascode Two-Port Model CS 1 * CG 2 R = R = r Output resistance of first stage = * down, CS o1 out, CS R r (1 + g r ) r out oc2 m o1 o2 G = g m m1 R in = Why is the cascode such an important configuration? Miller Capacitance of Input Stage Find the Miller capacitance for C gd1 Input resistance to common-gate second stage is low gain across C gd1 is small. 13

14 Two-Port Model with Capacitors C = ( 1 A ) C 1 gd Miller capacitance: M vc 1 1 A g r = m1 vc 1 1( 1) 1 gd m o g m2 g = m2 gd g C M = 2C gd1 Generating Multiple DC Voltages Stack-up diode-connected MOSFETs or BJTs and run a reference current through them pick off voltages from gates or bases as references 14

15 Multistage Amplifier Design Examples Start with basic two-stage transconductance amplifier: Why do this combination? Current Supply Design Output resistance goal requires large r oc use cascode current source 15

16 Totem Pole Voltage Supply DC voltages must be set for the cascode current supply transistors M 3 and M 4, as well as the gate of M 2. Why include M 2B? Complete Amplifier Schematic Goals: g m1 = 1 ms, R out =10 MΩ 16

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