4.2.2 Metal Oxide Semiconductor Field Effect Transistor (MOSFET)

Transcription

1 4.2.2 Metal Oxide Semiconductor Field Effect Transistor (MOSFET) The Metal Oxide Semitonductor Field Effect Transistor (MOSFET) has two modes of operation, the depletion mode, and the enhancement mode. In the following section, a brief explanation for each mode is presented Depletion Mode (MOSFET) Fig.(4.14-a,b) shows the basic construction of a depletion mode N-channel MOSFET with its biasing condition. The gate is insulated with a thin layer of silicon dioxide which is simply a glass, and is called insulated-gate field effect transistor, and the transistor is called a metal-oxide-semiconductor FET, or MOSFET. a. Negative Gate oltage b. Positive Gate oltage Fig.(4.14) Basic Structure With Biasing Of A Depletion Mode N-Channel MOSFET. Fig.(4.15-a) shows a set of typical characteristic curves of a depletion MOSFET for the drain-source current IDS as a function of the voltage DS for a range of gate voltages, GS. When the gate-source voltage GS equal zero, the channel will conduct a drain current ID according to the drain-source voltage DS. When GS increases, ID also increases, and when GS decreases, ID decreases as shown in Fig.(4.15-b). 37

2 Fig.(4. 15) Characteristic Curves Of An N-Channel Depletion Mode MOSFET Enhancement Mode N-Channel MOSFET It is called N-channel because the conduction in the channel is due to N type charge carriers and it is said to be an ``enhancement mode'' because the channel conduction is enhanced by a charge applied to the gate. Fig.(4.16) shows the basic structure of an N-channel enhancement mode MOSFET and its biasing condition. a.basic Structure b. Biasing Condition Fig.(4.16) N-Channel Enhancement Mode MOSFET. Fig.(4.17) shows the schematic symbol of the N-channel and P-channel enhancement MOSFET transistor. a. N-Channel b. P-Channel Fig.(4.17) schematic symbols of the enhancement MOSFET Transistor 38

3 Fig.(4.18-a) shows a set of typical characteristic curves of the drain current I D with the drain-source voltage DS of an enhancement MOSFET for a range of gate-source voltage GS. When GS equal zero, the drain current I D is zero. As GS becomes positive, the drain current increases as shown in Fig.(4.18-b). Fig.(4.18) Characteristic Curves Of The Enhancement Mode MOSFET. Advantages Of A MOSFET The input impedance is very high, about Ohm. The output impedance is about the same as a bipolar transistor. Application Of MOSFETs Drivers for high power devices. In complimentary pairs (CMOS), they are used in hi-fi power amplifiers. In integrated circuits, they can be made very compact. It can be used as a switch. 4.3 Data Sheet For Transistor When you look at a data sheet for either type of transistor you should start with the maximum ratings because these are the limits on the transistor currents, voltages, and other quantities. 39

4 a. Transistor 2N3904 Description This transistor is designed as a general purpose amplifier and switch. The useful dynamic range extends to 100 ma as a switch and with bandwidth 100 MHz as an amplifier. At this level of current, the minimum current gain is 100 and the maximum current gain is 300. Most of the transistors will have a current gain in the middle of this range. The derating factor tells you how much you have to reduce the power rating of a device. The derating factor of the transistor 2N3904 is given as 5mW/ o C. This means that you have to reduce the power rating of 625 mw by (5 mw for each degree above 25 o C). Absolute Maximum Ratings CB 60 ( CB is the voltage between the collector and the base). CEO 40 (the voltage from collector to emitter with the base open). EB 6 (the voltage from the emitter to the base). I C 200 ma dc P D 625 mw (for T A = 25 o C ) P D 1.5W (for T C = 25 o C ) b. Data Sheet For FET (N-Channel SST4117A Series) Description The SST4117A series of N-channel JFETs provide ultra-high input impedance. These devices are specified with a 1-pA limit and typically operate at 0.2 pa. This makes them perfect choices for use as high-impedance. The plastic package provides a low-cost option and surface-mount capability. Features High input impedance. Surface-mount capability. Absolute Maximum Ratings Gate-Source / Gate-Drain oltage 40 40

5 Forward Gate Current: 50 ma Storage Temperature : (2N Prefix) 65 o to 175 o C Operating Junction Temperature : (2N Prefix) 55 o to 175 o C Lead Temperature (1/16 from case for 10 sec.) 300 o C Power Dissipation (case 25 o C) : a 300 mw. 4.4 Summary The two main classes of transistors are the bipolar transistor and the field effect transistor. The bipolar transistor consists of a pair of P-N junction diodes that are joined back-to-back, and has two types, the NPN and PNP. It consists of three layers of silicon with three terminals called, Emitter, Base, and Collector and its basic properties are similar to diode. For NPN, biasing is verified as follows: the emitterbase junction is forward biased, and the base-collector junction is reverse biased and when biasing the PNP transistor, we just reverse the polarities of the applied voltages and the directions of the currents. The emitter current IE is equal to the sum of the collector current IC, and the base current IB. The current gain (Beta β or hfe) is defined as the ratio between the collector and base currents. From the characteristic curves of the bipolar transistor it has been shown that for each curve, how the collector current, I C, varies with the collector-emitter voltage, CE, for a specific value of the base current I B. When the applied voltage CE is large enough, we get a collector current I C which is set by the base-emitter voltage and we observe a current gain. When we reduce the applied voltage CE, this reduces the overall flow of current through the transistor. When we lower the applied voltage CE, the collector current I C falls towards zero. The load line is produced between IC (at CE=0) and CE (at IC=0 ) and the intersection of the load line with each IB curve specifies the operating point ( IC, CE) for the transistor. The basic transistor circuits are the common-emitter, common-collector, and common-base. The common-emitter configuration has the signal source and the load share the emitter of the transistor as a common connection point. The common collector configuration, often called emitter follower since its output is taken from the emitter resistor, and it is useful as an impedance matching device since its input impedance is much higher than its output impedance. The common-base configuration has the signal source and the load share the base of the transistor as a common connection point. In the common-base 41

6 configuration, we follow another basic transistor parameter the ratio between collector current and emitter current, which is a fraction always less than 1. This fractional value is called the alpha ratio ( α ratio ). Field Effect Transistors (FET) are voltage-controlled devices and its main types are the Junction Field Effect Transistor (JFET) and the Metal Oxide Semiconductor Field Effect Transistor (MOSFET) which has two modes of operation, the depletion mode and the enhancement mode. The junction field effect transistor (JFET) has three terminals, the Drain, Source and Gate, and has two types, N-channel and P-channel. For N-channel JFET, when GS =0, the current through the JFET reaches a maximum value IDSS, and when the gate is reverse-biased, the drain current decreases. This means that the current ID is controlled by the voltage GS. The Metal Oxide Semitonductor Field Effect Transistor (MOSFET) has two modes of operation, the depletion mode and the enhancement mode. The characteristic curves of the depletion mode N-channel MOSFET give the following properties. When the gate-source voltage GS is equal zero, the channel will conduct the drain current ID according to the drain-source voltage DS. When GS is positively increase ID increases, and when GS is negatively decrease ID decreases. The characteristic curves of the enhancement mode N-channel MOSFET give the following properties. When GS equal zero, the drain current ID is zero. As GS becomes positive, the drain current increases. The MOSFET has the advantages of high input impedance, and has many applications such as drivers for high power devices, used in hi-fi power amplifiers, in integrated circuits, they can be made very compact, and can be used as a switch. 4.5 Questions 1. Explain the construction of an NPN and PNP transistor. 2. Draw the I- characterisitcs of the NPN transistor. 3. Write the relation of currents for the bipolar transistor and current gain relation. 4. Explain how to make test on the NPN and PNP transistors. 42

7 5. Explain the biasing conditions of an NPN transistor. 6. What are the basic bipolar transistor circuits? 7. Draw the structure of the n-channel JFET and its symbol. 8. Explain the biasing conditions of the N-channel JFET. 9. Draw the I- characteristics of the N-channel JFET. 10. Explain the biasing conditions of the N-channel depletion MOSFET. 11. Draw the I- characteristics of the N-channel depletion MOSFET. 12. Explain the biasing conditions of the N-channel enhancement MOSFET. 13. Draw the I- characteristics of the N-channel enhancement MOSFET. 14. What are the important parameters when you choose transistor? **************** 43

8 Chapter Five Operational Amplifiers 5.1 Introduction The term operational amplifier or "op-amp" refers to a class of high-gain ( o / i ) amplifiers on the order of The operational amplifier performs mathematical operations such as inverting, non-inverting, summing, subtraction, integration, differentiation, etc. 5.2 Operational Amplifier Characteristics The famous modern integrated circuit version is IC 741 op-amp. It has two inputs and a single output. Some of the general characteristics of the IC version are: High Gain. High input impedance, low output impedance Used with supply voltage, usually (+/- 15). It has the following input/output parameters a. Input Parameters 1. Input Offset oltage This is the voltage that must be applied to one of the input pins to give a zero output voltage. (for an ideal op-amp, input offset voltage is zero). 2. Input Bias Current This is the average current applied to both inputs. Ideally, the two input bias currents are equal. 3. Input Offset Current This is the difference of the two input bias currents when the output voltage is zero. 4. Input oltage Range The range of the common-mode input voltage (i.e. the voltage common to both inputs and ground). 5. Input Resistance The resistance looking-in at either input with the remaining input grounded. 44

9 b. Output Parameters 1. Output Resistance The resistance seen looking into the op-amp's output. 2. Output Short-Circuit Current This is the maximum output current that the op-amp can deliver to a load. 3. Maximum Output oltage This is the maximum 'peak' output voltage that the op-amp can supply without saturation or clipping. Ideal Parameters of the OP/AMP are as follows Open loop gain is. Input impedance Zi =. Output impedance Zo = 0. Bandwidth (B.W) =. The relation between output and input voltages is given by: o = A. i = A. ( + - -) Where, + is the non-inverting input voltage. - is the inverting input voltage. A is the open loop gain. Fig.(5.1) shows the symbol of operational amplifier. Fig.(5.1) The Symbol Of The Operational Amplifier 45

10 5.3 Some Applications Of OP/AMP The operational amplifier has many linear and nonlinear applications. In the following sections, some of these applications such as inverting, non-inverting, voltage follower, summing, difference, integrator, differentiator Inverting And Non-Inverting Amplifier a. Inverting Amplifier Fig.(5.2) shows the circuit of an inverting amplifier. The inverting amplifier gain is given simply by : o i R = f R 1 Fig.(5.2) Inverting Amplifier Circuit When R1 = Rf, it has a gain of -1, and is used in digital circuits as an inverting buffer. B. Non-Inverting Amplifier Fig.(5.3) shows the circuit of a non-inverting amplifier. Its gain is given by : o i R = 1+ R f 1 Fig.(5.3) Non-Inverting Amplifier Circuit 46

11 5.3.2 oltage Follower Fig.(5.4) shows the circuit of a voltage follower using operational amplifier. The voltage follower with an ideal op amp gives: o = i This circuit is very useful where the input impedance of the operational amplifier is very high, giving effective isolation of the output from the signal source. Fig.(5.4) oltage Follower Summing And Difference Amplifier a. Summing Amplifier Fig.(5.5) shows the summing amplifier circuit. It is an example of an inverting amplifier of gain=1 with multiple inputs. The output has the following relation: Fig.(5.5) Summing Amplifier Circuit When (Rf = R1 = R2 = R3), the output is the inversion of the sum without amplification. When the input resistors are unequal, it gives a weighted sum. 47

12 B. Differential Amplifier Fig.(5.6) shows the differential amplifier circuit. Amplifier uses both inverting and non-inverting inputs with a gain of one to produce an output equal to the difference between the inputs as follows: o = 2 1 Fig.(5.6) Differential Amplifier Circuit Integrator And Differentiator a. Integrator Fig.(5.7) shows an integrator circuit using operational amplifier. The output is given by: When a square wave is applied to the input, the output will be a triangular waveform depending on the value of RC. Fig.(5.7) Integrator Circuit Place a resistor in parallel with the capacitor to avoid saturation due to very low frequency or DC signals. 48

13 b. Differentiator Fig.(5.8) shows a differentiator circuit using operational amplifier. The output is given by: When a triangular wave to the input, the output will be a square wave depending on the value of RC. Fig.(5.8) Differentiator Circuit 5.4 Data Sheet For The Operational Amplifier Features Short circuit protection Excellent temperature stability Internal frequency compensation High Input voltage range Null of offset Description The LM741 series are general purpose operational amplifi-ers. It is intended for a wide range of analog applications. The high gain and wide range of operating voltage provide superior performance in intergrator, summing amplifier, and general feedback applications. Fig.(5.9) shows the internal block diagram of LM

14 Fig.(5.9) Internal Block Diagram Of LM741 Absolute Maximum Ratings (TA = 25 C) Supply oltage CC ±18 Differential Input oltage 30 Input oltage I ±15 Power Dissipation 500 mw Operating Temperature Range + 70 C Storage Temperature Range -65 ~ C 5.5 Summary The operational amplifier is a high-gain amplifier, it performs mathematical operations such as inverting, non-inverting, summer, difference, integration, differentiation. Its chatacteristics are high gain, high input impedance, low output impedance, and high bandwidth. Its input parameters are input offset voltage, input bias current, input offset current, input voltage range, input resistance. Its output parameters are output resistance, output short-circuit current, maximum output voltage. The ideal parameters are the open loop gain is infinity, the input impedance is infinity, the output impedance is zero, and the bandwidth is infinity. The modern integrated circuit version is the IC 741 op-amp, it has two inputs and a single output, and is supplied with +/- 15. Some of operational amplifier applications are represented. 50

15 The inverting amplifier gain is given by o i R = f R 1 The non-inverting gain is given by o i = 1+ R R f 1 where, Rf is the feedback resistance and R1 is the weighted resistance. The voltage follower is given by: o = i The output of the three summing input 1, 2, 3 is given by: where, Rf is the feedback resistance and R1, R2, and R3 are the weighted resistances. The differential amplifier without amplification is given by: o = 2 1 The output of the integrator is given by: The output of the differentiator is given by: 5.6 Questions 1. What are the main characteristics of the operational amplifier? 2. Draw the circuit of the inverting amplifier and give its voltage gain for different feedback resistance Rf, and show when the output waveform is clipped. 3. Draw the circuit of the non-inverting amplifier and give its voltage gain for different values of feedback resistance Rf, and show when the output waveform is clipped. 4. Draw the circuit of a voltage follower and give its voltage gain. 51

16 5. Draw the circuit of the summing amplifier, if the two inputs 1= +2 and 2 = +3, calculate its output voltage assuming that the weighted resistance are equal with Rf = 1 Kohm. 6. Draw the circuit of the differential amplifier, if the voltage at the non-inverting input 2 = +5 and the voltage at the inverting input is 1 = +1, calculate its output voltage assuming that the all resistances are equal to 1 Kohm. 7. Draw the circuit of the integrator, with C = 0.1 uf and R= 10 Kohm, and Rf = 100 Kohm. Show the output waveform for a square wave input at different frequencies. Also, show the output waveform for a sine wave input at different frequncies. 8. Draw the circuit of the differentiator, with C=0.1 uf and R=10 Kohms, and Show the output waveform for a triangular wave input at different frequencies. Also, show the output waveform for a sine wave input at different frequencies. ******************* 52