Lecture 20 Transistor Amplifiers (II) Other Amplifier Stages

Transcription

1 Lecture 20 Transistor Amplifiers (II) Other Amplifier Stages Outline Common drain amplifier Common gate amplifier Reading Assignment: Howe and Sodini; Chapter 8, Sections Spring 2009

2 . Common drain amplifier V DD signal source R S v s signal load i SUP v OUT RL V BIAS V SS A voltage buffer takes the input voltage which may have a relatively large Thevenin resistance and replicates the voltage at the output port, which has a low output resistance Input signal is applied to the gate Output is taken from the source To first order, voltage gain Input resistance is high Output resistance is low Effective voltage buffer stage How does it work? v gate i D cannot change v source Source follower 6.02 Spring

3 Biasing the Common drain amplifier V DD signal source R S v s V BIAS V SS i SUP v OUT signal load RL V SS Assume device in saturation; neglect R S and R L ; neglect CLM (λ = 0) Obtain desired output bias voltage Typically set V OUT to halfway between V SS and V DD. Output voltage maximum V DD V DSsat Output voltage minimum set by voltage requirement across I SUP. V BIAS = V GS V OUT V GS = V Tn (V SB ) I SUP W 2L µ n C ox 6.02 Spring

4 Small signal Analysis Unloaded small signal equivalent circuit model: G D g m v gs r o S v in r oc vout v gs v in gm v gs r o //r oc v out Then: v in = v gs v out v out = g m v gs (r o // r oc ) A vo = g m g m r o // r oc 6.02 Spring

5 Input and Output Resistance Input Impedance : R in = Output Impedance: R S v gs v in gm v gs r o //r oc v t v in = 0; v t = v gs effectively: resistance of value /g m g m v t r o //r oc v t Small! R out = g m r o // r oc g m Loaded voltage gain: A v = A vo R L R L R out R L R L g m 6.02 Spring

6 Effect of Back Bias If MOSFET was not fabricated in an isolated p well, then body is tied to wafer substrate (connected to V SS ) V DD signal source R S V SS signal load v s i SUP RL v OUT V BIAS Two consequences: V SS Bias is affected V T depends on V BS V BS = V SS V OUT 0 Small signal figures of merit affected Signal shows up between B and S v bs = v out 6.02 Spring

7 Small signal Analysis (with back bias) See text pp for details G D g m v gs g mb v bs r o S v in B r oc vout v bs =v out v gs v in gm v gs g mb v out r o //r oc v out A vo = g m g m g mb r o // r oc g m g m g mb < Also: R out = g m g mb r o // r oc g m g mb 6.02 Spring

8 Common Drain Two Port Model (g m g mb ) v in g m (g m g mb ) v in v out Open circuit voltage gain ~ Input resistance ~ CS Amplifier We want a large input resistance because the controlled generator is voltage controlled Output resistance << CS Amplifier We want a low output resistance to deliver most of the output voltage to the load 6.02 Spring

9 Relationship between circuit parameters and device parameters: W g m = 2I D µ n C L ox γ g mb = 2 2φ p V BS g m Circuit Parameters Device* A vo R in R out g Parameters m g m g mb g m g mb I SUP W µ n C ox L * V BIAS is adjusted so that none of the other parameters change Common Drain amplifier is often used as a voltage buffer to drive small output loads (in multistage amplifiers, other stages provide the voltage gain) Spring

10 2. Common Gate Amplifier: V DD i OUT signal load signal source V SS R L i s R S I BIAS A current buffer takes the input current which may have a relatively small Norton resistance and replicates the current at the output port, which has a high output resistance Input signal is applied to the source Output is taken from the drain To first order, current gain i s i out.(current Buffer) Input resistance is low V SS Output resistance is high Effective current buffer stage 6.02 Spring

11 Biasing the Common Gate Amplifier: Assume device in saturation; neglect R S and R L ; neglect CLM (λ = 0) V DD I SUP I OUT V SS I BIAS I SUP I OUT I BIAS = 0 V SS Select bias such that I OUT =0 V OUT = 0. Assume MOSFET in saturation (no channel modulation): I D = W 2L µ n C ox ( V GS V T ) 2 = I SUP = I BIAS But V T depends on V BS : V T = V To γ n ( 2φ p V BS 2φ p ) Must solve these two equations iteratively Spring 2009

12 Small signal equivalent circuit (unloaded) i D out G v gs g m v gs g mb v bs ro B S r oc i s v bs =v gs i out is v gs gm v gs g mb v gs r o i out i s g m g mb r o = i out A io = i out = A io is the short circuit current gain. Not surprising, since in a MOSFET: i g = Spring

13 Input Resistance v gs g m v gs g mb v gs ro r oc R L v t v gs =v t g m v t g mb v t r o v t r oc //R L Do KCL on input node: g m v t g mb v t v t ( r oc // R L ) = 0 r o Then: R in = v t = r oc // R L r o g m g mb r o g m g mb 6.02 Spring

14 Output Resistance v gs g m v gs g mb v gs ro r oc v t R S v gs g m v gs g mb v gs ro ' R S v t ' Do KCL on input node: Notice also: Then: g m v gs g mb v gs v gs = R s v t v gs = 0 r o R out = r oc // r o R s g m g mb r o R out r oc //[ r o ( g m R s )] r oc // ( g m r o )R s [ ] 6.02 Spring

15 Common Gate Two Port Model i in i out g m g mb i in r oc (r o g m r o R S ) The output resistance depends on the source resistance The CG current buffer is not unilateral Input resistance << CS Amplifier We want a small input resistance because the controlled generator is current controlled Output resistance >> CS Amplifier We want a large output resistance to deliver most of the output current to the load 6.02 Spring

16 Relationship between circuit figures of merit and device parameters: W g m = 2I D µ n C ox L γ g mb = g m 2 2φp V BS r o λ n I D Circuit Parameters Device* A io R in R out Parameters r oc //[r o ( g m R s )] g m g mb I SUP W µ n C ox L * V BIAS is adjusted so that none of the other parameters change Common Gate amplifier is often used as a current buffer i.e. transform a current source with medium source resistance to an equal current with high source resistance (in multistage amplifiers, other stages provide the current gain) Spring

17 What did we learn today? Summary of Key Concepts Common source amplifier: good voltage amplifier better transconductance amplifier Large voltage gain High input resistance Medium / high output resistance Common drain amplifier: good voltage buffer Voltage gain High input resistance Low output resistance Common gate amplifier: good current buffer Current gain Low input resistance High output resistance 6.02 Spring

18 MIT OpenCourseWare Microelectronic Devices and Circuits Spring 2009 For information about citing these materials or our Terms of Use, visit: