ECE315 / ECE515 Lecture 7 Date:
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1 Lecture 7 ate: CG Amplifier Examples Biasing in MOS Amplifier Circuits
2 Common Gate (CG) Amplifier CG Amplifier- nput is applied at the Source and the output is sensed at the rain. The Gate terminal is used for establishing appropriate bias conditions for the transistor. ts characteristic can be studied through large-signal behavior as well. For large in i.e. for in > b T : M 1 is off and therefore: out = For lower in : C W L n ox b in T 1 W R C 2 R 2 L out n ox b in T W C R in L out Then small signal gain is: 1 T n ox b in T in
3 Common Gate (CG) Amplifier (contd.) Since, T in = T SB = η: out 1 in A g 1 R v m W C R L n ox b in T Non-inverting Amplifier Higher as compared to CS stage KL in loop-1: KL in loop-2: out 1 RS in 0 R r g g R out ( gm gmb) ro 1 Av R r ( g g ) r R R R in o m mb o S S out out out o m 1 mb 1 S in R R
4 CG Amplifier (contd.) out ( gm gmb) ro 1 Av r ( g g ) r R R R in o m mb o S S R Non-inverting with slightly higher value as compared to the CS stage body effect is useful in this scenario f the resistor R is replaced by a current source then: out Av ( gm gmb) ro 1 R for an ideal current source in Let us look at small-signal model without channel length modulation and biased with a constant current source KL in loop-1: v1 v in 0 KCL at this node out ( gm gmb) 1 0 R out A ( g g ) R g (1 ) R v m mb m in
5 CG Amplifier (contd.) nput mpedance: R Case-: R 0 in R in KL in loop-1: 1 X X R ro R 1 1 ( g g ) r ( g g ) r ( g g ) X m mb o m mb o m mb X ro 1 ( g g ) r X m mb o KL in loop-2: R r ( g g ) X o X m mb X X Case-: R is an ideal current source ie, R Rin t is apparent that the input impedance of common-gate stage is low only if the load impedance connected to the drain is low
6 CG Amplifier (contd.) Output mpedance: R 1 ( g g ) r R r R out m mb o S o Example 1 erive the small-signal voltage gain expression for this amplifier. Consider the cases when channel length modulation are absent and present.
7 Example 1 (contd.) Case-: λ = 0 both for M 1 and M 2 n such a case M 2 presents a degenerating impedance of 1/g m2 to a single stage CS amplifier as shown below. 1 gm in g m1 1 1 gm2 gm2 1 g m 2 out m1 1 R g Simplification gives: 1 1 g R out m g. g R g g m2 in out m1. m2 m1 A v R 1 1 g g m1 m2
8 Example 1 (contd.) Case-: λ = 0 for M 1 and λ 0 for M 2 n such a case M 2 presents a degenerating impedance of (1/g m2 r o2 ) as shown below. 1 g m2 r o2 1 g 1 1 in 1 gm 1 1. ro gm 1 ro 2 g m2 g m2 m2 r o2 out m1 1 R g Simplification gives: A v R 1 1 g g m1 m2 r o2
9 Example 1 (contd.) Case-: λ = 0 for M 2 and λ 0 for M 1 n such a case the small signal model looks like: gm11 r o1 1 g m 2
10 Example 2 erive expression for the small-signal voltage gain of the following circuit. (Assume: λ 0 for both M 1 and M 2. Neglect body effect) Gate and Source are fixed. Therefore this NMOS works as a constant current source with an impedance r o2 across its drain and source KL in loop-1 in 1 out KL in loop-2 g ( r r ) m1 1 o1 o2 out g ( )( r r ) m1 in out o1 o2 out ( r r ) out o1 o2 Av in 1 ( ro 1 ro2) g m1
11 Example 3 What is R out in the following circuit. (Assume: λ 0 for both M 1 and M 2 and both are in saturation.) Gate and Source are fixed. Therefore this NFET works as a constant current source with an impedance r o2 across its drain and source KL in loop-1 r 1 X o2 KL in loop-2 r ( g g ) r X X o2 X m1 1 mb1 1 o1 X r r r ( g r g r ) R X o2 o1 o1 m1 o2 mb1 o2 out
12 Biasing using Single Power Supply The general form of a single-supply MOSFET amplifier biasing circuit is: We typically attempt to satisfy three main bias design goals: 1) Maximize Gain Typically, the small-signal voltage gain of a MOSFET amplifier will be proportional to transconductance g m. Thus, to maximize the amplifier voltage gain, we must maximize the MOSFET transconductance. Q: What does this have to do with.c. biasing? A v g m A: Recall that the transconductance depends on the C excess gate voltage: g 2K m GS T Another way to consider transconductance is to express it in terms of C drain current.
13 And so transconductance can be alternatively expressed as: Biasing using Single Power Supply (contd.) Recall this C current is related to the C excess gate voltage (in saturation!) as: 2 GS T GS T K Therefore, the amplifier voltage gain is typically proportional to the square-root of the C drain current: 2) Maximize oltage Swing Recall that if the C drain voltage is biased too close to, then even a small small-signal drain voltage v d (t) can result in a total drain voltage that is too large, i.e.: g 2K 2K 2 K K m GS T A v To maximize A v, maximize v ( t) v ( t) d n other words, the MOSFET enters cutoff, and the result is a distorted signal! K
14 Biasing using Single Power Supply (contd.) To avoid this (to allow v d (t) to be as large as possible without MOSFET entering cutoff), we need to bias our MOSFET such that the C drain voltage is as small as possible. Note that the drain voltage is: R Therefore is minimized by designing the bias circuit such that the C drain current is as large as possible. However, we must also consider the signal distortion that occurs when the MOSFET enters triode. This of course is avoided if the total drain-to-source voltage remains greater than the excess gate voltage, i.e.: vs( t) S vds( t) GS T Thus, to avoid the MOSFET triode mode and the resulting signal distortion we need to bias our MOSFET such that the C voltage is as large as possible. To minimize signal distortion, maximize S
15 Biasing using Single Power Supply (contd.) 3) Minimize Sensitivity to changes in K, T We find that MOSFETs are sensitive to temperature specifically, the value of K is a function of temperature. Likewise, the values of K and T are not particularly constant with regard to the manufacturing process. Both of these facts lead to the requirement that our bias design be insensitive to the values of K and T. Specifically, we want to design the bias network such that the C bias current does not change values when K and/or T does. Mathematically, we can express this d d and requirement as minimizing the value: dk dt These derivatives can be minimized by maximizing the value of source resistor R S. So, let s recap what we have learned about designing our bias network: 1. Make as large as possible. 2. Make S as large as possible. 3. Make R S as large as possible.
16 Biasing using Single Power Supply (contd.) R S RS 0 or R S RS Maximize A v by maximizing this term. But the total of the three terms must equal this! Minimize distortion by maximizing this term. Minimize sensitivity by maximizing this term.
17 Example 1 f the MOSFET has device values K = 1.0 ma 2 and T = 1.0, determine the resistor values to bias this MOSFET with a C drain current of = 4.0mA.
18 The MOSFET Current Mirror Consider the following MOSFET circuit: Note = G, therefore: and thus: S GS T S GS The MOSFET is in saturation if G > T. We know that for a MOSFET in saturation, the drain current is: S GS Say we want this current to be a specific value call it ref. Since S = 0, we find that from the above ref equation, the drain voltage must be: K T Likewise, from KL we find that: ref R And thus the resistor value to achieve the desired drain current ref is: R ref
19 The MOSFET Current Mirror (contd.) Q: Why are we doing this? A: Say we now add another component to the circuit, with a second MOSFET that is identical to the first : Q: So what is current L? A: Note that the gate voltage of each MOSFET is the same (i.e., GS1 = GS2 ), and if the MOSFETS are the same (i.e., K 1 = K 2, T1 = T2 ), and if the second MOSFET is likewise in saturation. The drain current L is: K L 2 GS2 T 2 2 K 1 GS1 T 1 ref 2 Therefore, the drain current of the second MOSFET is equal to the current of the first! ref L
20 The MOSFET Current Mirror (contd.) Q: Wait a minute! You mean to say that the current through the resistor R L is independent of the value of resistor R L? A: Absolutely! As long as the second MOSFET is in saturation, the current through R L is equal to ref period. The current through R L is independent of the value of R L (provided that the MOSFET remains in saturation). Think about what this means this device is a current source! Remember, the second MOSFET must be in saturation for the current through R L to be a constant value ref. As a result, we find that: S 2 GS 2 T 2 For this example: 2 G 2 T 2
21 The MOSFET Current Mirror (contd.) Since 2 = R L ref, we find that the MOSFET will be in saturation if: Alternatively, we find the limitation on the load resistor R L : R L R L ref G2 T 2 G1 T 1 G1 T 1 ref We know that: R 1 G ref Thus we can alternatively write the above equation as: R L T 1 R ref f the load resistor becomes larger than R + T1 ref, the voltage S2 will drop below the excess gate voltage GS2 T2, and thus the second MOSFET will enter the triode region. As a result, the drain current will not equal ref the current source will stop working!
22 The MOSFET Current Mirror (contd.) Although the circuit is sometimes referred to as a current sink, understand that the circuit is clearly a way of designing a current source. We can also use PMOS devices to construct a current mirror!
23 MOSFET Biasing using Current Mirror We can bias a MOSFET amplifier using a current source as: t is evident that the C drain current, is equal to the current source, regardless of the MOSFET values K or T! Thus, this bias design maximizes drain current stability!
24 MOSFET Biasing using Current Mirror (contd.) We now know how to implement this bias design with MOSFETs we use the current mirror to construct the current source! Since =, it is evident that GS must be equal to: GS K T Since the C gate voltage is: G Therefore: S G GS R 2 R R 1 2 R 2 T R1 R2 K
25 MOSFET Biasing using Current Mirror (contd.) Since we are biasing with a current source, we do not need to worry about drain current stability the current source will determine the C drain current for all conditions (i.e., = ). We might conclude, therefore, that we should make C source voltage S as small as possible. After all, this would allow us to maximize the output voltage swing (i.e., maximize R and S ). Note however, that the source voltage S of the MOSFET is numerically equal to the drain voltage 2 (and thus S2 ) of the second MOSFET of the current mirror. Q: So what?! A: The voltage must be greater than: GS 2 T 2 GS 1 T 1 R ref T 1 in order for the second MOSFET to remain in saturation. There is a minimum voltage across the current source in order for the current source to properly operate!
26 MOSFET Biasing using Current Mirror (contd.) Thus, to maximize output swing, we might wish to set: S GS 1 T 1 (although to be practical, we should make S slightly greater than this to allow for some design margin). Q: How do we set the C source voltage S?? A: By setting the C gate voltage G!! Recall that the C voltage GS is determined by the C current source value : and the C gate voltage is determined by the two resistors R 1 and R 2 : Thus, we should select these resistors G GS S such that: K G GS T GS 1 T 1 K R T 2 R R 1 2
27 MOSFET Biasing using Current Mirror (contd.) Q: So what should the value of resistor R be? A: Recall that we should set the C drain voltage : a) much less than to avoid cutoff. b) much greater than G T to avoid triode. Thus, we compromise by setting the C drain voltage to a point halfway in between! To achieve this, we must select the drain resistor R so that: R 2 G T G T
28 Example 2 Let s determine the proper resistor values to C bias this MOSFET. The current source is 5.0 ma and has a minimum voltage of 2.0 olts in order to operate properly Since = = 5 ma, we GS know that the value of GS K should be:. T Assuming that we want the C source voltage to be the minimum value of S = 2.0, we need for the C gate voltage to be: G GS S
29 Example 2 (contd.) R 2 Thus, we need to select resistors R 1 and R 2 so that: G 80. R1 R2 or in other words, we want: R R1 R Since we can make R 1 and R 2 large, let s assume that we want: R R 300K 1 2 So that R 1 = 140 kω and R 2 = 160 kω. Finally, we want the C drain voltage to be: So that the resistor is: R K G T
30 Example 2 (contd.)
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