6.776 High Speed Communication Circuits Lecture 7 High Freqeuncy, Broadband Amplifiers

Size: px
Start display at page:

Download "6.776 High Speed Communication Circuits Lecture 7 High Freqeuncy, Broadband Amplifiers"

Transcription

1 6.776 High Speed Communication Circuits Lecture 7 High Freqeuncy, Broadband Amplifiers Massachusetts Institute of Technology February 24, 2005 Copyright 2005 by Hae-Seung Lee and Michael H. Perrott

2 High Frequency, Broadband Amplifiers The first thing that you typically do to the input signal is amplify it package Connector Adjoining pins Controlled Impedance PCB trace die Driving Source On-Chip Z Delay = x Characteristic Impedance = Z o L Amp V out V Transmission Line in C C 2 L V L Function - Boosts signal levels to acceptable values - Provides reverse isolation Key performance parameters - Gain, bandwidth, noise, linearity

3 Gain-bandwidth Trade-off Common-source amplifier example V dd L v o V bias - - C tot Ctot : total capacitance at output node DC gain 3 dbbandwidth Gain-bandwidth

4 Gain-bandwidth Trade-off Common-source amplifier example L = L L = L3 L = L3 Given the origin pole g m /C tot, higher bandwidth is achieved only at the expense of gain The origin pole g m /C tot must be improved for better GB

5 Gain-bandwidth Improvement How do we improve g m /C tot? Assume that amplifier is loaded by an identical amplifier and fixed wiring capacitance is negligible Since and To achieve maximum GB in a given technology, use minimum gate length, bias the transistor at maximum When velocity saturation is reached, higher does not give higher g m In case fixed wiring capacitance is large, power consumption must be also considered

6 Gain-bandwidth Observations Constant gain-bandwidth is simply the result of singlepole role off it s not fundamental! It implies a single-pole frequency response may not be the best for obtaining gain and bandwidth simultaneously Single-pole role off is necessary for some circuits, e.g. for stability, but not for broad-band amplifiers

7 Assumptions (for now) for Bandwidth Analysis Assume for now that amplifier is loaded by an identical amplifier and by fixed wiring capacitance Assume amplifier is driven by an ideal voltage source for now C tot = C out C in C fixed C in C out C in Amp Amp C fixed Intrinsic performance - Defined as the bandwidth achieved for a given gain when C fixed is negligible - Amplifier approaches intrinsic performance as its device sizes (and current) are increased In practice, point of diminishing return for bandwidth vs. size (and power) of amplifier is roughly where C in C out = C fixed

8 The Miller Effect Concerns impedances that connect from input to output of an amplifier Z in Z f Z out V in Input impedance: A v Amp V out Z L Output impedance:

9 Example: Miller Capacitance Consider C gd in the MOS device as C f - Assume gain is negative C f Z in Z out V in Input capacitance: A v Amp V out Z L Looks like much larger capacitance by A v

10 Example: Miller Capacitance C f Z in Z out V in A v Amp V out Z L Output impedance: This makes sense because the input of the amplifier is virtual ground if gain is large

11 Amplifier Example CMOS Inverter The Miller effect gives a quick way to estimate the bandwidth of an amplifer without solving node equations: intuition! Assume that we set V bias the amplifier nominal output is such that NMOS and PMOS transistors are all in saturation - Note: this topology VEY sensitive to V bias : some feedback biasing would be required (6.30) M 2 M 4 v out M C fixed M 3 V bias C tot = C db C db2 C gs3 C gs4 K(C ov3 C ov4 ) C fixed (C ov C ov2 ) Miller multiplication factor

12 Transfer Function of CMOS Inverter v out (g m g m2 )(r o r o2 ) slope = -20 db/dec Low Bandwidth! g m g m2 2πC tot (r o r o2 ) 2πC tot f M 2 M 4 v out M C fixed M 3 V bias C tot = C db C db2 C gs3 C gs4 K(C ov3 C ov4 ) C fixed (C ov C ov2 ) Miller multiplication factor

13 Add esistive Feedback? v out (g m g m2 )(r o r o2 ) (g m g m2 ) f slope = -20 db/dec Bandwidth extended and less sensitivity to bias offset (does not improve GB, though) f g m g m2 2πC tot (r o r o2 ) 2πC tot 2πC tot f f M 2 v out M 4 M C fixed M 3 V bias C tot = C db C db2 C gs3 C gs4 K(C ov3 C ov4 ) C f /2 C fixed (C ov C ov2 ) Miller multiplication factor

14 We Can Still Do Better We are fundamentally looking for high g m to capacitance ratio to get the highest bandwidth - PMOS degrades this ratio - Gate bias voltage is constrained However, when C fixed is dominant and power consumption is important, the PMOS increases g m without additional power On the other hand, below velocity saturation, higher g m can be achieved by biasing the gate of M close to V dd instead of using PMOS M 2 M 4 f v out M C fixed M 3 V bias C tot = C db C db2 C gs3 C gs4 K(C ov3 C ov4 ) C f /2 C fixed (C ov C ov2 ) Miller multiplication factor

15 Take PMOS Out of the Signal Path Ibias V bias2 M 2 f v out f v out M C L M C L V bias V bias Advantages - PMOS gate no longer loads the signal - NMOS device can be biased at a higher voltage (higher g m up to velocity sat. limit) Issue - PMOS is not an efficient current provider (I d /drain cap C gd C db ) Drain cap close in value to C gs - Signal path is loaded by cap of f and drain cap of PMOS

16 Shunt-Series Amplifier s in I bias f out v out s in f out L v out M L M V bias V bias Use resistors to control the bias, gain, and input/output impedances - Improves accuracy over process and temp variations Issues - Degeneration of M lowers slew rate for large signal applications (such as limit amps) - There are better high speed approaches the advantage of this one is simply accuracy

17 Shunt-Series Amplifier Analysis Snapshot From Chapter 9 (8) of Tom Lee s book: - Gain s in v x f out L v out M V bias - Input resistance - Output resistance Same for s = L!

18 NMOS Load Amplifier V dd M 2 v out g m2 I d v out g m g m2 slope = -20 db/dec V bias M C fixed M 3 g m f Ctot = C db C sb2 C gs2 C gs3 KC ov3 C fixed g m2 2πC tot (C ov ) Miller multiplication factor 2πC tot Gain set by the relative sizing of M and M 2

19 Design of NMOS Load Amplifier V dd C tot = C db C sb2 C gs2 C gs3 KC ov3 C fixed g m2 M 2 I d v out (C ov ) Miller multiplication factor V bias M C fixed M 3 Size transistors for gain and speed - Choose minimum L for maximum speed - Choose ratio of W to W 2 to achieve appropriate gain

20 Advantage/Disadvantages of NMOS Load Amplifier Gain is well controlled despite process variations NMOS is not a low parasitic load - C gs of M2 loads the output Biasing Problem: V T of M 2 lowers the gate bias voltage of the next stage (thus lowering its achievable f t ) - Severely hampers performance when amplifier is cascaded - One paper addressed this issue by increasing V dd of NMOS load (see Sackinger et. al., A 3-GHz 32-dB CMOS Limiting Amplifier for SONET OC-48 receivers, JSSC, Dec 2000)

21 esistor Loaded Amplifier (Unsilicided Poly) V dd L v out V bias I d vout C fixed M M 2 C tot = C db C L /2 C gs2 KC ov2 C fixed (C ov ) Miller multiplication factor g m L 2π L C tot slope = -20 db/dec g m 2πC tot f This is the fastest non-enhanced amplifier topology - Unsilicided poly is a low parasitic load (i..e, has a good current to capacitance ratio) - Output can go near V dd Allows following stage to achieve high f t, but at the cost of gain (max gain V L ) - Linear settling behavior (in contrast to NMOS load)

22 Gain Limitations in esistor Loaded Amplifier Want high for high bandwidth, but this reduces gain. With low V dd gain is very limited.

23 Implementation of esistor Loaded Amplifier Typically implement using differential pairs V dd 2 V o V o- I bias /2 V in V in- C fixed C fixed αi bias M M 2 M 3 M 4 I bias M 5 M 6 M 7 Benefits - Bias stability without feedback - Common-mode rejection Negative - More power than single-ended version

24 Open-Circuit Time Constants The Miller capacitance analysis is a reasonably good method, but is somewhat limited in applicable topologies the OCT method is more general and often gives more insights Systematic, intuitive method to determine bandwidth of amplifiers Often gives fairly accurate estimates of bandwidth if there is a dominant pole Points to the bandwidth bottleneck: this is the real value of the OCT method! Limitation: fails in F circuits with zero enhancements or inductors In typical broadband amplifiers, the OCT estimate is too pessimistic due to multiple poles at around similar frequencies

25 Open Circuit Time Constant Method Assumptions: No zero near or ω h Zero well below wh is handled by treating corresponding capacitor as sort circuit Negative real poles only (complex conjugate poles with low Q reduces accuracy of estimation only moderately) No inductors Vo a0 A( s) = = V τ s τ s τ s = i ( )( ) ( ) a n ( τ τ τ ) s τ τ τ s If we ignore the higher order terms ωh = 2πf h = n τ τ 2 τ n 2 0 n i= τ i 2 2 n n

26 OCT Method, Continued It can be shown n τ i= i Thus = n τ j= ω h jo n τ jo j= where τ jo = jo C j :open-circuit time constants The open-circuit time constants can be found without node equations, often by inspection

27 OC Calculation Let s consider an arbitrary circuit with resistors, dependent sources, and n capacitors (no inductors!). edraw the circuit to pull capacitors out around the perimeter. C 2 2o C - o - C n no

28 OCT s for CS Amplifier 2o L C gd C L v o S 3o o C gs By inspection: It takes some work to figure

29 OCT s for CS Amplifier L i t v o S v gs - - v t g m v gs

30 OCT s for CS Amplifier If S =0, then τ o =0,τ 2o =C gd L, and τ 3o =C L L so L determines the bandwidth Having individual OCT values identifies the bandwidth bottleneck and suggests a game plan Note:for cascased amplifiers, C L does not include Miller cap of the next stage. Instead, τ 2o corresponding to the next stage Miller cap is separately calculated

31 Cascode to Improve Bandwidth L m v g a = Midband gain: by inspection V CC L v o v i S M M ,, mb m eff m eff L g g g = =, o eff S r = o S = ( ) 2 2,,, 2 mb m S m S eff L S m S S eff L eff L m o o g g g g g = = = 2 2 2,, 3 mb m eff m eff S o g g g L L eff S m eff L b o g r =,, 4

32 Cascode Improves bandwidth in a single-stage amplifier Problem in cascading: - Bias point: educes ω t of the next stage. PMOS SF is a possibility but low g m /C ratio is a drawback.

6.976 High Speed Communication Circuits and Systems Lecture 5 High Speed, Broadband Amplifiers

6.976 High Speed Communication Circuits and Systems Lecture 5 High Speed, Broadband Amplifiers 6.976 High Speed Communication Circuits and Systems Lecture 5 High Speed, Broadband Amplifiers Michael Perrott Massachusetts Institute of Technology Copyright 2003 by Michael H. Perrott Broadband Communication

More information

6.776 High Speed Communication Circuits Lecture 6 MOS Transistors, Passive Components, Gain- Bandwidth Issue for Broadband Amplifiers

6.776 High Speed Communication Circuits Lecture 6 MOS Transistors, Passive Components, Gain- Bandwidth Issue for Broadband Amplifiers 6.776 High Speed Communication Circuits Lecture 6 MOS Transistors, Passive Components, Gain- Bandwidth Issue for Broadband Amplifiers Massachusetts Institute of Technology February 17, 2005 Copyright 2005

More information

Analysis and Design of Analog Integrated Circuits Lecture 6. Current Mirrors

Analysis and Design of Analog Integrated Circuits Lecture 6. Current Mirrors Analysis and Design of Analog Integrated Circuits ecture 6 Current Mirrors Michael H. Perrott February 8, 2012 Copyright 2012 by Michael H. Perrott All rights reserved. From ecture 5: Basic Single-Stage

More information

Analysis and Design of Analog Integrated Circuits Lecture 20. Advanced Opamp Topologies (Part II)

Analysis and Design of Analog Integrated Circuits Lecture 20. Advanced Opamp Topologies (Part II) Analysis and Design of Analog Integrated Circuits Lecture 20 Advanced Opamp Topologies (Part II) Michael H. Perrott April 15, 2012 Copyright 2012 by Michael H. Perrott All rights reserved. Outline of Lecture

More information

Lecture 20: Passive Mixers

Lecture 20: Passive Mixers EECS 142 Lecture 20: Passive Mixers Prof. Ali M. Niknejad University of California, Berkeley Copyright c 2005 by Ali M. Niknejad A. M. Niknejad University of California, Berkeley EECS 142 Lecture 20 p.

More information

Operational Amplifiers

Operational Amplifiers CHAPTER 9 Operational Amplifiers Analog IC Analysis and Design 9- Chih-Cheng Hsieh Outline. General Consideration. One-Stage Op Amps / Two-Stage Op Amps 3. Gain Boosting 4. Common-Mode Feedback 5. Input

More information

Analysis and Design of Analog Integrated Circuits Lecture 8. Cascode Techniques

Analysis and Design of Analog Integrated Circuits Lecture 8. Cascode Techniques Analysis and Design of Analog Integrated Circuits Lecture 8 Cascode Techniques Michael H. Perrott February 15, 2012 Copyright 2012 by Michael H. Perrott All rights reserved. Review of Large Signal Analysis

More information

Lecture 33: Context. Prof. J. S. Smith

Lecture 33: Context. Prof. J. S. Smith Lecture 33: Prof J. S. Smith Context We are continuing to review some of the building blocks for multi-stage amplifiers, including current sources and cascode connected devices, and we will also look at

More information

Reading. Lecture 33: Context. Lecture Outline. Chapter 9, multi-stage amplifiers. Prof. J. S. Smith

Reading. Lecture 33: Context. Lecture Outline. Chapter 9, multi-stage amplifiers. Prof. J. S. Smith eading Lecture 33: Chapter 9, multi-stage amplifiers Prof J. S. Smith Context Lecture Outline We are continuing to review some of the building blocks for multi-stage amplifiers, including current sources

More information

A 19-GHz Broadband Amplifier Using a g m -Boosted Cascode in 0.18-μm CMOS

A 19-GHz Broadband Amplifier Using a g m -Boosted Cascode in 0.18-μm CMOS A 19-GHz Broadband Amplifier Using a g m -Boosted Cascode in 0.18-μm CMOS Masum Hossain & Anthony Chan Carusone Electrical & Computer Engineering University of Toronto Outline Applications g m -Boosting

More information

EE105 Fall 2015 Microelectronic Devices and Circuits

EE105 Fall 2015 Microelectronic Devices and Circuits EE105 Fall 2015 Microelectronic Devices and Circuits Multi-Stage Amplifiers Prof. Ming C. Wu wu@eecs.berkeley.edu 511 Sutardja Dai Hall (SDH) Terminal Gain and I/O Resistances of MOS Amplifiers Common

More information

Chapter 13: Introduction to Switched- Capacitor Circuits

Chapter 13: Introduction to Switched- Capacitor Circuits Chapter 13: Introduction to Switched- Capacitor Circuits 13.1 General Considerations 13.2 Sampling Switches 13.3 Switched-Capacitor Amplifiers 13.4 Switched-Capacitor Integrator 13.5 Switched-Capacitor

More information

Basic Circuits. Current Mirror, Gain stage, Source Follower, Cascode, Differential Pair,

Basic Circuits. Current Mirror, Gain stage, Source Follower, Cascode, Differential Pair, Basic Circuits Current Mirror, Gain stage, Source Follower, Cascode, Differential Pair, CCS - Basic Circuits P. Fischer, ZITI, Uni Heidelberg, Seite 1 Reminder: Effect of Transistor Sizes Very crude classification:

More information

Amplifiers Frequency Response Examples

Amplifiers Frequency Response Examples ECE 5/45 Analog IC Design We will use the following MOSFET parameters for hand-calculations and the µm CMOS models for corresponding simulations. Table : Long-channel MOSFET parameters. Parameter NMOS

More information

CHAPTER 4 ULTRA WIDE BAND LOW NOISE AMPLIFIER DESIGN

CHAPTER 4 ULTRA WIDE BAND LOW NOISE AMPLIFIER DESIGN 93 CHAPTER 4 ULTRA WIDE BAND LOW NOISE AMPLIFIER DESIGN 4.1 INTRODUCTION Ultra Wide Band (UWB) system is capable of transmitting data over a wide spectrum of frequency bands with low power and high data

More information

Advanced Operational Amplifiers

Advanced Operational Amplifiers IsLab Analog Integrated Circuit Design OPA2-47 Advanced Operational Amplifiers כ Kyungpook National University IsLab Analog Integrated Circuit Design OPA2-1 Advanced Current Mirrors and Opamps Two-stage

More information

6.776 High Speed Communication Circuits and Systems Lecture 14 Voltage Controlled Oscillators

6.776 High Speed Communication Circuits and Systems Lecture 14 Voltage Controlled Oscillators 6.776 High Speed Communication Circuits and Systems Lecture 14 Voltage Controlled Oscillators Massachusetts Institute of Technology March 29, 2005 Copyright 2005 by Michael H. Perrott VCO Design for Narrowband

More information

TWO AND ONE STAGES OTA

TWO AND ONE STAGES OTA TWO AND ONE STAGES OTA F. Maloberti Department of Electronics Integrated Microsystem Group University of Pavia, 7100 Pavia, Italy franco@ele.unipv.it tel. +39-38-50505; fax. +39-038-505677 474 EE Department

More information

Low-Noise Amplifiers

Low-Noise Amplifiers 007/Oct 4, 31 1 General Considerations Noise Figure Low-Noise Amplifiers Table 6.1 Typical LNA characteristics in heterodyne systems. NF IIP 3 db 10 dbm Gain 15 db Input and Output Impedance 50 Ω Input

More information

ECEN 474/704 Lab 5: Frequency Response of Inverting Amplifiers

ECEN 474/704 Lab 5: Frequency Response of Inverting Amplifiers ECEN 474/704 Lab 5: Frequency Response of Inverting Amplifiers Objective Design, simulate and layout various inverting amplifiers. Introduction Inverting amplifiers are fundamental building blocks of electronic

More information

Solid State Devices & Circuits. 18. Advanced Techniques

Solid State Devices & Circuits. 18. Advanced Techniques ECE 442 Solid State Devices & Circuits 18. Advanced Techniques Jose E. Schutt-Aine Electrical l&c Computer Engineering i University of Illinois jschutt@emlab.uiuc.edu 1 Darlington Configuration - Popular

More information

A Compact Folded-cascode Operational Amplifier with Class-AB Output Stage

A Compact Folded-cascode Operational Amplifier with Class-AB Output Stage A Compact Folded-cascode Operational Amplifier with Class-AB Output Stage EEE 523 Advanced Analog Integrated Circuits Project Report Fuding Ge You are an engineer who is assigned the project to design

More information

The Miller Approximation. CE Frequency Response. The exact analysis is worked out on pp of H&S.

The Miller Approximation. CE Frequency Response. The exact analysis is worked out on pp of H&S. CE Frequency Response The exact analysis is worked out on pp. 639-64 of H&S. The Miller Approximation Therefore, we consider the effect of C µ on the input node only V ---------- out V s = r g π m ------------------

More information

Chapter 5. Operational Amplifiers and Source Followers. 5.1 Operational Amplifier

Chapter 5. Operational Amplifiers and Source Followers. 5.1 Operational Amplifier Chapter 5 Operational Amplifiers and Source Followers 5.1 Operational Amplifier In single ended operation the output is measured with respect to a fixed potential, usually ground, whereas in double-ended

More information

Radivoje Đurić, 2015, Analogna Integrisana Kola 1

Radivoje Đurić, 2015, Analogna Integrisana Kola 1 OTA-output buffer 1 According to the types of loads, the driving capability of the output stages differs. For switched capacitor circuits which have high impedance capacitive loads, class A output stage

More information

Experiment #7 MOSFET Dynamic Circuits II

Experiment #7 MOSFET Dynamic Circuits II Experiment #7 MOSFET Dynamic Circuits II Jonathan Roderick Introduction The previous experiment introduced the canonic cells for MOSFETs. The small signal model was presented and was used to discuss the

More information

CSE 577 Spring Insoo Kim, Kyusun Choi Mixed Signal CHIP Design Lab. Department of Computer Science & Engineering The Penn State University

CSE 577 Spring Insoo Kim, Kyusun Choi Mixed Signal CHIP Design Lab. Department of Computer Science & Engineering The Penn State University CSE 577 Spring 2011 Basic Amplifiers and Differential Amplifier, Kyusun Choi Mixed Signal CHIP Design Lab. Department of Computer Science & Engineering The Penn State University Don t let the computer

More information

Analysis and Design of Analog Integrated Circuits Lecture 18. Key Opamp Specifications

Analysis and Design of Analog Integrated Circuits Lecture 18. Key Opamp Specifications Analysis and Design of Analog Integrated Circuits Lecture 8 Key Opamp Specifications Michael H. Perrott April 8, 0 Copyright 0 by Michael H. Perrott All rights reserved. Recall: Key Specifications of Opamps

More information

Lecture 34: Designing amplifiers, biasing, frequency response. Context

Lecture 34: Designing amplifiers, biasing, frequency response. Context Lecture 34: Designing amplifiers, biasing, frequency response Prof J. S. Smith Context We will figure out more of the design parameters for the amplifier we looked at in the last lecture, and then we will

More information

Microelectronic Circuits II. Ch 10 : Operational-Amplifier Circuits

Microelectronic Circuits II. Ch 10 : Operational-Amplifier Circuits Microelectronic Circuits II Ch 0 : Operational-Amplifier Circuits 0. The Two-stage CMOS Op Amp 0.2 The Folded-Cascode CMOS Op Amp CNU EE 0.- Operational-Amplifier Introduction - Analog ICs : operational

More information

Lecture 2, Amplifiers 1. Analog building blocks

Lecture 2, Amplifiers 1. Analog building blocks Lecture 2, Amplifiers 1 Analog building blocks Outline of today's lecture Further work on the analog building blocks Common-source, common-drain, common-gate Active vs passive load Other "simple" analog

More information

d. Can you find intrinsic gain more easily by examining the equation for current? Explain.

d. Can you find intrinsic gain more easily by examining the equation for current? Explain. EECS140 Final Spring 2017 Name SID 1. [8] In a vacuum tube, the plate (or anode) current is a function of the plate voltage (output) and the grid voltage (input). I P = k(v P + µv G ) 3/2 where µ is a

More information

Analog Integrated Circuits. Lecture 7: OpampDesign

Analog Integrated Circuits. Lecture 7: OpampDesign Analog Integrated Circuits Lecture 7: OpampDesign ELC 601 Fall 2013 Dr. Ahmed Nader Dr. Mohamed M. Aboudina anader@ieee.org maboudina@gmail.com Department of Electronics and Communications Engineering

More information

Experiment 1: Amplifier Characterization Spring 2019

Experiment 1: Amplifier Characterization Spring 2019 Experiment 1: Amplifier Characterization Spring 2019 Objective: The objective of this experiment is to develop methods for characterizing key properties of operational amplifiers Note: We will be using

More information

Lecture 240 Cascode Op Amps (3/28/10) Page 240-1

Lecture 240 Cascode Op Amps (3/28/10) Page 240-1 Lecture 240 Cascode Op Amps (3/28/10) Page 2401 LECTURE 240 CASCODE OP AMPS LECTURE ORGANIZATION Outline Lecture Organization Single Stage Cascode Op Amps Two Stage Cascode Op Amps Summary CMOS Analog

More information

Lecture 2: Non-Ideal Amps and Op-Amps

Lecture 2: Non-Ideal Amps and Op-Amps Lecture 2: Non-Ideal Amps and Op-Amps Prof. Ali M. Niknejad Department of EECS University of California, Berkeley Practical Op-Amps Linear Imperfections: Finite open-loop gain (A 0 < ) Finite input resistance

More information

Preliminary Exam, Fall 2013 Department of Electrical and Computer Engineering University of California, Irvine EECS 170B

Preliminary Exam, Fall 2013 Department of Electrical and Computer Engineering University of California, Irvine EECS 170B Preliminary Exam, Fall 2013 Department of Electrical and Computer Engineering University of California, Irvine EECS 170B Problem 1. Consider the following circuit, where a saw-tooth voltage is applied

More information

Highly linear common-gate mixer employing intrinsic second and third order distortion cancellation

Highly linear common-gate mixer employing intrinsic second and third order distortion cancellation Highly linear common-gate mixer employing intrinsic second and third order distortion cancellation Mahdi Parvizi a), and Abdolreza Nabavi b) Microelectronics Laboratory, Tarbiat Modares University, Tehran

More information

Chapter 4. CMOS Cascode Amplifiers. 4.1 Introduction. 4.2 CMOS Cascode Amplifiers

Chapter 4. CMOS Cascode Amplifiers. 4.1 Introduction. 4.2 CMOS Cascode Amplifiers Chapter 4 CMOS Cascode Amplifiers 4.1 Introduction A single stage CMOS amplifier cannot give desired dc voltage gain, output resistance and transconductance. The voltage gain can be made to attain higher

More information

Basic OpAmp Design and Compensation. Chapter 6

Basic OpAmp Design and Compensation. Chapter 6 Basic OpAmp Design and Compensation Chapter 6 6.1 OpAmp applications Typical applications of OpAmps in analog integrated circuits: (a) Amplification and filtering (b) Biasing and regulation (c) Switched-capacitor

More information

INTRODUCTION TO ELECTRONICS EHB 222E

INTRODUCTION TO ELECTRONICS EHB 222E INTRODUCTION TO ELECTRONICS EHB 222E MOS Field Effect Transistors (MOSFETS II) MOSFETS 1/ INTRODUCTION TO ELECTRONICS 1 MOSFETS Amplifiers Cut off when v GS < V t v DS decreases starting point A, once

More information

ISSCC 2003 / SESSION 10 / HIGH SPEED BUILDING BLOCKS / PAPER 10.8

ISSCC 2003 / SESSION 10 / HIGH SPEED BUILDING BLOCKS / PAPER 10.8 ISSCC 2003 / SESSION 10 / HIGH SPEED BUILDING BLOCKS / PAPER 10.8 10.8 10Gb/s Limiting Amplifier and Laser/Modulator Driver in 0.18µm CMOS Technology Sherif Galal, Behzad Razavi Electrical Engineering

More information

Index. Small-Signal Models, 14 saturation current, 3, 5 Transistor Cutoff Frequency, 18 transconductance, 16, 22 transit time, 10

Index. Small-Signal Models, 14 saturation current, 3, 5 Transistor Cutoff Frequency, 18 transconductance, 16, 22 transit time, 10 Index A absolute value, 308 additional pole, 271 analog multiplier, 190 B BiCMOS,107 Bode plot, 266 base-emitter voltage, 16, 50 base-emitter voltages, 296 bias current, 111, 124, 133, 137, 166, 185 bipolar

More information

EECE488: Analog CMOS Integrated Circuit Design Set 7 Opamp Design

EECE488: Analog CMOS Integrated Circuit Design Set 7 Opamp Design EECE488: Analog CMOS Integrated Circuit Design Set 7 Opamp Design References: Analog Integrated Circuit Design by D. Johns and K. Martin and Design of Analog CMOS Integrated Circuits by B. Razavi All figures

More information

ECEN 474/704 Lab 6: Differential Pairs

ECEN 474/704 Lab 6: Differential Pairs ECEN 474/704 Lab 6: Differential Pairs Objective Design, simulate and layout various differential pairs used in different types of differential amplifiers such as operational transconductance amplifiers

More information

DESIGN OF A FULLY DIFFERENTIAL HIGH-SPEED HIGH-PRECISION AMPLIFIER

DESIGN OF A FULLY DIFFERENTIAL HIGH-SPEED HIGH-PRECISION AMPLIFIER DESIGN OF A FULLY DIFFERENTIAL HIGH-SPEED HIGH-PRECISION AMPLIFIER Mayank Gupta mayank@ee.ucla.edu N. V. Girish envy@ee.ucla.edu Design I. Design II. University of California, Los Angeles EE215A Term Project

More information

Lecture 13. Biasing and Loading Single Stage FET Amplifiers. The Building Blocks of Analog Circuits - III

Lecture 13. Biasing and Loading Single Stage FET Amplifiers. The Building Blocks of Analog Circuits - III Lecture 3 Biasing and Loading Single Stage FET Amplifiers The Building Blocks of Analog Circuits III In this lecture you will learn: Current biasing of circuits Current sources and sinks for CS, CG, and

More information

Basic OpAmp Design and Compensation. Chapter 6

Basic OpAmp Design and Compensation. Chapter 6 Basic OpAmp Design and Compensation Chapter 6 6.1 OpAmp applications Typical applications of OpAmps in analog integrated circuits: (a) Amplification and filtering (b) Biasing and regulation (c) Switched-capacitor

More information

Common-Source Amplifiers

Common-Source Amplifiers Lab 2: Common-Source Amplifiers Introduction The common-source stage is the most basic amplifier stage encountered in CMOS analog circuits. Because of its very high input impedance, moderate-to-high gain,

More information

55:041 Electronic Circuits The University of Iowa Fall Exam 3. Question 1 Unless stated otherwise, each question below is 1 point.

55:041 Electronic Circuits The University of Iowa Fall Exam 3. Question 1 Unless stated otherwise, each question below is 1 point. Exam 3 Name: Score /65 Question 1 Unless stated otherwise, each question below is 1 point. 1. An engineer designs a class-ab amplifier to deliver 2 W (sinusoidal) signal power to an resistive load. Ignoring

More information

ECE 255, MOSFET Amplifiers

ECE 255, MOSFET Amplifiers ECE 255, MOSFET Amplifiers 26 October 2017 In this lecture, the basic configurations of MOSFET amplifiers will be studied similar to that of BJT. Previously, it has been shown that with the transistor

More information

Rail-To-Rail Output Op-Amp Design with Negative Miller Capacitance Compensation

Rail-To-Rail Output Op-Amp Design with Negative Miller Capacitance Compensation Rail-To-Rail Op-Amp Design with Negative Miller Capacitance Compensation Muhaned Zaidi, Ian Grout, Abu Khari bin A ain Abstract In this paper, a two-stage op-amp design is considered using both Miller

More information

ETI , Good luck! Written Exam Integrated Radio Electronics. Lund University Dept. of Electroscience

ETI , Good luck! Written Exam Integrated Radio Electronics. Lund University Dept. of Electroscience und University Dept. of Electroscience EI170 Written Exam Integrated adio Electronics 2010-03-10, 08.00-13.00 he exam consists of 5 problems which can give a maximum of 6 points each. he total maximum

More information

ETIN25 Analogue IC Design. Laboratory Manual Lab 2

ETIN25 Analogue IC Design. Laboratory Manual Lab 2 Department of Electrical and Information Technology LTH ETIN25 Analogue IC Design Laboratory Manual Lab 2 Jonas Lindstrand Martin Liliebladh Markus Törmänen September 2011 Laboratory 2: Design and Simulation

More information

ECE 442 Solid State Devices & Circuits. 15. Differential Amplifiers

ECE 442 Solid State Devices & Circuits. 15. Differential Amplifiers ECE 442 Solid State Devices & Circuits 15. Differential Amplifiers Jose E. Schutt-Aine Electrical & Computer Engineering University of Illinois jschutt@emlab.uiuc.edu ECE 442 Jose Schutt Aine 1 Background

More information

LECTURE 19 DIFFERENTIAL AMPLIFIER

LECTURE 19 DIFFERENTIAL AMPLIFIER Lecture 19 Differential Amplifier (6/4/14) Page 191 LECTURE 19 DIFFERENTIAL AMPLIFIER LECTURE ORGANIZATION Outline Characterization of a differential amplifier Differential amplifier with a current mirror

More information

Common Gate Stage Cascode Stage. Claudio Talarico, Gonzaga University

Common Gate Stage Cascode Stage. Claudio Talarico, Gonzaga University Common Gate Stage Cascode Stage Claudio Talarico, Gonzaga University Common Gate Stage The overdrive due to V B must be consistent with the current pulled by the DC source I B careful with signs: v gs

More information

Chapter 12 Opertational Amplifier Circuits

Chapter 12 Opertational Amplifier Circuits 1 Chapter 12 Opertational Amplifier Circuits Learning Objectives 1) The design and analysis of the two basic CMOS op-amp architectures: the two-stage circuit and the single-stage, folded cascode circuit.

More information

Current Supply Topology. CMOS Cascode Transconductance Amplifier. Basic topology. p-channel cascode current supply is an obvious solution

Current Supply Topology. CMOS Cascode Transconductance Amplifier. Basic topology. p-channel cascode current supply is an obvious solution CMOS Cascode Transconductance Amplifier Basic topology. Current Supply Topology p-channel cascode current supply is an obvious solution Current supply must have a very high source resistance r oc since

More information

ANALYSIS AND DESIGN OF ANALOG INTEGRATED CIRCUITS

ANALYSIS AND DESIGN OF ANALOG INTEGRATED CIRCUITS ANALYSIS AND DESIGN OF ANALOG INTEGRATED CIRCUITS Fourth Edition PAUL R. GRAY University of California, Berkeley PAUL J. HURST University of California, Davis STEPHEN H. LEWIS University of California,

More information

A CMOS Low-Voltage, High-Gain Op-Amp

A CMOS Low-Voltage, High-Gain Op-Amp A CMOS Low-Voltage, High-Gain Op-Amp G N Lu and G Sou LEAM, Université Pierre et Marie Curie Case 203, 4 place Jussieu, 75252 Paris Cedex 05, France Telephone: (33 1) 44 27 75 11 Fax: (33 1) 44 27 48 37

More information

Microelectronic Devices and Circuits Lecture 22 - Diff-Amp Anal. III: Cascode, µa Outline Announcements DP:

Microelectronic Devices and Circuits Lecture 22 - Diff-Amp Anal. III: Cascode, µa Outline Announcements DP: 6.012 Microelectronic Devices and Circuits Lecture 22 DiffAmp Anal. III: Cascode, µa741 Outline Announcements DP: Discussion of Q13, Q13' impact. Gain expressions. Review Output Stages DC Offset of an

More information

Differential Amplifier Design

Differential Amplifier Design Fall - 2009 EE114 - Design Project Differential Amplifier Design Submitted by Piyush Keshri (0559 4497) Jeffrey Tu (0554 4565) On November 20th, 2009 EE114 - Design Project Stanford University Page No.

More information

SP 22.3: A 12mW Wide Dynamic Range CMOS Front-End for a Portable GPS Receiver

SP 22.3: A 12mW Wide Dynamic Range CMOS Front-End for a Portable GPS Receiver SP 22.3: A 12mW Wide Dynamic Range CMOS Front-End for a Portable GPS Receiver Arvin R. Shahani, Derek K. Shaeffer, Thomas H. Lee Stanford University, Stanford, CA At submicron channel lengths, CMOS is

More information

Capacitive-Division Traveling-Wave Amplifier with 340 GHz Gain-Bandwidth Product

Capacitive-Division Traveling-Wave Amplifier with 340 GHz Gain-Bandwidth Product Hughes Presented at the 1995 IEEE MTT-S Symposium UCSB Capacitive-Division Traveling-Wave Amplifier with 340 GHz Gain-Bandwidth Product J. Pusl 1,2, B. Agarwal1, R. Pullela1, L. D. Nguyen 3, M. V. Le 3,

More information

1-13GHz Wideband LNA utilizing a Transformer as a Compact Inter-stage Network in 65nm CMOS

1-13GHz Wideband LNA utilizing a Transformer as a Compact Inter-stage Network in 65nm CMOS -3GHz Wideband LNA utilizing a Transformer as a Compact Inter-stage Network in 65nm CMOS Hyohyun Nam and Jung-Dong Park a Division of Electronics and Electrical Engineering, Dongguk University, Seoul E-mail

More information

DESIGN OF 3 TO 5 GHz CMOS LOW NOISE AMPLIFIER FOR ULTRA-WIDEBAND (UWB) SYSTEM

DESIGN OF 3 TO 5 GHz CMOS LOW NOISE AMPLIFIER FOR ULTRA-WIDEBAND (UWB) SYSTEM Progress In Electromagnetics Research C, Vol. 9, 25 34, 2009 DESIGN OF 3 TO 5 GHz CMOS LOW NOISE AMPLIFIER FOR ULTRA-WIDEBAND (UWB) SYSTEM S.-K. Wong and F. Kung Faculty of Engineering Multimedia University

More information

Design of High-Speed Op-Amps for Signal Processing

Design of High-Speed Op-Amps for Signal Processing Design of High-Speed Op-Amps for Signal Processing R. Jacob (Jake) Baker, PhD, PE Professor and Chair Boise State University 1910 University Dr. Boise, ID 83725-2075 jbaker@ieee.org Abstract - As CMOS

More information

ECEN689: Special Topics in High-Speed Links Circuits and Systems Spring 2012

ECEN689: Special Topics in High-Speed Links Circuits and Systems Spring 2012 ECEN689: Special Topics in High-Speed Links Circuits and Systems Spring 2012 Lecture 5: Termination, TX Driver, & Multiplexer Circuits Sam Palermo Analog & Mixed-Signal Center Texas A&M University Announcements

More information

UNIT I BIASING OF DISCRETE BJT AND MOSFET PART A

UNIT I BIASING OF DISCRETE BJT AND MOSFET PART A UNIT I BIASING OF DISCRETE BJT AND MOSFET PART A 1. Why do we choose Q point at the center of the load line? 2. Name the two techniques used in the stability of the q point.explain. 3. Give the expression

More information

Improving Amplifier Voltage Gain

Improving Amplifier Voltage Gain 15.1 Multistage ac-coupled Amplifiers 1077 TABLE 15.3 Three-Stage Amplifier Summary HAND ANALYSIS SPICE RESULTS Voltage gain 998 1010 Input signal range 92.7 V Input resistance 1 M 1M Output resistance

More information

Advanced OPAMP Design

Advanced OPAMP Design Advanced OPAMP Design Two Stage OPAMP with Cascoding To increase the gain, the idea of cascoding can be combined with the idea of cascading. A two stage amplifier with one stage being cascode is possible.

More information

DAT175: Topics in Electronic System Design

DAT175: Topics in Electronic System Design DAT175: Topics in Electronic System Design Analog Readout Circuitry for Hearing Aid in STM90nm 21 February 2010 Remzi Yagiz Mungan v1.10 1. Introduction In this project, the aim is to design an adjustable

More information

ANALYSIS AND DESIGN OF ANALOG INTEGRATED CIRCUITS

ANALYSIS AND DESIGN OF ANALOG INTEGRATED CIRCUITS ANALYSIS AND DESIGN OF ANALOG INTEGRATED CIRCUITS Fourth Edition PAUL R. GRAY University of California, Berkeley PAUL J. HURST University of California, Davis STEPHEN H. LEWIS University of California,

More information

CHAPTER 3 CMOS LOW NOISE AMPLIFIERS

CHAPTER 3 CMOS LOW NOISE AMPLIFIERS 46 CHAPTER 3 CMOS LOW NOISE AMPLIFIERS 3.1 INTRODUCTION The Low Noise Amplifier (LNA) plays an important role in the receiver design. LNA serves as the first block in the RF receiver. It is a critical

More information

Single-Stage Integrated- Circuit Amplifiers

Single-Stage Integrated- Circuit Amplifiers Single-Stage Integrated- Circuit Amplifiers Outline Comparison between the MOS and the BJT From discrete circuit to integrated circuit - Philosophy, Biasing, etc. Frequency response The Common-Source and

More information

Lecture 21: Voltage/Current Buffer Freq Response

Lecture 21: Voltage/Current Buffer Freq Response Lecture 21: Voltage/Current Buffer Freq Response Prof. Niknejad Lecture Outline Last Time: Frequency Response of Voltage Buffer Frequency Response of Current Buffer Current Mirrors Biasing Schemes Detailed

More information

Chapter 1. Introduction

Chapter 1. Introduction EECS3611 Analog Integrated Circuit esign Chapter 1 Introduction EECS3611 Analog Integrated Circuit esign Instructor: Prof. Ebrahim Ghafar-Zadeh, Prof. Peter Lian email: egz@cse.yorku.ca peterlian@cse.yorku.ca

More information

Gechstudentszone.wordpress.com

Gechstudentszone.wordpress.com UNIT 4: Small Signal Analysis of Amplifiers 4.1 Basic FET Amplifiers In the last chapter, we described the operation of the FET, in particular the MOSFET, and analyzed and designed the dc response of circuits

More information

AN-1106 Custom Instrumentation Amplifier Design Author: Craig Cary Date: January 16, 2017

AN-1106 Custom Instrumentation Amplifier Design Author: Craig Cary Date: January 16, 2017 AN-1106 Custom Instrumentation Author: Craig Cary Date: January 16, 2017 Abstract This application note describes some of the fine points of designing an instrumentation amplifier with op-amps. We will

More information

ISSCC 2004 / SESSION 26 / OPTICAL AND FAST I/O / 26.8

ISSCC 2004 / SESSION 26 / OPTICAL AND FAST I/O / 26.8 ISSCC 2004 / SESSION 26 / OPTICAL AND FAST I/O / 26.8 26.8 A 2GHz CMOS Variable-Gain Amplifier with 50dB Linear-in-Magnitude Controlled Gain Range for 10GBase-LX4 Ethernet Chia-Hsin Wu, Chang-Shun Liu,

More information

55:041 Electronic Circuits

55:041 Electronic Circuits 55:041 Electronic Circuits MOSFETs Sections of Chapter 3 &4 A. Kruger MOSFETs, Page-1 Basic Structure of MOS Capacitor Sect. 3.1 Width = 1 10-6 m or less Thickness = 50 10-9 m or less ` MOS Metal-Oxide-Semiconductor

More information

EE 435 Lecture 15. Two-Stage Op Amp Design

EE 435 Lecture 15. Two-Stage Op Amp Design EE 435 Lecture 15 Two-Stage Op Amp Design Review from Last Time Cascaded Amplifier Issues A A 0 p s p Single-stage amplifiers -- widely used in industry, little or no concern about compensation Two amplifier

More information

Multistage Amplifiers

Multistage Amplifiers Multistage Amplifiers Single-stage transistor amplifiers are inadequate for meeting most design requirements for any of the four amplifier types (voltage, current, transconductance, and transresistance.)

More information

INF3410 Fall Book Chapter 6: Basic Opamp Design and Compensation

INF3410 Fall Book Chapter 6: Basic Opamp Design and Compensation INF3410 Fall 2015 Book Chapter 6: Basic Opamp Design and Compensation content Introduction Two Stage Opamps Compensation Slew Rate Systematic Offset Advanced Current Mirrors Operational Transconductance

More information

Microelectronics Part 2: Basic analog CMOS circuits

Microelectronics Part 2: Basic analog CMOS circuits GBM830 Dispositifs Médicaux Intelligents Microelectronics Part : Basic analog CMOS circuits Mohamad Sawan et al. Laboratoire de neurotechnologies Polystim!! http://www.cours.polymtl.ca/gbm830/! mohamad.sawan@polymtl.ca!

More information

Design of Rail-to-Rail Op-Amp in 90nm Technology

Design of Rail-to-Rail Op-Amp in 90nm Technology IJSTE - International Journal of Science Technology & Engineering Volume 1 Issue 2 August 2014 ISSN(online) : 2349-784X Design of Rail-to-Rail Op-Amp in 90nm Technology P R Pournima M.Tech Electronics

More information

Lecture 21 - Multistage Amplifiers (I) Multistage Amplifiers. November 22, 2005

Lecture 21 - Multistage Amplifiers (I) Multistage Amplifiers. November 22, 2005 6.02 Microelectronic Devices and Circuits Fall 2005 Lecture 2 Lecture 2 Multistage Amplifiers (I) Multistage Amplifiers November 22, 2005 Contents:. Introduction 2. CMOS multistage voltage amplifier 3.

More information

F9 Differential and Multistage Amplifiers

F9 Differential and Multistage Amplifiers Lars Ohlsson 018-10-0 F9 Differential and Multistage Amplifiers Outline MOS differential pair Common mode signal operation Differential mode signal operation Large signal operation Small signal operation

More information

Homework Assignment 07

Homework Assignment 07 Homework Assignment 07 Question 1 (Short Takes). 2 points each unless otherwise noted. 1. A single-pole op-amp has an open-loop low-frequency gain of A = 10 5 and an open loop, 3-dB frequency of 4 Hz.

More information

ECE 255, MOSFET Basic Configurations

ECE 255, MOSFET Basic Configurations ECE 255, MOSFET Basic Configurations 8 March 2018 In this lecture, we will go back to Section 7.3, and the basic configurations of MOSFET amplifiers will be studied similar to that of BJT. Previously,

More information

Current Mirrors. Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 4-1

Current Mirrors. Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 4-1 Current Mirrors Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 4- 郭泰豪, Analog C Design, 08 { Prof. Tai-Haur Kuo, EE, NCKU, Tainan City, Taiwan 4- 郭泰豪, Analog C Design, 08 { Current Source and Sink Symbol

More information

Lecture 030 ECE4430 Review III (1/9/04) Page 030-1

Lecture 030 ECE4430 Review III (1/9/04) Page 030-1 Lecture 030 ECE4430 Review III (1/9/04) Page 0301 LECTURE 030 ECE 4430 REVIEW III (READING: GHLM Chaps. 3 and 4) Objective The objective of this presentation is: 1.) Identify the prerequisite material

More information

Unit 3: Integrated-circuit amplifiers (contd.)

Unit 3: Integrated-circuit amplifiers (contd.) Unit 3: Integrated-circuit amplifiers (contd.) COMMON-SOURCE AND COMMON-EMITTER AMPLIFIERS The Common-Source Circuit The most basic IC MOS amplifier is shown in fig.(1). The source of MOS transistor is

More information

Lecture 300 Low Voltage Op Amps (3/28/10) Page 300-1

Lecture 300 Low Voltage Op Amps (3/28/10) Page 300-1 Lecture 300 Low Voltage Op Amps (3/28/10) Page 300-1 LECTURE 300 LOW VOLTAGE OP AMPS LECTURE ORGANIZATION Outline Introduction Low voltage input stages Low voltage gain stages Low voltage bias circuits

More information

6.976 High Speed Communication Circuits and Systems Lecture 11 Voltage Controlled Oscillators

6.976 High Speed Communication Circuits and Systems Lecture 11 Voltage Controlled Oscillators 6.976 High Speed Communication Circuits and Systems Lecture 11 Voltage Controlled Oscillators Michael Perrott Massachusetts Institute of Technology Copyright 2003 by Michael H. Perrott VCO Design for Wireless

More information

CMOS Operational-Amplifier

CMOS Operational-Amplifier CMOS Operational-Amplifier 1 What will we learn in this course How to design a good OP Amp. Basic building blocks Biasing and Loading Swings and Bandwidth CH2(8) Operational Amplifier as A Black Box Copyright

More information

Design for MOSIS Educational Program (Research) Testing Report for Project Number 89742

Design for MOSIS Educational Program (Research) Testing Report for Project Number 89742 Design for MOSIS Educational Program (Research) Testing Report for Project Number 89742 Prepared By: Kossi Sessou (Graduate Student) and Nathan Neihart (Assistant Professor) Bin Huang (Graduate Student)

More information

CMOS Operational-Amplifier

CMOS Operational-Amplifier CMOS Operational-Amplifier 1 What will we learn in this course How to design a good OP Amp. Basic building blocks Biasing and Loading Swings and Bandwidth CH2(8) Operational Amplifier as A Black Box Copyright

More information

Performance Evaluation of Different Types of CMOS Operational Transconductance Amplifier

Performance Evaluation of Different Types of CMOS Operational Transconductance Amplifier Performance Evaluation of Different Types of CMOS Operational Transconductance Amplifier Kalpesh B. Pandya 1, Kehul A. shah 2 1 Gujarat Technological University, Department of Electronics & Communication,

More information