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2 FEATRES Supply Current µa (Max per Amplifier) Guaranteed Over Temperature Offset Voltage µv (Max) Offset Voltage Drift nv/ C (Max) Common Mode Input Range from V to V.V Output Swings Rail-to-Rail Voltage Gain: db (Typ) PSRR and CMRR: db (Typ) Input Bias Current: pa (Typ, C) Noise:.µV P-P (.Hz to Hz Typ) Supply Operation:.7V to V (LTC/LTC).7V to ±.V (LTCHV/LTCHV) Low Profile (mm) SOT-, MS and mm mm.mm DFN Packages APPLICATIO S Thermocouple Amplifiers Electronic Scales Medical Instrumentation Strain Gauge Amplifiers High Resolution Data Acquisition DC Accurate RC Active Filters Low Side Current Sense Battery-Powered Systems LTC/LTC Single/Dual Micropower Zero-Drift Operational Amplifiers DESCRIPTIO The LTC /LTC are low power, low noise single/ dual zero-drift operational amplifiers available in the SOT- (ThinSOT TM ) and MS packages. For space limited applications, the LTC is also available in a mm mm.mm dual fine pitch leadless package (DFN). They operate from a single.7v minimum supply and support ±V applications. The current consumption is typically µa for the LTC and µa/amp for the LTC. The LTC/LTC, despite their miniature size, feature uncompromising DC performance. The typical input offset voltage and offset drift are.µv and nv/ C. The almost zero DC offset and drift are supported with a power supply rejection ratio (PSRR) and common mode rejection ratio (CMRR) of more than db. The input common mode voltage ranges from the negative supply up to typically.v from the positive supply. The open-loop gain is typically db. The LTC/LTC also feature a.µv P-P DC to Hz noise and a khz gain-bandwidth product., LTC and LT are registered trademarks of Linear Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation TYPICAL APPLICATIO BZXCV V Z =. V SPPLY 9k Ω % Ω.Ω % W I SENSE, V SENSE V Low Side Precision Current Sense LTC.µF Q ZETEX ZVNF.µF TA.µF k % V LTC V LOAD V OT = V SENSE SPPLY CRRENT (µa) Supply Current (per Amplifier) 7 LTC LTC 7 7 TEMPERATRE ( C) TAb sn fas

3 LTC/LTC ABSOLTE AXI RATI GS W W W Total Supply Voltage (V to V ) LTC/LTC... 7V LTCHV/LTCHV... V Input Voltage... (V.V) to (V.V) Input Current... ±ma Output Short-Circuit Duration... Indefinite W PACKAGE/ORDER I FOR ATIO (Note ) Operating Temperature Range... C to C Specified Temperature Range (Note ) C to C Storage Temperature Range... C to C DD Package... C to C Lead Temperature (Soldering, sec)... C TOP VIEW OT V IN TOP VIEW V IN S PACKAGE -LEAD PLASTIC SOT- T JMAX = C, θ JA = C/W ORDER PART NMBER* LTCCS LTCHVCS LTCIS LTCHVIS LTCHS LTCHVHS S PART MARKING LTAGB LTAGD LTAGB LTAGD LTAGB LTAGD OT A IN A IN A V DD PACKAGE -LEAD (mm mm) PLASTIC DFN NDERSIDE METAL INTERNALLY CONNECTED TO V (PCB CONNECTION OPTIONAL) T JMAX = C, θ JA = C/W, NOTE ORDER PART NMBER* LTCCDD LTCHVCDD LTCIDD LTCHVIDD LTCHDD LTCHVHDD 7 V OT B IN B IN B DD PART MARKING LBCW LBCX LBCW LBCX LBCW LBCX OT A IN A IN A V TOP VIEW MS PACKAGE -LEAD PLASTIC MSOP V 7 OT B IN B IN B T JMAX = C, θ JA = C/W ORDER PART NMBER* LTCCMS LTCHVCMS LTCIMS LTCHVIMS LTCHMS LTCHVHMS MS PART MARKING LTBCR LTBCT LTBCR LTBCT LTBCR LTBCT *The temperature grade (C, I or H) is indicated on the shipping container. Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS (LTC/LTC, LTCHV/LTCHV) The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T A = C. V S = V, V unless otherwise noted. (Note ) LTCC/LTCC LTCI/LTCI LTCH/LTCH SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX NITS I S Supply Current (LTC) No Load, V S = V 7 µa No Load, V S = V 7 µa I S Supply Current Per Amplifier No Load, V S = V µa (LTC) No Load, V S = V µa V OS Input Offset Voltage (Note ) ±. ± ±. ± µv V OS / T Average Input Offset Drift (Note ). ±.. ±. µv/ C Long-Term Offset Drift nv/ mo I B Input Bias Current (Note ) V S = V ± ± pa V S = V ± ± pa V S = V ± ± pa V S = V ± ± pa sn fas

4 ELECTRICAL CHARACTERISTICS LTC/LTC (LTC/LTC, LTCHV/LTCHV) The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T A = C. V S = V, V unless otherwise noted. (Note ) LTCC/LTCC LTCI/LTCI LTCH/LTCH SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX NITS I OS Input Offset Current (Note ) V S = V ± ± pa V S = V ± ±7 pa V S = V ± ± pa V S = V ± ±7 pa e n Input Noise Voltage R S = Ω, DC to Hz.. µv P-P R S = Ω, DC to Hz.. µv P-P CMRR Common Mode Rejection Ratio V CM = GND to V.7V db V S = V db V CM = GND to V.7V db V S = V db PSRR Power Supply Rejection Ratio V S =.7V to V db db A VOL Large-Signal Voltage Gain R L = k, V S = V, V OT = V S / db db R L = k, V S = V, V OT = V S / db db V OT Output Voltage Swing High R L = k to GND, V S = V V R L = k to GND, V S = V.. V R L = k to GND, V S = V.... V R L = k to GND, V S = V.7.7 V R L = k to GND, V S = V V R L = k to GND, V S = V V R L = k to GND, V S = V V R L = k to GND, V S = V.9.97 V V OT Output Voltage Swing Low R L = k to GND, V S = V mv R L = k to GND, V S = V mv R L = k to GND, V S = V mv R L = k to GND, V S = V mv R L = k to GND, V S = V mv R L = k to GND, V S = V mv R L = k to GND, V S = V mv R L = k to GND, V S = V mv SR Slew Rate.. V/µs GBW Gain Bandwidth Product khz f S Internal Sampling Frequency khz sn fas

5 LTC/LTC ELECTRICAL CHARACTERISTICS (LTCHV/LTCHV) The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T A = C. V S = ±V unless otherwise noted. (Note ) LTCHVC/LTCHVC LTCHVI/LTCHVI LTCHVH/LTCHVH SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX NITS I S Supply Current No Load (LTC) 7 7 µa I S Supply Current (Per Amplifier) No Load (LTC) µa V OS Input Offset Voltage (Note ) ±. ± ±. ± µv V OS / T Average Input Offset Drift (Note ). ±.. ±. µv/ C Long-Term Offset Drift nv/ mo I B Input Bias Current (Note ) ± ± pa ± ± pa I OS Input Offset Current (Note ) ± ± pa ± ±7 pa e n Input Noise Voltage R S = Ω, DC to Hz.. µv P-P R S = Ω, DC to Hz.. µv P-P CMRR Common Mode Rejection Ratio V CM = GND to V.9 db db PSRR Power Supply Rejection Ratio V S =.7V to V db db AVOL Large-Signal Voltage Gain R L = k, V OT = GND db db V OT Maximum Output Voltage Swing R L = k to GND ±.7 ±. ±.7 ±. V R L = k to GND ±.7 ±.7 V R L = k to GND ±.9 ±.99 ±.9 ±.99 V R L = k to GND ±.97 ±.97 V SR Slew Rate.. V/µs GBW Gain Bandwidth Product khz f S Internal Sampling Frequency khz Note : Absolute Maximum Ratings are those values beyond which the life of the device may be impaired. Note : These parameters are guaranteed by design. Thermocouple effects preclude measurements of these voltage levels during automated testing. Note : All versions of the LTC/LTC are designed, characterized and expected to meet the extended temperature limits of C and C. The LTCC/LTCC/LTCHVC/LTCHVC are guaranteed to meet the temperature limits of C and 7 C. The LTCI/ LTCI/LTCHVI/LTCHVI are guaranteed to meet temperature limits of C and C. The LTCH/LTCH and LTCHVH/ LTCHVH are guaranteed to meet the temperature limits of C and C. Note : Limit is determined by high speed automated test capability. See Typical Chacteristic curves for actual typical performance. For tighter specifications, please consult Linear Technology Marketing. Note : The θ JA specified for the DD package is with minimal PCB heat spreading metal. sing expanded metal area on all layers of a board reduces this value. sn fas

6 LTC/LTC TYPICAL PERFOR A CE CHARACTERISTICS W CMRR (db) Common Mode Rejection Ratio vs Frequency V S = V OR V V CM =.V P-P k k k FREQENCY (Hz) G CMRR (db) DC CMRR vs Common Mode Input Range V S = V V S = V T A = C V CM (V) G PSRR (db) PSRR vs Frequency V S = ±.V PSRR PSRR k k k M FREQENCY (Hz) G OTPT SWING (V) Output Voltage Swing vs Load Resistance V S = ±V V S = ±.V V S = ±.V V S = ±.V V S = ±.V R L TO GND V S = ±V LOAD RESISTANCE (kω) OTPT SWING (V) V. Output Swing vs Load Current V. V S = ±.V V. V S = ±.V V S = ±.V V S = ±.V V S = ±V V S = ±V V SORCING OR SINKING LOAD CRRENT (ma) V V. V. V. SHORT-CIRCIT OTPT CRRENT, I OT (ma) Short-Circuit Output Current vs Supply Voltage I SINK V OT = V I SORCE V OT = V 7 9 TOTAL SPPLY VOLTAGE, V TO V (V) G G G GAIN (db) Gain/Phase vs Frequency PHASE GAIN V S = ±.V V IN =.V P-P R L = kω G7 C L = pf C L = pf C L = pf k k k M M FREQENCY (Hz) PHASE (DEG) BIAS CRRENT (pa) Input Bias Current vs Temperature. V S = V V S = V V S = V 7 TEMPERATRE ( C) G BIAS CRRENT (pa) Input Bias Current vs Input Common Mode Voltage V SPPLY = ±.V T A = 7 C T A = C T A = C T A = C T A = C COMMON MODE VOLTAGE (V) G9 sn fas

7 LTC/LTC TYPICAL PERFOR A CE CHARACTERISTICS W Transient Response Output Overload Recovery Output Overload Recovery OTPT (V) INPT (V) OTPT (V).. OTPT (V) INPT (V).. A V = µs/div R L = k C L = pf V S = ±.V V IN = khz V P-P G A V = R L = k V S = ±.V ms/div G A V = R L = k V S = ±.V ms/div G COMMON MODE RANGE (V) Common Mode Input Range vs Supply Voltage C T A = C SPPLY VOLTAGE (V) 9 SPPLY CRRENT (µa) 7 7 LTC Supply Current vs Supply Voltage 7 9 TOTAL SPPLY VOLTAGE (V) SPPLY CRRENT (µa) LTC Supply Current vs Temperature V S = ±V 7 V S = V V S = V 7 7 TEMPERATRE ( C) G G G SPPLY CRRENT (µa) 7 7 LTC Supply Current (Per Amplifier) vs Supply Voltage 7 9 TOTAL SPPLY VOLTAGE (V) G7 SPPLY CRRENT (µa) LTC Supply Current (Per Amplifier) vs Temperature 7 V S = ±V V S = V V S = V 7 7 TEMPERATRE ( C) G INPT REFFERED VOLTAGE NOISE DENSITY (nv/ Hz) Noise Spectrum 9 7 A V = V S = ±.V k k FREQENCY (Hz) G9 sn fas

8 LTC/LTC TEST CIRCITS Electrical Characteristics Test Circuit Ω k V LTC/ V R L OTPT TC DC-Hz Noise Test Circuit k 7k Ω k k 7k LTC/.µF.µF LT.µF TO X-Y RECORDER FOR Hz NOISE BW INCREASE ALL THE CAPACITORS BY A FACTOR OF. TC sn fas 7

9 LTC/LTC APPLICATIO S I FOR ATIO W Clock Feedthrough, Input Bias Current The LTC and LTC use auto-zeroing circuitry to achieve an almost zero DC offset over temperature, common mode voltage, and power supply voltage. The frequency of the clock used for auto-zeroing is typically.khz. The term clock feedthrough is broadly used to indicate visibility of this clock frequency in the op amp output spectrum. There are typically two types of clock feedthrough in auto zeroed op amps like the LTC/ LTC. The first form of clock feedthrough is caused by the settling of the internal sampling capacitor and is input referred; that is, it is multiplied by the closed loop gain of the op amp. This form of clock feedthrough is independent of the magnitude of the input source resistance or the magnitude of the gain setting resistors. The LTC/ LTC have a residue clock feedthrough of less then.µv RMS input referred at.khz. The second form of clock feedthrough is caused by the small amount of charge injection occurring during the sampling and holding of the op amp s input offset voltage. The current spikes are multiplied by the impedance seen at the input terminals of the op amp, appearing at the output multiplied by the closed loop gain of the op amp. To reduce this form of clock feedthrough, use smaller valued gain setting resistors and minimize the source resistance at the input. If the resistance seen at the inputs is less than k, this form of clock feedthrough is less than the amount of residue clock feedthrough from the first form described above. Placing a capacitor across the feedback resistor reduces either form of clock feedthrough by limiting the bandwidth of the closed loop gain. Input bias current is defined as the DC current into the input pins of the op amp. The same current spikes that LTC/LTC DC to Hz Noise.µV SEC G LTC/LTC DC to Hz Noise µv SEC G7 sn fas

10 LTC/LTC APPLICATIO S I FOR ATIO W cause the second form of clock feedthrough described above, when averaged, dominate the DC input bias current of the op amp below 7 C. At temperatures above 7 C, the leakage of the ESD protection diodes on the inputs increases the input bias currents of both inputs in the positive direction, while the current caused by the charge injection stays relatively constant. At elevated temperatures (above 7 C) the leakage current begins to dominate and both the negative and positive pins input bias currents are in the positive direction (into the pins). Extended Common Mode Range The LTC/LTC input stage is designed to allow nearly rail-to-rail input common mode signals. In addition, signals that extend beyond the allowed input common mode range do not cause output phase inversion. OTPT INPT VOT = V/DIV VIN = V/DIV Voltage Follower with Input Exceeding the Common Mode Range V V k ±.7V P SINE WAVE.V LTC/.V OTPT k LTC/LTC Extended Common Mode Range TA9 A V = µs/div R L = k V S = ±.V V IN = Hz 7.V P-P G9 TYPICAL APPLICATIO S Simple Differential Bridge Amplifier V V LT79-. µf.µf 99k kω BRIDGE LTCHV A V =.µf 99k V TA sn fas 9

11 LTC/LTC TYPICAL APPLICATIO S Ground Referred Precision Current Sources k LT-. V LTC I OT µa.v V OT (V ).V R SET.V I OT = R SET V OT I OT µa (V ).V V OT V k LTC V LT-. V OT.V I OT = R SET R SET TA Instrumentation Amplifier with V Common Mode Input Voltage k M V V IN M M k / k LTCHV / LTCHV V 7 V OT OTPT OFFSET mv FOR.% RESISTORS, CMRR = db TA Gain of Single Supply Instrumentation Amplifier R k C.µF R M V R k / LTC V IN VIN R M / LTC 7 V OT OTPT DC OFFSET mv FOR.% RESISTORS, CMRR = db TA sn fas

12 LTC/LTC PACKAGE DESCRIPTIO.7 ±. DD Package -Lead Plastic DFN (mm mm) (Reference LTC DWG # --9) R =. TYP. ±.. ±.. ±.. ±. ( SIDES). ±.. BSC. ±. ( SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS.9 ±.7 (. ±.) PACKAGE OTLINE PIN TOP MARK (NOTE ). REF. ±. ( SIDES).7 ±.. ±. ( SIDES).. MS Package -Lead Plastic MSOP (Reference LTC DWG # --). ±. (. ±.) (NOTE ) 7. ±.. ±. ( SIDES) BOTTOM VIEW EXPOSED PAD. (.) REF. BSC NOTE:. DRAWING TO BE MADE A JEDEC PACKAGE OTLINE M-9 VARIATION OF (WEED-). DRAWING NOT TO SCALE. ALL DIMENSIONS ARE IN MILLIMETERS. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED.mm ON ANY SIDE. EXPOSED PAD SHALL BE SOLDER PLATED. SHADED AREA IS ONLY A REFERENCE FOR PIN LOCATION ON TOP AND BOTTOM OF PACKAGE (DD) DFN. (.) MIN. ±. (. ±.) TYP.. (..). (.) BSC RECOMMENDED SOLDER PAD LAYOT GAGE PLANE. (.7). (.) DETAIL A DETAIL A TYP. ±. (. ±.) SEATING PLANE.9 ±. (.9 ±.). (.) MAX.. (.9.) TYP. (.) BSC S Package -Lead Plastic TSOT- (Reference LTC DWG # --). ±. (. ±.) (NOTE ). (.) REF.7 ±.7 (. ±.) MSOP (MS) NOTE:. DIMENSIONS IN MILLIMETER/(INCH). DRAWING NOT TO SCALE. DIMENSION DOES NOT INCLDE MOLD FLASH, PROTRSIONS OR GATE BRRS.MOLD FLASH, PROTRSIONS OR GATE BRRS SHALL NOT EXCEED.mm (.") PER SIDE. DIMENSION DOES NOT INCLDE INTERLEAD FLASH OR PROTRSIONS. INTERLEAD FLASH OR PROTRSIONS SHALL NOT EXCEED.mm (.") PER SIDE. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE.mm (.") MAX. MAX.9 REF.. (NOTE ). REF. MAX. REF. BSC DATM A. MIN RECOMMENDED SOLDER PAD LAYOT PER IPC CALCLATOR.9. (NOTE )....7 (NOTE ).9. PIN ONE.9..9 BSC.. TYP PLCS NOTE.. NOTE:. DIMENSIONS ARE IN MILLIMETERS. DRAWING NOT TO SCALE. DIMENSIONS ARE INCLSIVE OF PLATING. DIMENSIONS ARE EXCLSIVE OF MOLD FLASH AND METAL BRR. MOLD FLASH SHALL NOT EXCEED.mm. PACKAGE EIAJ REFERENCE IS SC-7A (EIAJ) ATTENTION: ORIGINAL SOT-L PACKAGE. MOST SOT-L PRODCTS CONVERTED TO THIN SOT PACKAGE, DRAWING # -- AFTER APPROXIMATELY APRIL SHIP DATE.. REF.9 BSC Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. S SOT- sn fas

13 LTC/LTC TYPICAL APPLICATIO S N.9V Z Low Power, Bidirectional V Precision Hi Side Current Sense µf LTC7- µf POSITIVE SENSE BAT µf mω V SENSE Ω.µF Ω LTC PRECISION BIDIRECTIONAL GAIN OF.µF.k Ω N 7 V S V S ON V OFF V MPSA.7k POWER SPPLY (NOTE: POSITIVE CRRENT SENSE INCLDES CIRCIT SPPLY CRRENT) PRECISION BIDIRECTIONAL HIGH VOLTAGE LEVEL SHIFT AND GAIN OF LT77HV V OT =.V * V SENSE.7µF.V REF TA Precision Low Drift Integrator OPEN t = t O S µf Ω ltra-precision, Wide Dynamic Range Hz Bandwidth Photodiode Amplifier k.µf V IN MΩ V LTCHV V TA7 t t O V IN (t) sec dt GAIN =.V/µA ~pa RESOLTION µa FLL SCALE ANY PHOTODIODE k V LTC V k.µf TA RELATED PARTS PART NMBER DESCRIPTION COMMENTS LTC9 Low Power Zero-Drift Op Amp Low Supply Current µa LTC Precision Zero-Drift Op Amp Single Supply Operation.7V to V, Noise Tested and Guaranteed LTC/LTC Precision Zero-Drift Op Amp Dual/Quad Version of the LTC LTC ±V Zero-Drift Op Amp High Voltage Operation ±V LTC Rail-to-Rail Input and Output Zero-Drift Op Amp Single Zero-Drift Op Amp with Rail-to-Rail Input and Output and Shutdown LT77 Low Noise Rail-to-Rail Input and Ouptput V OS = 9µV, V S =.7V to V Precision Op Amp LT/LT Rail-to-Rail Output Precision Op Amp V OS = µv, I B = pa, V S =.7V to V LTC Zero-Drift Op Amp Enhanced Output Drive Capability LTC/LTC Dual/Quad Zero-Drift Op Amp Dual/Quad Version of the LTC in MS/GN Package LTC Zero-Drift Instrumentation Amp Rail-to-Rail Input Linear Technology Corporation McCarthy Blvd., Milpitas, CA 9-77 () -9 FAX: () -7 sn fas LT/TP K REV A PRINTED IN SA LINEAR TECHNOLOGY CORPORATION

FEATURES DESCRIPTIO APPLICATIO S. LTC2050/LTC2050HV Zero-Drift Operational Amplifiers in SOT-23 TYPICAL APPLICATION

FEATURES DESCRIPTIO APPLICATIO S. LTC2050/LTC2050HV Zero-Drift Operational Amplifiers in SOT-23 TYPICAL APPLICATION FEATRES Maximum Offset Voltage of µv Maximum Offset Voltage Drift of nv/ C Noise:.µV P-P (.Hz to Hz Typ) Voltage Gain: db (Typ) PSRR: db (Typ) CMRR: db (Typ) Supply Current:.8mA (Typ) Supply Operation:.7V