DESCRIPTIO. LT1413 Single Supply, Dual Precision Op Amp

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1 Single Supply, Dual Precision Op Amp FEATRES Single Supply Operation: Input Goes Below Ground Output Swings to Ground Sinking Current No Pull-Down Resistors Needed Phase Reversal Protection At V, V Low Cost Grade Specifications: 8µV Max Offset Voltage 38µV Max in S8 Package.8nA Max Offset Current 8µA Max Supply Current per Amplifier.µV/ C Drift. Million Voltage Gain 9kHz Gain-Bandwidth Product.µV P-P,.Hz to Hz Noise APPLICATI O S Single Supply Systems Two and Three Op Amp Instrumentation Amplifiers Active Filters Battery-Powered Systems Strain Gauge and Bridge Amplifiers DESCRIPTIO The LT3 is a low cost, upgraded version of Linear Technology s industry standard LT3 dual, single supply op amp. The LT3 is optimized for single V applications, although ±V specifications are also provided for completeness. In the design of the LT3, particular emphasis has been placed on low cost plastic and SO-8 package performance: 6µV offset voltage,.na offset current, in excess of ma output current at 33µA supply current and db channel separation are some of the specifications achieved. Other dual, single supply amplifiers are available to complement the LT3 family: the micropower LT78 s supply current is times lower with a. fold speed performance degradation compared to the LT3. Conversely, the LT, LT3 and LT duals have to times higher supply current, but also 3 to times higher speed. Protected by.s. Patent,77,88. TYPICAL APPLICATI O +9V, 3V Common-Mode Range Difference Amplifier (A V = ) Distribution of Input Offset Voltage (In Plastic DIP, N8 Package) INPT + M M M M 3 / LT3 + M 9V 8 OTPT mv TO 8V PERCENT OF NITS 3 V S = V, V M OTPT OFFSET =.mv (INPT REFERRED =µv) INPT RESISTANCE =M BANDIDTH = 8kHz (THE.nA TYPICAL OFFSET CRRENT PERMITS THE SE OF MΩ RESISTORS) LT3 TA3 3 3 INPT OFFSET VOLTAGE (µv) LT3 TA

2 ABSOLTE AXI RATI GS Supply Voltage... ±V Differential Input Voltage... ±3V Input Voltage... Equal to Positive Supply Voltage V Below Negative Supply Voltage Output Short-Circuit Duration... Indefinite Operating Temperature Range... C to 8 C Storage Temperature Range... 6 C to C Lead Temperature (Soldering, sec)... 3 C Note: hen the input voltage exceeds the maximum ratings, the input current should be limited to ma. PACKAGE/ORDER I FOR OT A IN A +IN A 3 V A TOP VIE T JMAX = C, θ JA = 3 C/ B N8 PACKAGE 8-LEAD PLASTIC DIP 8 V + 7 OT B 6 IN B +IN B ATIO ORDER PART NMBER LT3CN8 +IN A V +IN B 3 IN B TOP VIE A B S8 PACKAGE 8-LEAD PLASTIC SOIC 8 IN A 7 OT A 6 V + OT B NOTE: THIS PIN CONFIGRATION DIFFERS FROM THE 8-LEAD DIP PIN LOCATIONS. INSTEAD, IT FOLLOS THE INDSTRY STANDARD LT3DS8 SO PACKAGE CONFIGRATION. T JMAX = C, θ JA = C/ ORDER PART NMBER LT3S8 S8 PART MARKING 3 ELECTRICAL CHARA CTERISTICS V S = V, V, V CM =.V, V O =.V,, unless otherwise noted. SYMBOL PARAMETER CONDITIONS (Note ) MIN TYP MAX MIN TYP MAX NITS V OS Input Offset Voltage LT3N8 6 8 µv LT3S µv V OS Long-Term Input Offset.. µv/mo Time Voltage Stability I OS Input Offset Current na I B Input Bias Current na e n Input Noise Voltage.Hz to Hz (Note )... µv P-P Input Noise Voltage Density f O = Hz (Note ) 38 nv/ Hz f O = Hz (Note ) nv/ Hz i n Input Noise Current.Hz to Hz.8.8 pa P-P Input Noise Current Density f O = Hz.7.7 pa/ Hz f O = Hz.. pa/ Hz Input Resistance (Note 3) Differential Mode 3 MΩ Common Mode 3 3 GΩ Input Voltage Range V.3.3 V CMRR Common-Mode Rejection Ratio V CM = V to 3.6V 9 88 db PSRR Power Supply Rejection Ratio V S = 3.V to V 8 8 db A VOL Large-Signal Voltage Gain V O =.V to V, No Load 3 V/mV V O =.V to 3.V, R L = k 3 V/mV

3 ELECTRICAL CHARA CTERISTICS LT3 SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX NITS Maximum Output Voltage Swing Output Low, No Load mv Output Low, 6Ω to GND mv Output Low, I SINK = ma 3 3 mv Output High, No Load.... V Output High, 6Ω to GND V SR Slew Rate A V = V/µs GB Gain-Bandwidth Product f O khz (Note ) khz I S Supply Current per Amplifier µa Channel Separation V IN = 3V, R L = k (Note ) 3 db Minimum Supply Voltage (Note 6) V V S = V, V, V CM =.V, V O =.V, C T A 7 C, unless otherwise noted. SYMBOL PARAMETER CONDITIONS (Note ) MIN TYP MAX MIN TYP MAX NITS V OS Input Offset Voltage LT3N µv LT3S8 9 µv V OS / T Input Offset Voltage Drift (Note ).3... µv/ C I OS Input Offset Current.... na I B Input Bias Current 3 na CMRR Common-Mode Rejection Ratio V CM = V to 3.6V 88 8 db PSRR Power Supply Rejection Ratio V S = 3.V to V db A VOL Large-Signal Voltage Gain V O =.7V to 3.9V, No Load 3 3 V/mV V O =.7V to 3.V, R L = k 8 8 V/mV Maximum Output Voltage Swing Output Low, No Load mv Output Low, I SINK = ma mv Output High, No Load V Output High, 6Ω to GND V I S Supply Current per Amplifier µa V S = V, V, V CM =.V, V O =.V, C T A 8 C (Note 7) V S = V, V, V CM =.V, V O =.V,, unless otherwise noted. SYMBOL PARAMETER CONDITIONS (Note ) MIN TYP MAX MIN TYP MAX NITS V OS Input Offset Voltage LT3N µv LT3S8 7 µv V OS / T Input Offset Voltage Drift µv/ C I OS Input Offset Current....7 na I B Input Bias Current 3 na CMRR Common-Mode Rejection Ratio V CM = V to 3.V db PSRR Power Supply Rejection Ratio V S = 3.9V to V db A VOL Large-Signal Voltage Gain V O =.8V to 3.8V, No Load V/mV V O =.8V to 3.V, R L = k 7 7 V/mV Maximum Output Voltage Swing Output Low, No Load mv Output Low, I SINK = ma mv Output High, No Load V Output High, 6Ω to GND V I S Supply Current per Amplifier µa 3

4 ELECTRICAL CHARA CTERISTICS SYMBOL PARAMETER CONDITIONS (Note ) MIN TYP MAX MIN TYP MAX NITS V OS Input Offset Voltage LT3N µv LT3S8 8 µv I OS Input Offset Current na I B Input Bias Current na Input Voltage Range V V CMRR Common-Mode Rejection Ratio V CM = 3.V, V 7 97 db PSRR Power Supply Rejection Ratio V S = ±V to ±8V 3 7 db A VOL Large-Signal Voltage Gain V O = ±V, R L = k V/mV V OT Maximum Output Voltage Swing R L = k ±3 ± ±. ± V SR Slew Rate.... V/µs I S Supply Current per Amplifier 3 3 µa V S = ±V, C T A 7 C, unless otherwise noted. SYMBOL PARAMETER CONDITIONS (Note ) MIN TYP MAX MIN TYP MAX NITS V OS Input Offset Voltage LT3N µv LT3S8 3 7 µv V OS / T Input Offset Voltage Drift (Note ) µv/ C I OS Input Offset Current.... na I B Input Bias Current na A VOL Large-Signal Voltage Gain V O = ±V, R L = k 7 3 V/mV CMRR Common-Mode Rejection Ratio V CM = 3V, V db PSRR Power Supply Rejection Ratio V S = ±V to ±8V db Maximum Output Voltage Swing R L = k ±. ±3.9 ±. ±3.9 V I S Supply Current per Amplifier µa V S = ±V, C T A 8 C (Note 7) SYMBOL PARAMETER CONDITIONS (Note ) MIN TYP MAX MIN TYP MAX NITS V OS Input Offset Voltage LT3N8 6 7 µv LT3S8 8 µv V OS / T Input Offset Voltage Drift µv/ C I OS Input Offset Current....7 na I B Input Bias Current 3 na A VOL Large-Signal Voltage Gain V O = ±V, R L = k 8 3 V/mV CMRR Common-Mode Rejection Ratio V CM = 3V, V 97 9 db PSRR Power Supply Rejection Ratio V S ±V to ±8V 8 9 db Maximum Output Voltage Swing R L = k ±. ±3.8 ±.8 ±3.8 V I S Supply Current per Amplifier µa The denotes specifications which apply over the full operating temperature range. Note : Typical parameters are defined as the 6% yield of parameter distributions of individual amplifiers; i.e., out of LT3s typically op amps will be better than the indicated specification. Note : This parameter is tested on a sample basis only. All noise parameters are tested with V S = ±.V, V O = V. Note 3: This parameter is guaranteed by design and is not tested. V S = ±V,, unless otherwise noted. Note : Gain-Bandwidth Product is not tested. It is inferred from the slew rate measurement. Note : This parameter is not % tested. Note 6: At the minimum supply voltage, the offset voltage changes less than µv compared to its value at V, V. Note 7: The LT3 is not tested and is not quality-assurance sampled at C and at 8 C. These specifications are guaranteed by design, correlation and/or inference from C, C and/or 7 C tests.

5 TYPICAL PERFOR A CE CHARA CTERISTICS PERCENT OF NITS 3 Distribution of Input Offset Voltage (In S8 Package) V S = V, V 3 3 INPT OFFSET VOLTAGE (µv) SPPLY CRRENT PER AMPLIFIER (µa) Supply Current vs Temperature V S = ±V 3 V S = V, V 3 7 TEMPERATRE ( C) SATRATION VOLTAGE (V).. Output Saturation vs Sink Current vs Temperature V + = V TO 3V V = V I SINK = ma I SINK = µa I SINK = ma I SINK = ma I SINK = µa I SINK = 7 TEMPERATRE ( C) LT3 TA LT3 TA LT3 TA INPT OFFSET CRRENT (pa) Input Offset Current vs Temperature V S =V, V V CM =.V V S = ±V 6 8 TEMPERATRE ( C) INPT BIAS CRRENT (na) Input Bias Current vs Temperature V S =V, V V CM =.V V S = ±V 6 8 TEMPERATRE ( C) COMMON-MODE VOLTAGE (V) Input Bias Current vs Common-Mode Voltage V S = ±V V S = V, V INPT BIAS CRRENT (na) 3 COMMON-MODE VOLTAGE (V) LT3 TA6 LT3 TA7 LT3 TA8 NOISE VOLTAGE (nv/div).hz to Hz Noise V S = ±V TO ±8V VOLTAGE NOISE DENSITY (nv/ Hz) CRRENT NOISE DENSITY (fa/ Hz) 3 3 Noise Spectrum V S = ±V TO ±8V VOLTAGE NOISE /f CORNER Hz CRRENT NOISE CHANGE IN OFFSET VOLTAGE (µv) Minimum Supply Voltage NONFNCTIONAL V = V T A = C T A = C T A = 8 C 6 8 TIME (SECONDS) k FREQENCY (Hz) 3 POSITIVE SPPLY VOLTAGE (V) LT3 TA9 LT3 TA LT3 TA

6 TYPICAL PERFOR A CE CHARA CTERISTICS VOLTAGE GAIN (db) 8 6 Voltage Gain vs Frequency T A = C C L = pf V S = ±V V S = V, V.. k k k M M FREQENCY (Hz) VOLTAGE GAIN (db) Gain, Phase vs Frequency GAIN PHASE ±V ±V V, V V, V V CM =.V C L = pf..3 3 FREQENCY (MHz) PHASE SHIFT (DEGREES) CHANNEL SEPARATION (db) 6 Channel Separation vs Frequency LIMITED BY THERMAL INTERACTION R S = kω T A = C V S =V, V V IN =3Vp-p R L = k R S = Ω 8 LIMITED BY PIN TO PIN CAPACITANCE 6 k k k FREQENCY (Hz) M LT3 TA LT3 TA3 LT3 TA COMMON-MODE REJECTION RATIO (db) 8 6 Common-Mode Rejection Ratio vs Frequency V S = V, V V S = ±V POER SPPLY REJECTION RATIO (db) 8 6 Power Supply Rejection Ratio vs Frequency NEGATIVE SPPLY ±V V S = V, V POSITIVE SPPLY ±V mv/div Small Signal Transient Response, V S = ±V A V = + µs/div k k k FREQENCY (Hz) M. k k k FREQENCY (Hz) M LT3 TA7 LT3 TA LT3 TA6 Small Signal Transient Response, V S = V, V Large Signal Transient Response, V S = V, V Large Signal Transient Response, V S = ±V V mv/div V V/DIV V V A V = + µs/div INPT = mv TO mv PLSE A V = + NO LOAD INPT = V TO V PLSE µs/div A V = + µs/div LT3 TA8 LT3 TA9 LT3 TA 6

7 APPLICATIONS INFORMATION Single Supply Operation The LT3 is fully specified for single supply operation, i.e., when the negative supply is V. Input common-mode range includes ground; the output swings within a few millivolts of ground. If the input is more than a few hundred millivolts below ground, two distinct problems can occur on previous single supply designs, such as the LM, LM8, OP- and OP-. a) hen the input is more than a diode drop below ground, unlimited current will flow from the substrate (V terminal) to the input. This can destroy the unit. On the LT3, the Ω resistors, in series with the input (see Schematic Diagram), protect the devices even when the input is V below ground. b) hen the input is more than mv below ground (at C), the input stage saturates (transistors Q3 and Q) and phase reversal occurs at the output. This can cause lock-up in servo systems. Due to a unique phase reversal protection circuitry (Q, Q, Q7, Q8), the LT3 outputs do not reverse, as illustrated below, even when the inputs are at.v. Keep the output of the other amplifier out of negative saturation for the phase reversal protection to function properly. Since the output of the LT3 cannot go exactly to ground, but can only approach ground to within a few millivolts, care should be exercised to ensure that the output is not saturated. For example, a mv input signal will cause the amplifier to set up in its linear region in the gain configuration shown below, but is not enough to make the amplifier function properly in the voltage-follower mode. R mv Gain Amplifier + V 99R mv mv Figure. Voltage Follower + V OTPT SATRATED mv LT3 7 Comparator Applications The single supply operation of the LT3 lends itself to its use as a precision comparator with TTL compatible output; the response time is shown below. Voltage Follower with Input Exceeding the Negative Common-Mode Range V V V V V V V V V 6V P-P INPT,.V TO.V LT3 TA Comparator Rise Response Time mv, mv, mv Overdrives LM3, LM38, OP- EXHIBIT OTPT PHASE REVERSAL LT3 TA Comparator Fall Response Time to mv, mv, mv Overdrives LT3 NO PHASE REVERSAL LT3 TA3 INPT (mv) OTPT (V) V S = V, V µs/div LT3 TA INPT (mv) OTPT (V) V S = V, V Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. µs/div LT3 TA 7

8 SIMPLIFIED SCHEMATIC / LT3 V + k 8Ω 3.µA 3.µA µa µa µa 8µA Q3 Q36 Q3 Q3 Q3 Q6 Q Q7 Q 3.9k Q pf Q Q6 Q33 J Q7 V Ω.pF.k 8Ω 6k IN Ω Q Q Q8 OTPT 6Ω Q6 IN+ Q Q Q9 Q Q8 Q9 pf Q3 Q k Q3 Q Q V 7pF Q9 Q7 k k Q8 pf µa 8µA pf µa Q 3Ω 8k 6Ω 6Ω LT3 TA6 PACKAGE DESCRIPTION.3.3 ( ) N8 Package, 8-Lead Plastic DIP..6 (.3.6).3 ±. (3.3 ±.7). (.6) MAX 8 TYP.9. (.9.38) ( ).. (..8) (.6) TYP. ±. (.3 ±.38). ±. (. ±.).8. (.3.).3.69 (.36.7)..9 (.3.83). (.7) BSC. (3.7) MIN.8 ±.3 (.7 ±.76) S8 Package, 8-Lead Plastic SOIC. (.8) MIN.. (..).8. ( ) (.8.) ±. (6.3 ±.) N ( ) 8 Linear Technology Corporation 63 McCarthy Blvd., Milpitas, CA (8) 3-9 FAX: (8) 3-7 TELEX: SO8 39 BA/GP 93 K REV PRINTED IN SA LINEAR TECHNOLOGY CORPORATION 993

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