DESCRIPTIO FEATURES TYPICAL APPLICATIO. LTC1250 Very Low Noise Zero-Drift Bridge Amplifier APPLICATIO S

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1 LTC Very Low Noise Zero-Drift Bridge Amplifier FEATRES Very Low Noise:.µV P-P Typ,.Hz to Hz DC to Hz Noise Lower Than OP- Full Output Swing into k Load Offset Voltage: µv Max Offset Voltage Drift: nv/ C Max Common Mode Rejection Ratio: db Min Power Supply Rejection Ratio: db Min No External Components Required Pin Compatible with Standard -Pin Op Amps Available in Standard -Pin Plastic DIP and -Pin SO Packages APPLICATIO S Electronic Scales Strain Gauge Amplifiers Thermocouple Amplifiers High Resolution Data Acquisition Low Noise Transducers Instrumentation Amplifiers, LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by.s. Patents including 9. DESCRIPTIO The LTC is a high performance, very low noise zerodrift operational amplifier. The LTC s combination of low front-end noise and DC precision makes it ideal for use with low impedance bridge transducers. The LTC features typical input noise of.µv P-P from.hz to Hz, and.µv P-P from.hz to Hz. The LTC has DC to Hz noise of.µv P-P, surpassing that of low noise bipolar parts including the OP-, OP-, and LT. The LTC uses the industry-standard single op amp pinout, and requires no external components or nulling signals, allowing it to be a plug-in replacement for bipolar op amps. The LTC incorporates an improved output stage capable of driving.v into a k load with a single V supply; it will swing ±.9V into k with ±V supplies. The input common mode range includes ground with single power supply voltages above V. Supply current is ma with a ±V supply, and overload recovery times from positive and negative saturation are.ms and.ms, respectively. The internal nulling clock is set at khz for optimum low frequency noise and offset drift; no external connections are necessary. The LTC is available in a standard -pin plastic DIP and -pin SO packages. TYPICAL APPLICATIO V Ω GAIN TRIM Differential Bridge Amplifier.µF V pf Input Referred Noise.Hz to Hz A V = k.k Ω STRAIN GAGE LTC A V = µv V pf.k V TA TIME (s) LT TA fb

2 LTC ABSOLTE AXI RATI GS W W W Total Supply Voltage (V to V )... V Input Voltage... (V.V) to (V.V) Output Short Circuit Duration... Indefinite Storage Temperature Range... C to C Lead Temperature (Soldering, sec.)... C (Note ) Operating Temperature Range LTCM (OBSOLETE)... C to C LTCC... C TO C PACKAGE/ORDER I FOR NC IN IN V TOP VIEW NC V OT NC N PACKAGE -LEAD PLASTIC DIP T JMAX = C, θ JA = CW J PACKAGE -LEAD CERAMIC DIP T JMAX = C, θ JA = CW (J) W ATIO ORDER PART NMBER LTCCN LTCMJ LTCCJ OBSOLETE PACKAGE Consider the N or S for Alternative Source NC IN IN V TOP VIEW S PACKAGE -LEAD PLASTIC SO T JMAX = C, θ JA = CW NC V OT NC ORDER PART NMBER LTCCS S PART MARKING Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, V IN = ±V, otherwise specifications are at T A = C. LTCM LTCC SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX NITS V OS Input Offset Voltage T A = C (Note ) ± ± ± ± µv V OS Average Input Offset Drift (Note ) ±. ±. ±. ±. µv/ C Long Term Offset Drift nv/ Mo e n Input Noise Voltage (Note ) T A = C,.Hz to Hz.... µv P-P T A = C,.Hz to Hz.. µv P-P i n Input Noise Current f = Hz.. fa/ Hz I B Input Bias Current T A = C (Note ) ± ± ± ± pa ±9 ± pa I OS Input Offset Current T A = C (Note ) ± ± ± ± pa ± ± pa CMRR Common Mode Rejection Ratio V CM = V to V db PSRR Power Supply Rejection Ratio V S = ±.V to ±V db A VOL Large-Signal Voltage Gain R L = k, V OT = ±V db Maximum Output Voltage Swing R L = k ±../. ±../. V R L = k ±.9 ±.9 V SR Slew Rate R L = k, C L = pf V/µs GBW Gain-Bandwidth Product.. MHz I S Supply Current No Load, T A = C.... ma.. ma fb

3 LTC ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, V IN = ±V, otherwise specifications are at T A LTCM LTCC SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX NITS f S Internal Sampling Frequency T A = C.. khz V OS Input Offset Voltage T A = C (Note ) ± ± ± ± µv V OS Average Input Offset Drift (Note ) ±. ±. ±. ±. µv/ C e n Input Noise Voltage (Note ) T A = C,.Hz to Hz.. µv P-P T A = C,.Hz to Hz.. µv P-P I B Input Bias Current T A = C (Note ) ± ± ± ± pa I OS Input Offset Current T A = C (Note ) ± ± ± ± pa Maximum Output Voltage Swing R L = k.... V R L = k.9.9 V I S Supply Current T A = C.... ma f S Sampling Frequency T A = C khz Note : Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note : These parameters are guaranteed by design. Thermocouple effects preclude measurement of these voltage levels during automated testing. Note :.Hz to Hz noise is specified DC coupled in a s window;.hz to Hz noise is specified in a s window with an RC high-pass filter at.hz. The LTC is sample tested for noise; for % tested parts contact LTC Marketing Dept. Note : At T C these parameters are guaranteed by design and not tested. TYPICAL PERFOR A W CE CHARACTERISTICS Input Noise vs Supply Voltage. T A = C. Supply Current vs Supply Voltage. T A = C. Sampling Frequency vs Supply Voltage T A = C INPT NOISE (µv P-P ) Hz TO Hz.Hz TO Hz SPPLY CRRENT (ma) SAMPLING FREQENCY (khz) TOTAL SPPLY VOLTAGE, V TO V (V) TOTAL SPPLY VOLTAGE, V TO V (V) TOTAL SPPLY VOLTAGE, V TO V (V) G G G fb

LTC TYPICAL PERFOR A W CE CHARACTERISTICS INPT NOISE (µv P-P )...... Input Noise vs Temperature.Hz TO Hz.Hz TO Hz SPPLY CRRENT (ma) Supply Current vs Temperature.

4 LTC TYPICAL PERFOR A W CE CHARACTERISTICS INPT NOISE (µv P-P ) Input Noise vs Temperature.Hz TO Hz.Hz TO Hz SPPLY CRRENT (ma) Supply Current vs Temperature..... SAMPLING FREQENCY (khz) Sampling Frequency vs Temperature TEMPERATRE ( C). TEMPERATRE ( C) TEMPERATRE ( C) G G G VOLTAGE NOISE (nv/ Hz) Voltage Noise vs Frequency R S = Ω k k FREQENCY (Hz) GAIN (db) Gain/Phase vs Frequency GAIN PHASE: R L = k PHASE: R L = k OR SINGLE V T A = C C L = pf k k k M M FREQENCY (Hz) PHASE MARGIN (DEG) BIAS CRRENT ( pa ) Bias Current (Magnitude) vs Temperature TEMPERATRE ( C) G G G9 OTPT (V) INPT (V) Overload Recovery. µs/div INPT COMMON MODE RANGE (V) Common Mode Input Range vs Supply Voltage T A = C CMRR (db) Common Mode Rejection Ratio vs Frequency V CM = V RMS A V =, R L = k, C L = pf, SPPLY VOLTAGE (±V) k k k FREQENCY (Hz) G G fb

LTC TYPICAL PERFOR A W CE CHARACTERISTICS V/DIV Transient Response µs/div A V =, R L = k, C L = pf, OTPT SWING (±V) 9 Output Swing vs Load Resistance, Dual Supplies V S = ±V V S = ±.

5 LTC TYPICAL PERFOR A W CE CHARACTERISTICS V/DIV Transient Response µs/div A V =, R L = k, C L = pf, OTPT SWING (±V) 9 Output Swing vs Load Resistance, Dual Supplies V S = ±V V S = ±.V R L TO GND NEGATIVE SWING POSITIVE SWING 9 LOAD RESISTANCE (kω) OTPT SWING (V) Output Voltage Swing vs Load Resistance, Single Supply V S = V V S = V V S = V V = GND R L TO GND 9 LOAD RESISTANCE (kω) G G OTPT VOLTAGE (V) Output Swing vs Output Current, ±V Supply OTPT VOLTAGE (V) Output Swing vs Output Current, Single V Supply V S = SINGLE V SHORT-CIRCIT CRRENT (ma) Short-Circuit Current vs Temperature V S = ±V V OT = V V OT = V.. OTPT CRRENT (ma).. OTPT CRRENT (ma) TEMPERATRE ( C) G G G TEST CIRCITS Offset Test Circuit pf pf k DC to Hz Noise Test Circuit (for DC to Hz Multiply All Capacitor Values by ) k V V Ω V LTC OTPT Ω LTC V k.µf / LT V k.µf k.µf / LT OTPT V TC TC fb

6 LTC APPLICATI Input Noise The LTC, like all CMOS amplifiers, exhibits two types of low frequency noise: thermal noise and /f noise. The LTC uses several design modifications to minimize these noise sources. Thermal noise is minimized by raising the g M of the front-end transistors by running them at high bias levels and using large transistor geometries. /f noise is combated by optimizing the zero-drift nulling loop to run at twice the /f corner frequency, allowing it to reduce the inherently high CMOS /f noise to near thermal levels at low frequencies. The resultant noise spectrum is quite low at frequencies below the internal khz clock frequency, approaching the best bipolar op amps at Hz and surpassing them below Hz (Figure ). All this is accomplished in an industry-standard pinout; the LTC requires no external capacitors, no nulling or clock signals, and conforms to industry-standard -pin DIP and -pin SO packages. Input Capacitance and Compensation The large input transistors create a parasitic pf capacitance from each input to V. This input capacitance will react with the external feedback resistors to form a pole which can affect amplifier stability. In low gain, high impedance configurations, the pole can land below the unity-gain frequency of the feedback network and degrade phase margin, causing ringing, oscillation, and other unpleasantness. This is true of any op amp, however, the pf capacitance at the LTC s inputs can affect VOLTAGE NOISE (nv/ Hz) O LTC S OP- I FOR W OP- R S = Ω ATIO.. FREQENCY (Hz) LTC F Figure. Voltage Noise vs Frequency stability with a feedback network impedance as low as.9k. This effect can be eliminated by adding a capacitor across the feedback resistor, adding a zero which cancels the input pole (Figure ). The value of this capacitor should be: pf CF AV where A V = closed-loop gain. Note that C F is not dependent on the value of R F. Circuits with higher gain (A V > ) or low loop impedance should not require C F for stability. R IN C P C F R F LTC F Figure. C F Cancels Phase Shift Due to Parasitic C P Larger values of C F, commonly used in band-limited DC circuits, may actually increase low frequency noise. The nulling circuitry in the LTC closes a loop that includes the external feedback network during part of its cycle. This loop must settle to its final value within µs or it will not fully cancel the /f noise spectrum and the low frequency noise of the part will rise. If the loop is underdamped (large R F, no C F ) it will ring for more than µs and the noise and offset will suffer. The solution is to add C F as above but beware! Too large a value of C F will overdamp the loop, again preventing it from reaching a final value by the µs deadline. This condition doesn t affect the LTC s offset or output stability, but /f noise begins to rise. As a rule of thumb, the R F C F feedback pole should be khz (/µs, the frequency at which the loop settles) for best /f performance; values between pf and pf work well with feedback resistors below k. This ensures adequate gain at khz for the LTC to properly null. High value feedback resistors (above M) may require experimentation to find the correct value because parasitics, both in the fb

7 LTC APPLICATI R IN O S I FOR W LTC and on the PC board, play an increasing role. Low value resistors (below k) may not require a capacitor at all. Input Bias Current The inputs of the LTC, like all zero-drift op amps, draw only small switching spikes of AC bias current; DC leakage current is negligible except at very high temperatures. The large front-end transistors cause switching spikes to times greater than standard zero-drift op amps: the ±pa bias current spec is still many times better than most bipolar parts. The spikes don t match from one input pin to the other, and are sometimes (but not always) of opposite polarity. As a result, matching the impedances at the inputs (Figure ) will not cancel the bias current, and may cause additional errors. Don t do it. R F LTC ATIO F Figure. Extra Resistor Will Not Cancel Bias Current Errors Output Drive The LTC includes an enhanced output stage which provides nearly symmetrical output source/sink currents. This output is capable of swinging a minimum of ±V into a k load with ±V supplies, and can sink or source >ma into low impedance loads. Lightly loaded (R L k), the LTC will swing to within millivolts of either rail. In single supply applications, it will typically swing.v into a k load with a V supply. Minimizing External Errors The input noise, offset voltage, and bias current specs for the LTC are all well below the levels of circuit board parasitics. Thermocouples between the copper pins of the LTC and the tin/lead solder used to connect them can overwhelm the offset voltage of the LTC, especially if a soldering iron has been around recently. Note also that when the LTC s output is heavily loaded, the chip may dissipate substantial power, raising the temperature of the package and aggravating thermocouples at the inputs. Although the LTC will maintain its specified accuracy under these conditions, care must be taken in the layout to prevent or compensate circuit errors. Be especially careful of air currents when measuring low frequency noise; nearby moving objects (like people) can create very large noise peaks with an unshielded circuit board. For more detailed explanations and advice on how to avoid these errors, see the LTC/LTC data sheet. Sampling Behavior The LTC s zero-drift nulling loop samples the input at khz, allowing it to process signals below khz with no aliasing. Signals above this frequency may show aliasing behavior, although wideband internal circuitry generally keeps errors to a minimum. The output of the LTC will have small spikes at the clock frequency and its harmonics; these will vary in amplitude with different feedback configurations. Low frequency or band-limited systems should not be affected, but systems with higher bandwidth (oversampling A/Ds, for example) may need to filter out these clock artifacts. Output spikes can be minimized with a large feedback capacitor, but this will adversely affect noise performance (see Input Capacitance and Compensation on the previous page). Applications which require spike-free output in addition to minimum noise will need a low-pass filter after the LTC; a simple RC will usually do the job (Figure ). The LTC/LTC data sheet includes more information about zero-drift amplifier sampling behavior. C F R F LTC k. F Figure. RC Output Pole Limits Bandwidth to Hz fb

8 LTC APPLICATI O S I FOR W ATIO Single Supply Operation The LTC will operate with single supply voltages as low as.v, and the output swings to within millivolts of either supply when lightly loaded. The input stage will common mode to within mv of ground with a single V supply, and will common mode to ground with single supplies above V. Most bridge transducers bias their inputs above ground when powered from single supplies, allowing them to interface directly to the LTC in single supply applications. Single-ended, ground-referenced signals will need to be level shifted slightly to interface to the LTC s inputs. Fault Conditions The LTC is designed to withstand most external fault conditions without latch-up or damage. However, unusually severe fault conditions can destroy the part. All pins are protected against faults of ±ma or V beyond either supply, whichever comes first. If the external circuitry can exceed these limits, series resistors or voltage clamp diodes should be included to prevent damage. The LTC includes internal protection against ESD damage. All data sheet parameters are maintained to kv ESD on any pin; beyond kv, the input bias and offset currents will increase, but the remaining specs are unaffected and the part remains functional to kv at the input pins and kv at the output pin. Extreme ESD conditions should be guarded against by using standard antistatic precautions. fb

9 LTC PACKAGE DESCRIPTIO J Package -Lead CERDIP (Narrow. Inch, Hermetic) (Reference LTC DWG # --).. (..) FLL LEAD OPTION CORNER LEADS OPTION ( PLCS). BSC (. BSC).. (..) HALF LEAD OPTION. (.) MIN. (.) RAD TYP. (.) MAX.. (..). (.) MAX.. (..).. (..). ±. (9.9 ±.).. (..).. (..).. MIN. ±. (. ±.) NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS. J 9 OBSOLETE PACKAGE fb 9

10 PACKAGE DESCRIPTIO LTC N Package -Lead PDIP (Narrow. Inch) (Reference LTC DWG # --).* (.) MAX. ±.* (. ±.).. (..).. (..). ±. (. ±.).. (..) ( ). (.) TYP. (.) BSC NOTE: INCHES. DIMENSIONS ARE MILLIMETERS *THESE DIMENSIONS DO NOT INCLDE MOLD FLASH OR PROTRSIONS. MOLD FLASH OR PROTRSIONS SHALL NOT EXCEED. INCH (.mm). (.) MIN. ±. (. ±.). (.) MIN N fb

11 PACKAGE DESCRIPTIO LTC S Package -Lead Plastic Small Outline (Narrow. Inch) (Reference LTC DWG # --). BSC. ±..9.9 (..) NOTE. MIN. ±... (.9.9).. (..9) NOTE. ±. TYP RECOMMENDED SOLDER PAD LAYOT.. (..).. (..) TYP..9 (..).. (..).. (..) NOTE: INCHES. DIMENSIONS IN (MILLIMETERS)..9 (..) TYP. DRAWING NOT TO SCALE. THESE DIMENSIONS DO NOT INCLDE MOLD FLASH OR PROTRSIONS. MOLD FLASH OR PROTRSIONS SHALL NOT EXCEED." (.mm). (.) BSC SO Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. fb

12 LTC TYPICAL APPLICATI Reference Buffer O S Differential Thermocouple Amplifier V LM99.k ±ppm ERROR AT ±ma µv P-P OTPT NOISE.µV/ C DRIFT (DE TO LM99) LTC TA TYPE K V CM V R k.% R k.% R M.% V IN VOT R k C pf V LTC V C pf R M.% mv/ C V OT mv/ C R.k % R Ω FLL-SCALE TRIM R k % LT GND V R9 k FOR BEST ACCRACY, THERMOCOPLE RESISTANCE SHOLD BE LESS THAN Ω TA RELATED PARTS PART NMBER DESCRIPTION COMMENTS LTC/LTC/ Single/Dual/Quad Precision Zero-Drift Op Amp V OS Max = µv, V SPPLY Max =.V LTC LTC/LTC Single/Dual ±V Zero-Drift Op Amp High Voltage Operation LTC/LTC/ Single/Dual/Quad Zero-Drift Op Amp Single Supply.V to =/V, SOT-/MS/GN Package LTC LTC Zero-Drift Instrumentation Amp Rail-Rail, MS, db, Two Resistors Set Gain LTC/LTC Single/Dual Zero-Drift Op Amp µa per Amplifier (Max), SOT-/MS Package LTC Rail-to-Rail Input/Output Instrumentation Amp Low Cost, Single Supply, MS, Two Resistors Set Gain Linear Technology Corporation McCarthy Blvd., Milpitas, CA 9- () -9 FAX: () - LINEAR TECHNOLOGY CORPORATION 99 fb LT/GP K REV B PRINTED IN SA

TYPICAL APPLICATIO. LT MHz, 250V/µs, A V 4 Operational Amplifier DESCRIPTIO FEATURES APPLICATIO S

TYPICAL APPLICATIO. LT MHz, 250V/µs, A V 4 Operational Amplifier DESCRIPTIO FEATURES APPLICATIO S 5MHz, 5V/µs, A V Operational Amplifier FEATRES Gain-Bandwidth: 5MHz Gain of Stable Slew Rate: 5V/µs Input Noise Voltage: nv/ Hz C-Load TM Op Amp Drives Capacitive Loads Maximum Input Offset Voltage: µv