LT MHz, 30V/µs 16-Bit Accurate A V 2 Op Amp. Description. Features. Applications. Typical Application
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1 Features n Stable in Gain A (A = ) n MHz Gain Bandwidth Product n /μs Slew Rate n Settling Time: 8ns ( Step, ) n Specified at and Supplies n Low Distortion, 9.dB for khz, P-P n Maximum Input Offset oltage: 7 n Maximum Input Offset oltage Drift: / C n Maximum () Input Bias Current: na n Minimum DC Gain: /m n Minimum Output Swing into k: ±.8 n Input Noise oltage: n/ Hz n Input Noise Current:.pA/ Hz n Total Input Noise Optimized for k < R S < k n Available in an 8-Lead Plastic SO Package and 8-Lead DFN Package Applications n -Bit DAC Current-to-oltage Converter n Precision Instrumentation n ADC Buffer n Low Distortion Active Filters n High Accuracy Data Acquisition Systems n Photodiode Amplifiers Description LT8- MHz, /µs -Bit Accurate A Op Amp The LT 8- is a precision high speed operational amplifier with -bit accuracy, decompensated to be stable in a gain of or greater. The combination of precision and AC performance makes the LT8- the optimum choice for high accuracy applications such as DAC current-to-voltage conversion and ADC buffers. The initial accuracy and drift characteristics of the input offset voltage and inverting input bias current are tailored for inverting applications. The MHz gain bandwidth ensures high open-loop gain at frequency for reducing distortion. In noninverting applications such as an ADC buffer, the low distortion and DC accuracy allow full -bit AC and DC performance. The high slew rate of the LT8- improves large-signal performance in applications such as active filters and instrumentation amplifiers compared to other precision op amps. The LT8- is specified on power supply voltages of and and from C to 8 C. For a unity-gain stable op amp with same DC performance, see the LT8 data sheet. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical Application -Bit DAC I-to- Converter Large Signal Transient, A = DAC INPUTS LTC 97 k pf + LT8- k OUT pf /DI S = A = R F = R G = k C F = pf OFFSET: OS + I B (kω) < LSB OPTIONAL NOISE FILTER SETTLING TIME TO =.µs SETTLING LIMITED BY k AND pf TO COMPENSATE DAC OUTPUT CAPACITANCE 8 TA ns/di 8 TA
2 + + LT8- Absolute Maximum Ratings (Note ) Total Supply oltage ( + to )... Maximum Input Current (Note )... Output Short-Circuit Duration (Note )... Indefinite Operating Temperature Range... C to 8 C Specified Temperature Range (Note )... C to 8 C Junction Temperature... C Storage Temperature Range... C to C Lead Temperature (Soldering, sec) for S8 Only... C Pin Configuration TOP IEW TOP IEW NULL IN 8 7 DNC* + NULL IN 8 7 DNC* + +IN OUT NULL +IN OUT NULL DD PACKAGE 8-LEAD (mm mm) PLASTIC DFN T JMAX = C, θ JA = C/W EXPOSED PAD IS INTERNALLY CONNECTED TO S8 PACKAGE 8-LEAD PLASTIC SO *DO NOT CONNECT T JMAX = C, θ JA = 9 C/W Order Information LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE LT8CS8-#PBF LT8CS8-#TRPBF 8 8-Lead Plastic Small Outline C to 7 C LT8IS8-#PBF LT8IS8-#TRPBF 8 8-Lead Plastic Small Outline C to 8 C LT8ACDD-#PBF LT8ACDD-#TRPBF LDSY 8-Lead (mm mm) Plastic DFN C to 7 C LT8AIDD-#PBF LT8AIDD-#TRPBF LDSY 8-Lead (mm mm) Plastic DFN C to 8 C LT8CDD-#PBF LT8CDD-#TRPBF LDSY 8-Lead (mm mm) Plastic DFN C to 7 C LT8IDD-#PBF LT8IDD-#TRPBF LDSY 8-Lead (mm mm) Plastic DFN C to 8 C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: For more information on tape and reel specifications, go to: electrical characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at. CM = unless otherwise noted. SYMBOL PARAMETER CONDITIONS SUPPLY MIN TYP MAX UNITS OS Input Offset oltage S8 Package LT8A, DD Package LT8, DD Package I OS Input Offset Current to na
3 LT8- Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at. CM = unless otherwise noted. SYMBOL PARAMETER CONDITIONS SUPPLY MIN TYP MAX UNITS I B Inverting Input Bias Current to ± na I B + Noninverting Input Bias Current to ± na Input Noise oltage.hz to Hz to. P-P e n Input Noise oltage f = khz to n/ Hz i n Input Noise oltage f = khz to. pa/ Hz R IN Input Resistance CM = ±. Differential C IN Input Capacitance pf Input oltage Range + Input oltage Range CMRR Common Mode Rejection Ratio CM = ±. CM = ±. PSRR Power Supply Rejection Ratio S = ±. to db A OL Large-Signal oltage Gain OUT = ±., R L = k OUT = ±., OUT = ±., R L = k OUT = ±., OUT Output Swing R L = k R L = k I OUT Output Current OUT = ±. OUT = ± ±. ±.8 ±. ±.8 ± ± ±. ±. ±. ±. ± ± I SC Short-Circuit Current OUT =, IN = ±. ± ± SR Slew Rate (Note ) Full-Power Bandwidth Peak, (Note ) Peak, (Note ) GBW Gain Bandwidth f = khz, t s Settling Time Step,.%, A = Step,, A = Step,.%, A = R O Output Resistance A =, f = khz. Ω I S Supply Current MΩ kω db db /m /m /m /m /µs /µs khz khz MHz MHz ns ns ns The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at. C T A 7 C, CM = unless otherwise noted. SYMBOL PARAMETER CONDITIONS SUPPLY MIN TYP MAX UNITS OS Input Offset oltage S8 Package LT8A, DD Package LT8, DD Package
4 LT8- Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at. C T A 7 C, CM = unless otherwise noted. SYMBOL PARAMETER CONDITIONS SUPPLY MIN TYP MAX UNITS Input OS Drift (Note 7) to.7. / C I OS Input Offset Current to na Input Offset Current Drift to pa/ C I B Inverting Input Bias Current to ± na Negative Input Current Drift to pa/ C I + B Noninverting Input Bias Current to ± na CMRR Common Mode Rejection Ratio CM = ±. CM = ±. PSRR Power Supply Rejection Ratio S = ±. to 98 db A OL Large-Signal oltage Gain OUT = ±., R L = k OUT = ±., OUT = ±., R L = k OUT = ±., OUT Output Swing R L = k R L = k I OUT Output Current OUT = ±. OUT = ±. 9 9 ±.9 ±.7 ±.9 ±.7 ±. ±. I SC Short-Circuit Current OUT =, IN = ±. ±7 SR Slew Rate (Note ) GBW Gain Bandwidth f = khz, I S Supply Current db db /m /m /m /m /µs /µs MHz MHz The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at. C T A 8 C, CM = unless otherwise noted. SYMBOL PARAMETER CONDITIONS SUPPLY MIN TYP MAX UNITS OS Input Offset oltage S8 Package LT8A, DD Package LT8, DD Package Input OS Drift (Note 7) to.7. / C I OS Input Offset Current to 8 na Input Offset Current Drift to pa/ C I B Inverting Input Bias Current to ± na Negative Input Current Drift to 8 pa/ C I + B Noninverting Input Bias Current to ± na CMRR Common Mode Rejection Ratio CM = ±. CM = ±. PSRR Power Supply Rejection Ratio S = ±. to 9 db 9 9 db db
5 LT8- Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at. C T A 8 C, CM = unless otherwise noted. SYMBOL PARAMETER CONDITIONS SUPPLY MIN TYP MAX UNITS A OL Large-Signal oltage Gain OUT = ±, R L = k OUT = ±, OUT = ±., R L = k OUT = ±., OUT Output Swing R L = k R L = k I OUT Output Current OUT = ±. OUT = ±. ±.8 ±. ±.8 ±. ±7 ±7 I SC Short-Circuit Current OUT =, IN = ±. ± SR Slew Rate (Note ) GBW Gain Bandwidth f = khz, I S Supply Current /m /m /m /m /µs /µs MHz MHz Note : Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note : The inputs are protected by back-to-back diodes and two Ω series resistors. If the differential input voltage exceeds.7, the input current should be limited to. Input voltages outside the supplies will be clamped by ESD protection devices and input currents should also be limited to. Note : A heat sink may be required to keep the junction temperature below absolute maximum when the output is shorted indefinitely. Note : The LT8C- is guaranteed to meet specified performance from C to 7 C and is designed, characterized and expected to meet these extended temperature limits, but is not tested at C and at 8 C. The LT8I- is guaranteed to meet the extended temperature limits. Note : Slew rate is measured between ±8 on the output with ± input for supplies and ± on the output with ± input for supplies. Note : Full power bandwidth is calculated from the slew rate measurement: FPBW = SR/π P Note 7: This parameter is not % tested. typical performance characteristics SUPPLY CURRENT () 7 Supply Current vs Supply oltage and Temperature C C C SUPPLY OLTAGE (±) COMMON MODE RANGE () Input Common Mode Range vs Supply oltage Δ OS < 9 SUPPLY OLTAGE (±) 8 INPUT BIAS CURRENT (na) 8 8 Input Bias Current vs Input Common Mode oltage S = I B I B + INPUT COMMON MODE OLTAGE () 8 G 8 G 8 G
6 LT8- Typical Performance Characteristics INPUT BIAS CURRENT (na) Input Bias Current vs Temperature Input Noise Spectral Density.Hz to Hz oltage Noise S = I B I B + INPUT OLTAGE NOISE (n/ Hz) i n e n S = A = R S = k FOR i n. INPUT CURRENT NOISE (pa/ Hz) OLTAGE NOISE (n/di) S = 7 TEMPERATURE ( C). k k k FREQUENCY (Hz) TIME (s/di) 8 G 8 G 8 G OFFSET OLTAGE DRIFT () Warm-Up Drift vs Time S-8 S-8 8 TIME AFTER POWER UP (s) 8 G7 OPEN-LOOP GAIN (db) Open-Loop Gain vs Resistive Load S = S = k k LOAD RESISTANCE (Ω) 8 G8 OPEN-LOOP GAIN (db) 9 Open-Loop Gain vs Temperature S = S = 7 TEMPERATURE ( C) 8 G9 OUTPUT OLTAGE SWING () Output oltage Swing vs Supply oltage + R L = k R L = k SUPPLY OLTAGE (±) +. OUTPUT OLTAGE SWING () Output oltage Swing vs Load Current S = C 8 C C 8 C C C OUTPUT CURRENT () OUTPUT SHORT-CIRCUIT CURRENT () Output Short-Circuit Current vs Temperature S = IN = ±. SOURCE SINK 7 TEMPERATURE ( C) 8 G 8 G 8 G
7 Typical Performance Characteristics LT8- GAIN (db) 7 Open-Loop Gain and Phase vs Frequency Gain vs Frequency, A = GAIN PHASE A = R F = R G =.k C F = pf k k M M M FREQUENCY (Hz) 8 G 8 PHASE (DEG) GAIN (db) A = R F = R G = k C F =.8pF R L = Ω NO C L C L = pf C L = 7pF C L = pf k M M M FREQUENCY (Hz) 8 G OUTPUT IMPEDANCE (Ω).. Output Impedance vs Frequency S = A = A = A =. k k M M M FREQUENCY (Hz) 8 G OUTPUT OLTAGE SWING ( P-P ) Undistorted Output Swing vs Frequency, S = A = S = THD<% FREQUENCY (khz) 8 G OUTPUT OLTAGE SWING ( P-P ) Undistorted Output Swing vs Frequency, S = A = S = THD<% FREQUENCY (khz) 8 G7 OUTPUT STEP () 8 Settling Time vs Output Step S = R F = R G =.k R L = k.% C F = 8pF A =.%.% 8.% SETTLING TIME (ns) 8 G8 OUTPUT STEP () 8 Settling Time vs Output Step.% S = R F = R G = k.% R L = k INTO DIODES C F = pf 8 A = R L = Ω/pF SETTLING TIME (ns) 8 G9 Small-Signal Transient, A = S = m/di ns/di 8 G Large-Signal Transient, A = /DI ns/di S = A = R F = R G = k C L = pf 8 G 7
8 LT8- Applications Information The LT8- may be inserted directly into many operational amplifier applications improving both DC and AC performance, provided that the nulling circuitry is removed. The suggested nulling circuit for the LT8- is shown below. 8 + LT8- k + 7 Offset Nulling.µF.µF 8 AI.µF.µF Gain of Stable The LT8- is a decompensated version of the LT8. The precision DC performance is identical, but the internal compensation capacitors have been reduced to a point where the op amp needs a gain of or greater in order to be stable. In general, for applications where the gain around the op amp is, the decompensated version should be used, because it will give the best AC performance. In applications where the gain is <, the unity-gain stable version should be used. The appropriate way to define the gain is as the inverse of the feedback ratio from output to differential input, including all relevant parasitics. Moreover, as with all feedback loops, the stability of the loop depends on the value of that feedback ratio at frequencies where the total loop-gain would cross unity. Therefore, it is possible to have circuits in which the gain at DC is lower than the gain at high frequency, and these circuits can be stable even with a non unity-gain stable op amp. An example is many current-output DAC buffer applications. Layout and Passive Components The LT8 requires attention to detail in board layout in order to maximize DC and AC performance. For best AC results (for example fast settling time) use a ground plane, short lead lengths, and RF-quality bypass capacitors (.µf to.µf) in parallel with low ESR bypass capacitors (µf to µf tantalum). For best DC performance, use star grounding techniques, equalize input trace lengths and minimize leakage (i.e.,.gω of leakage between an input and a supply will generate na equal to the maximum I B specification.) Board leakage can be minimized by encircling the input circuitry with a guard ring operated at a potential close to that of the inputs. For inverting configurations tie the ring to ground, in noninverting connections tie the ring to the inverting input (note the input capacitance will increase which may require a compensating capacitor as discussed below.) Microvolt level error voltages can also be generated in the external circuitry. Thermocouple effects caused by temperature gradients across dissimilar metals at the contacts to the inputs can exceed the inherent drift of the amplifier. Air currents over device leads should be minimized, package leads should be short, and the two input leads should be as close together as possible and maintained at the same temperature. Make no connection to Pin 8. This pin is used for factory trim of the inverting input current. The parallel combination of the feedback resistor and gain setting resistor on the inverting input can combine with the input capacitance to form a pole that can cause peaking or even oscillations. A feedback capacitor of the value: C F = (R G )(C IN /R F ) may be used to cancel the input pole and optimize dynamic performance. For applications where the DC noise gain is one, and a large feedback resistor is used, C F should be less than or equal to one half of C IN. An example would be a DAC I-to- converter as shown on the front page of this data sheet where the DAC can have many tens of pf of output capacitance. R G Nulling Input Capacitance C IN IN R F C F LT8- + OUT 8 AI
9 applications information Input Considerations Each input of the LT8- is protected with a Ω series resistor and back-to-back diodes across the bases of the input devices. If the inputs can be pulled apart, the input current should be limited to less than with an external series resistor. Each input also has two ESD clamp diodes one to each supply. If an input is driven above the supply, limit the current with an external resistor to less than. The LT8- employs bias current cancellation at the inputs. The inverting input current is trimmed at zero common mode voltage to minimize errors in inverting applications such as I-to- converters. The noninverting input current is not trimmed and has a wider variation and therefore a larger maximum value. As the input offset current can be greater than either input current, the use of balanced source resistance is NOT recommended as it actually degrades DC accuracy and also increases noise. LT8- The input bias currents vary with common mode voltage as shown in the Typical Performance Characteristics. The cancellation circuitry was not designed to track this common mode voltage because the settling time would have been adversely affected. The LT8 inputs can be driven to the negative supply and to within. of the positive supply without phase reversal. As the input moves closer than. to the positive supply, the output reverses phase. Total Input Noise The curve of Total Noise vs Unmatched Source Resistance in the Typical Performance Characteristics shows that with source resistance below k, the voltage noise of the amplifier dominates. In the k to k region the increase in noise is due to the source resistance. Above k the input current noise component is larger than the resistor noise. Input Stage Protection +IN R Ω Q Q R Ω IN 8 AI 9
10 LT8- Simplified Schematic + I I I Q8 Q9 Q OUT +IN Q Q IN Q Q Q7 Q Q Q BIAS C I I I 8 SS
11 Package Description Please refer to for the most recent package drawings. LT8- S8 Package 8-Lead Plastic Small Outline (Narrow.) (LTC DWG # -8- Rev G). BSC. ± (.8.) NOTE 8 7. MIN. ±..8. (.79.97)..7 (.8.988) NOTE. ±. TYP RECOMMENDED SOLDER PAD LAYOUT.8. (..).. (..8) 8 TYP..9 (..7).. (..).. (..7) NOTE: INCHES. DIMENSIONS IN (MILLIMETERS)..9 (..8) TYP. DRAWING NOT TO SCALE. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED." (.mm). PIN CAN BE BEEL EDGE OR A DIMPLE. (.7) BSC SO8 RE G
12 LT8- package description Please refer to for the most recent package drawings. DD Package 8-Lead Plastic DFN (mm mm) (Reference LTC DWG # Rev C).7 ±.. ±.. ±.. ±. ( SIDES) PACKAGE OUTLINE. ±.. BSC.8 ±. RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED R =. TYP 8. ±. PIN TOP MARK (NOTE ). REF. ±. ( SIDES).7 ±.... ±. ( SIDES). ±.. BSC.8 ±. BOTTOM IEW EXPOSED PAD (DD8) DFN 9 RE C NOTE:. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M-9 ARIATION OF (WEED-). DRAWING NOT TO SCALE. ALL DIMENSIONS ARE IN MILLIMETERS. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED.mm ON ANY SIDE. EXPOSED PAD SHALL BE SOLDER PLATED. SHADED AREA IS ONLY A REFERENCE FOR PIN LOCATION ON TOP AND BOTTOM OF PACKAGE
13 LT8- Revision History RE DATE DESCRIPTION PAGE NUMBER A /9 Change to Both Packages in Pin Configuration. B / Updated S8 and DD packages in the Package Description section. - Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
14 LT8- Typical Application -Bit ADC Buffer pf k k IN LT8- + Ω pf.k CAP LTC BITS 8 TA.µF Related Parts PART NUMBER DESCRIPTION COMMENTS LT7 Precision Instrumentation Amplifier Single Resistor Gain Set,.% Max Gain Error, ppm Max Gain Nonlinearity LT8 Single MHz, /µs, -Bit Accurate A Op Amp 7 OS(MAX) LT8- Single 9MHz, /µs, -Bit Accurate Op Amp 7 OS(MAX) LT9 Dual MHz, /µs, -Bit Accurate A Op Amp 7 OS(MAX) LT9- Dual 9MHz, /µs, -Bit Accurate Op Amp 7 OS(MAX) LTC9/ LTC9 -Bit Serial Multiplying I OUT DACs ±LSB Max INL/DNL, Low Glitch, DAC8 -Bit Upgrade LTC97 -Bit Parallel Multiplying I OUT DAC ±LSB Max INL/DNL, Low Glitch, On-Chip Bipolar Resistors LTC -Bit, ksps Sampling ADC ±. Input, SINAD = 9dB, THD = db LTC Single, -Bit, ksps Sampling ADC Low Power, ± Inputs, Parallel/Byte Interface LT RE B PRINTED IN USA Linear Technology Corporation McCarthy Blvd., Milpitas, CA 9-77 (8) -9 FAX: (8) -7 LINEAR TECHNOLOGY CORPORATION 8
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