DESCRIPTIO FEATURES APPLICATIO S TYPICAL APPLICATIO. LT1813/LT1814 Dual/Quad 3mA, 100MHz, 750V/µs Operational Amplifiers

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1 / LT8 FEATRES MHz Gain Bandwidth Product 75V/µs Slew Rate 3.6mA Maximum Supply Current per Amplifier Tiny 3mm x 3mm x.8mm DFN Package 8nV/ Hz Input Noise Voltage nity-gain Stable.5mV Maximum Input Offset Voltage µa Maximum Input Bias Current na Maximum Input Offset Current ma Minimum Output Current, V OT = ±3V ±3.5V Minimum Input CMR, 3ns Settling Time to.%, 5V Step Specified at ±5V, Single 5V Supplies Operating Temperature Range: C to 85 C APPLICATIO S Active Filters Wideband Amplifiers Buffers Video Amplification Communication Receivers Cable Drivers Data Acquisition Systems DESCRIPTIO LT83/LT8 Dual/Quad 3mA, MHz, 75V/µs Operational Amplifiers The LT 83/LT8 are dual and quad, low power, high speed, very high slew rate operational amplifiers with excellent DC performance. The LT83/LT8 feature reduced supply current, lower input offset voltage, lower input bias current and higher DC gain than other devices with comparable bandwidth. The circuit topology is a voltage feedback amplifier with the slewing characteristics of a current feedback amplifier. The output drives a Ω load to ±3.5V with ±5V supplies. On a single 5V supply, the output swings from.v to 3.9V with a Ω load connected to 2.5V. The amplifiers are stable with a pf capacitive load making them useful in buffer and cable driver applications. The LT83/LT8 are manufactured on Linear Technology s advanced low voltage complementary bipolar process. The LT83 dual op amp is available in 8-pin MSOP, SO and 3mm x 3mm low profile (.8mm) dual fine pitch leadless packages (DFN). The quad LT8 is available in -pin SO and 6-pin SSOP packages. A single version, the LT82, is also available (see separate data sheet)., LTC and LT are registered trademarks of Linear Technology Corporation. TYPICAL APPLICATIO Bandpass Filter with Independently Settable Gain, Q and f C R Filter Frequency Response V IN R G / LT8 R Q GAIN = R R G Q = R R Q f C = 2πR F C R R R C R F C / LT8 / LT8 R F 8 TA BANDPASS OT OTPT MAGNITDE (6dB/DIV) R = 99Ω R = 99Ω R F = 75Ω R Q = 9.9Ω R G = 99Ω C = 3.3nF f C = khz Q = GAIN = V IN = 5V P-P DISTORTION: 2nd < 76dB 3rd < 9dB ACROSS FREQ RANGE k k k M M 8 TA2

2 ABSOLTE AXI RATI GS W W W Total Supply Voltage (V to V ) LT83/LT V LT83HV V Differential Input Voltage (Transient Only, Note 2).. ±6V Input Voltage... ±V S Output Short-Circuit Duration (Note 3)... Indefinite Operating Temperature Range... C to 85 C (Note ) Specified Temperature Range (Note 8).. C to 85 C Maximum Junction Temperature... 5 C (DD Package) C Storage Temperature Range C to 5 C (DD Package) C to 25 C Lead Temperature (Soldering, sec)... 3 C W PACKAGE/ORDER I FOR ATIO OT A IN A IN A V 2 3 TOP VIEW A 8 V 7 OT B 6 IN B B 5 IN B DD PACKAGE 8-LEAD (3mm 3mm) PLASTIC DFN T JMAX = 25 C, θ JA = 6 C/W NDERSIDE METAL INTERNALLY CONNECTED TO V ORDER PART NMBER LT83DDD* LT83CDD LT83IDD DD PART MARKING** LAAQ OTA IN A 2 IN A 3 V TOP VIEW MS8 PACKAGE 8-LEAD PLASTIC MSOP 8 V 7 OT B 6 IN B 5 IN B T JMAX = 5 C, θ JA = 25 C/W ORDER PART NMBER LT83DMS8* MS8 PART MARKING LTGZ OT A IN A 2 IN A 3 V TOP VIEW A 8 V 7 OT B 6 IN B 5 IN B S8 PACKAGE 8-LEAD PLASTIC SO T JMAX = 5 C, θ JA = 5 C/W B OT A IN A 2 A IN A 3 V IN B 5 B IN B 6 OT B 7 TOP VIEW OT D 3 IN D 2 IN D V IN C 9 IN C 8 OT C S PACKAGE -LEAD PLASTIC SO T JMAX = 5 C, θ JA = C/W D C OT A IN A 2 A 3 IN A V IN B 5 B IN B 6 OT B 7 NC 8 TOP VIEW 6 OT D 5 IN D D IN D 3 V 2 IN C C IN C OT C 9 NC GN PACKAGE 6-LEAD PLASTIC SSOP T JMAX = 5 C, θ JA = 35 C/W ORDER PART NMBER LT83DS8* LT83CS8 LT83IS8 LT83HVDS8* LT83HVCS8 LT83HVIS8 S8 PART MARKING 83D 83 83I 83HVD 83HV 83HVI ORDER PART NMBER LT8CS LT8IS Consult LTC marketing for parts specified with wider operating temperature ranges. *See Note 9. **The temperature grades are identified by a label on the shipping container. ORDER PART NMBER LT8CGN LT8IGN GN PART MARKING 8 8I 2

3 ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at., V CM = V, unless otherwise noted. (Note 8) SYMBOL PARAMETER CONDITIONS MIN TYP MAX NITS V OS Input Offset Voltage (Note ).5.5 mv T A = C to 7 C 2 mv T A = C to 85 C 3 mv V OS Input Offset Voltage Drift (Note 7) T A = C to 7 C 5 µv/ C T T A = C to 85 C 3 µv/ C I OS Input Offset Current 5 na T A = C to 7 C 5 na T A = C to 85 C 6 na I B Input Bias Current.9 ± µa T A = C to 7 C ±5 µa T A = C to 85 C ±6 µa e n Input Noise Voltage Density f = khz 8 nv/ Hz i n Input Noise Current Density f = khz pa/ Hz R IN Input Resistance V CM = 3.5V 3 MΩ Differential.5 MΩ C IN Input Capacitance 2 pf V CM Input Voltage Range Guaranteed by CMRR ±3.5 ±.2 V T A = C to 85 C ±3.5 V CMRR Common Mode Rejection Ratio V CM = ±3.5V db T A = C to 7 C 73 db T A = C to 85 C 72 db Minimum Supply Voltage Guaranteed by PSRR ±.25 ±2 V T A = C to 85 C ±2 V PSRR Power Supply Rejection Ratio V S = ±2V to ±5.5V db T A = C to 7 C 76 db T A = C to 85 C 75 db V S = ±2V to ±6.5V (LT83HV) db T A = C to 7 C 73 db T A = C to 85 C 72 db A VOL Large-Signal Voltage Gain V OT = ±3V, R L = 5Ω.5 3 V/mV T A = C to 7 C. V/mV T A = C to 85 C.8 V/mV V OT = ±3V, R L = Ω. 2.5 V/mV T A = C to 7 C.7 V/mV T A = C to 85 C.6 V/mV V OT Maximum Output Swing R L = 5Ω, 3mV Overdrive ±3.8 ± V (Positive/Negative) T A = C to 7 C ±3.7 V T A = C to 85 C ±3.6 V R L = Ω, 3mV Overdrive ±3.35 ±3.5 V T A = C to 7 C ±3.25 V T A = C to 85 C ±3.5 V 3

4 ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at., V CM = V, unless otherwise noted. (Note 8) SYMBOL PARAMETER CONDITIONS MIN TYP MAX NITS I OT Maximum Output Current V OT = ±3V, 3mV Overdrive ± ±6 ma T A = C to 7 C ±35 ma T A = C to 85 C ±3 ma I SC Output Short-Circuit Current V OT = V, V Overdrive (Note 3) ±75 ± ma T A = C to 7 C ±6 ma T A = C to 85 C ±55 ma SR Slew Rate A V = (Note 5) 5 75 V/µs T A = C to 7 C V/µs T A = C to 85 C 35 V/µs FPBW Full Power Bandwidth 6V P-P (Note 6) MHz GBW Gain Bandwidth Product f = 2kHz, R L = 5Ω 75 MHz T A = C to 7 C 65 MHz T A = C to 85 C 6 MHz 3dB BW 3dB Bandwidth A V =, R L = 5Ω 2 MHz t r, t f Rise Time, Fall Time A V =, % to 9%,.V, R L = Ω 2 ns t PD Propagation Delay (Note ) A V =, 5% to 5%,.V, R L = Ω 2.8 ns OS Overshoot A V =,.V, R L = Ω 25 % t S Settling Time A V =,.%, 5V 3 ns THD Total Harmonic Distortion A V = 2, f = MHz, V OT = 2V P-P, R L = 5Ω 76 db dg Differential Gain A V = 2, V OT = 2V P-P, R L = 5Ω.2 % dp Differential Phase A V = 2, V OT = 2V P-P, R L = 5Ω.7 DEG R OT Output Resistance A V =, f = MHz. Ω Channel Separation V OT = ±3V, R L = Ω 82 db T A = C to 7 C 8 db T A = C to 85 C 8 db I S Supply Current Per Amplifier ma T A = C to 7 C.5 ma T A = C to 85 C 5. ma Per Amplifier,V S = ±6.5V, (LT83HV only). ma T A = C to 7 C 5. ma T A = C to 85 C 5.5 ma

5 ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at. V S = 5V, V CM = 2.5V, R L to 2.5V, unless otherwise noted. (Note 8) SYMBOL PARAMETER CONDITIONS MIN TYP MAX NITS V OS Input Offset Voltage (Note ).7 2. mv T A = C to 7 C 2.5 mv T A = C to 85 C 3.5 mv V OS Input Offset Voltage Drift (Note 7) T A = C to 7 C 5 µv/ C T T A = C to 85 C 3 µv/ C I OS Input Offset Current 5 na T A = C to 7 C 5 na T A = C to 85 C 6 na I B Input Bias Current ± µa T A = C to 7 C ±5 µa T A = C to 85 C ±6 µa e n Input Noise Voltage Density f = khz 8 nv/ Hz i n Input Noise Current Density f = khz pa/ Hz R IN Input Resistance V CM = 3.5V 3 MΩ Differential.5 MΩ C IN Input Capacitance 2 pf V CM Input Voltage Range Guaranteed by CMRR V (Positive) T A = C to 85 C 3.5 V Input Voltage Range Guaranteed by CMRR.8.5 V (Negative) T A = C to 85 C.5 V CMRR Common Mode Rejection Ratio V CM =.5V to 3.5V db T A = C to 7 C 7 db T A = C to 85 C 7 db Minimum Supply Voltage Guaranteed by PSRR 2.5 V T A = C to 85 C V A VOL Large-Signal Voltage Gain V OT =.5V to 3.5V, R L = 5Ω. 2 V/mV T A = C to 7 C.7 V/mV T A = C to 85 C.6 V/mV V OT =.5V to 3.5V, R L = Ω.7.5 V/mV T A = C to 7 C.5 V/mV T A = C to 85 C. V/mV V OT Maximum Output Swing R L = 5Ω, 3mV Overdrive 3.9. V (Positive) T A = C to 7 C 3.8 V T A = C to 85 C 3.7 V R L = Ω, 3mV Overdrive V T A = C to 7 C 3.6 V T A = C to 85 C 3.5 V Maximum Output Swing R L = 5Ω, 3mV Overdrive.9. V (Negative) T A = C to 7 C.2 V T A = C to 85 C.3 V R L = Ω, 3mV Overdrive..3 V T A = C to 7 C. V T A = C to 85 C.5 V 5

6 ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at. V S = 5V, V CM = 2.5V, R L to 2.5V, unless otherwise noted. (Note 8) SYMBOL PARAMETER CONDITIONS MIN TYP MAX NITS I OT Maximum Output Current V OT =.5V or 3.5V, 3mV Overdrive ±25 ±35 ma T A = C to 7 C ±2 ma T A = C to 85 C ±7 ma I SC Output Short-Circuit Current V OT = 2.5V, V Overdrive (Note 3) ±55 ±75 ma T A = C to 7 C ±5 ma T A = C to 85 C ± ma SR Slew Rate A V = (Note 5) 2 35 V/µs T A = C to 7 C 5 V/µs T A = C to 85 C 25 V/µs FPBW Full Power Bandwidth 2V P-P (Note 6) 55 MHz GBW Gain Bandwidth Product f = 2kHz, R L = 5Ω 65 9 MHz T A = C to 7 C 55 MHz T A = C to 85 C 5 MHz 3dB BW 3dB Bandwidth A V =, R L = 5Ω 8 MHz t r, t f Rise Time, Fall Time A V =, % to 9%,.V, R L = Ω 2. ns t PD Propagation Delay (Note ) A V =, 5% to 5%,.V, R L = Ω 3 ns OS Overshoot A V =,.V, R L = Ω 25 % t S Settling Time A V =,.%, 2V 3 ns THD Total Harmonic Distortion A V = 2, f = MHz, V OT = 2V P-P, R L = 5Ω 75 db dg Differential Gain A V = 2, V OT = 2V P-P, R L = 5Ω.22 % dp Differential Phase A V = 2, V OT = 2V P-P, R L = 5Ω.2 DEG R OT Output Resistance A V =, f = MHz.5 Ω Channel Separation V OT =.5V to 3.5V, R L = Ω 8 db T A = C to 7 C 8 db T A = C to 85 C 79 db I S Supply Current Per Amplifier 2.9. ma T A = C to 7 C 5. ma T A = C to 85 C 5.5 ma Note : Absolute Maximum Ratings are those values beyond which the life of the device may be impaired. Note 2: Differential inputs of ±6V are appropriate for transient operation only, such as during slewing. Large sustained differential inputs can cause excessive power dissipation and may damage the part. Note 3: A heat sink may be required to keep the junction temperature below absolute maximum when the output is shorted indefinitely. Note : Input offset voltage is pulse tested and is exclusive of warm-up drift. Note 5: Slew rate is measured between ±2V at the output with ±3V input for ±5V supplies and 2V P-P at the output with a 3V P-P input for single 5V supplies. Note 6: Full power bandwidth is calculated from the slew rate: FPBW = SR/2πV P Note 7: This parameter is not % tested Note 8: The LT83C/LT8C are guaranteed to meet specified performance from C to 7 C and is designed, characterized and expected to meet the extended temperature limits, but is not tested at C and 85 C. The LT83I/LT8I are guaranteed to meet the extended temperature limits. Note 9: The LT83D is % production tested at 25 C. It is designed, characterized and expected to meet the C to 7 C specifications although it is not tested or QA sampled at these temperatures. The LT83D is guaranteed functional from C to 85 C but may not meet those specifications. Note : Propagation delay is measured from the 5% point on the input waveform to the 5% point on the output waveform. 6

7 TYPICAL PERFOR A CE CHARACTERISTICS W SPPLY CRRENT (ma) Supply Current vs Temperature PER AMPLIFIER 5 25 V S = ±2.5V TEMPERATRE ( C) INPT COMMON MODE RANGE (V) V V Input Common Mode Range vs Supply Voltage V OS < mv SPPLY VOLTAGE (± V) INPT BIAS CRRENT (µa) Input Bias Current vs Common Mode Voltage INPT COMMON MODE VOLTAGE (V) 5. 83/ G 83/ G2 83/ G3 INPT BIAS CRRENT (µa) Input Bias Current vs Temperature INPT VOLTAGE NOISE (nv/ Hz) Input Noise Spectral Density i n e n A V = R S = k INPT CRRENT NOISE (pa/ Hz) OPEN-LOOP GAIN (db) Open-Loop Gain vs Resistive Load V S = ±2.5V TEMPERATRE ( C). k k k 6 k LOAD RESISTANCE (Ω) k 83/ G 83/ G5 83/ G6 OPEN-LOOP GAIN (db) Open-Loop Gain vs Temperature V O = ±3V R L = 5Ω R L = Ω TEMPERATRE ( C) 83/ G7 OTPT VOLTAGE SWING (V) V V Output Voltage Swing vs Supply Voltage V IN = 3mV R L = 5Ω R L = Ω R L = Ω R L = 5Ω SPPLY VOLTAGE (± V) 83/ G2 OTPT VOLTAGE SWING (V) V Output Voltage Swing vs Load Current V IN = 3mV 85 C 25 C C V OTPT CRRENT (ma) 83/ G9 7

8 TYPICAL PERFOR A CE CHARACTERISTICS W OTPT SHORT-CIRCIT CRRENT (ma) Output Short-Circuit Current vs Temperature SORCE SINK TEMPERATRE ( C) OTPT STEP (V) Settling Time vs Output Step A 3 V = R F = 5Ω C F = 3pF.% SETTLING SETTLING TIME (ns) OTPT IMPEDANCE (Ω)... k Output Impedance vs Frequency A V = A V = A V = V S = ± 5V k M M M 83/ G 83/ G 83/ G2 GAIN (db) Gain and Phase vs Frequency GAIN ±2.5V A V = R F = R G = 5Ω ±2.5V ±5V PHASE ±5V 2 k k M M M M PHASE (DEG) CROSSTALK (db) Crosstalk vs Frequency A V = V IN = dbm R L = Ω 9 k M M M M GAIN BANDWIDTH (MHz) Gain Bandwidth and Phase Margin vs Temperature R L = 5Ω 5 25 GBW PHASE MARGIN V S = ±2.5V GBW V S = ±2.5V PHASE MARGIN TEMPERATRE ( C) PHASE MARGIN (DEG) 83/ G3 83/ G 83/ G5 VOLTAGE MAGNITDE (db) Frequency Response vs Supply Voltage, A V = A V = NO R L V S = ±2.5V VOLTAGE MAGNITDE (db) Frequency Response vs Supply Voltage, A V = 2 V S = ±2.5V A V = 2 R L = Ω VOLTAGE MAGNITDE (db) Frequency Response vs Capacitive Load, A V = 2 TA = 25 C A V = V 8 S = ±5V R F = R G = 5Ω NO R L C L = pf C L = 5pF C L = 2pF C L = pf C L = 5pF C L = M M M 5M 6 M M M 5M 8 M M 2M 83/ G6 83/ G7 83/ G8 8

9 TYPICAL PERFOR A CE CHARACTERISTICS W GAIN BANDWIDTH (MHz) 9 Gain Bandwidth and Phase Margin vs Supply Voltage 7 5 GBW R L = 5Ω GBW R L = Ω 2 3 PHASE MARGIN R L = Ω SPPLY VOLTAGE (±V) PHASE MARGIN R L = 5Ω 83/ G PHASE MARGIN (DEG) POWER SPPLY REJECTION RATIO (db) Power Supply Rejection Ratio vs Frequency PSRR k k k PSRR A V = M M M 83/ G2 COMMON MODE REJECTION RATIO (db) Common Mode Rejection Ratio vs Frequency k k k M M M 83/ G2 SLEW RATE (V/µs) Slew Rate vs Supply Voltage Slew Rate vs Supply Voltage Slew Rate vs Input Level T A =25 C A V = V IN = V S(TOTAL) /2 R F = R G = R L = 5Ω SR SR SPPLY VOLTAGE (±V) SLEW RATE (V/µs) T A =25 C A V = V IN = ±V R F = R G = R L = 5Ω SR SR SPPLY VOLTAGE (±V) SLEW RATE (V/µs) T A =25 C A V = R F = R G = R L = 5Ω SR SR INPT LEVEL (V P-P ) 83/ G22 83/ G23 83/ G2 SLEW RATE (V/µs) Slew Rate vs Temperature SR V S = ±2.5V SR SR V S = ±2.5V SR TEMPERATRE ( C) TOTAL HARMONIC DISTORTION NOISE (%)..5 Total Harmonic Distortion Noise vs Frequency A V = A V =.2 V O = 2V P-P R L = 5Ω. k k k OTPT VOLTAGE (VP-P) ndistorted Output Swing vs Frequency A V = A V = 2 R L = Ω 2% MAX DISTORTION k M M M 83/ G25 83/ G26 83/ G27 9

10 TYPICAL PERFOR A CE CHARACTERISTICS HARMONIC DISTORTION (db) k A V = 2 V O = 2V P-P 3RD HARMONIC R L = Ω 2ND HARMONIC R L = Ω 2ND HARMONIC R L = 5Ω M W 2nd and 3rd Harmonic Distortion vs Frequency 3RD HARMONIC R L = 5Ω 83/ G28 M DIFFERENTIAL PHASE (DEG) Differential Gain and Phase vs Supply Voltage DIFFERENTIAL GAIN R L = 5Ω DIFFERENTIAL GAIN R L = k DIFFERENTIAL PHASE R L = 5Ω DIFFERENTIAL PHASE R L = k TOTAL SPPLY VOLTAGE (V) 83/ G DIFFERENTIAL GAIN (%) OVERSHOOT (%) Capacitive Load Handling TA = 25 C 9 A V = A V = CAPACITIVE LOAD (pf) 83/ G3 Small-Signal Transient (A V = ) Small-Signal Transient (A V = ) Small-Signal Transient (A V =, C L = pf) 83/ G3 83/ G32 83/ G33 Large-Signal Transient (A V = ) Large-Signal Transient (A V = ) Large-Signal Transient (A V =, C L = 2pF) 83/ G3 83/ G35 83/ G36

11 APPLICATIO S I FOR ATIO W Layout and Passive Components The LT83/LT8 amplifiers are more tolerant of less than ideal board layouts than other high speed amplifiers. For optimum performance, a ground plane is recommended and trace lengths should be minimized, especially on the negative input lead. Low ESL/ESR bypass capacitors should be placed directly at the positive and negative supply pins (.µf ceramics are recommended). For high drive current applications, additional µf to µf tantalums should be added. The parallel combination of the feedback resistor and gain setting resistor on the inverting input combine with the input capacitance to form a pole that can cause peaking or even oscillations. If feedback resistors greater than k are used, a parallel capacitor of value: C F > R G C IN /R F should be used to cancel the input pole and optimize dynamic performance. For applications where the DC noise gain is and a large feedback resistor is used, C F should be greater than or equal to C IN. An example would be an I-to-V converter. Input Considerations The inputs of the LT83/LT8 amplifiers are connected to the base of an NPN and PNP bipolar transistor in parallel. The base currents are of opposite polarity and provide first order bias current cancellation. Due to variation in the matching of NPN and PNP beta, the polarity of the input bias current can be positive or negative. The offset current, however, does not depend on beta matching and is tightly controlled. Therefore, the use of balanced source resistance at each input is recommended for applications where DC accuracy must be maximized. For example, with a Ω source resistance at each input, the na maximum offset current results in only µv of extra offset, while without balance the µa maximum input bias current could result in a.mv offset contribution. The inputs can withstand differential input voltages of up to 6V without damage and without needing clamping or series resistance for protection. This differential input voltage generates a large internal current (up to ma), which results in the high slew rate. In normal transient closed-loop operation, this does not increase power dissipation significantly because of the low duty cycle of the transient inputs. Sustained differential inputs, however, will result in excessive power dissipation and therefore this device should not be used as a comparator. Capacitive Loading The LT83/LT8 are stable with capacitive loads from pf to pf, which is outstanding for a MHz amplifier. The internal compensation circuitry accomplishes this by sensing the load induced output pole and adding compensation at the amplifier gain node as needed. As the capacitive load increases, both the bandwidth and phase margin decrease so there will be peaking in the frequency domain and ringing in the transient response. Coaxial cable can be driven directly, but for best pulse fidelity a resistor of value equal to the characteristic impedance of the cable (e.g., 75Ω) should be placed in series with the output. The receiving end of the cable should be terminated with the same value resistance to ground. Slew Rate The slew rate of the LT83/LT8 is proportional to the differential input voltage. Highest slew rates are therefore seen in the lowest gain configurations. For example, a 5V output step in a gain of has a.5v input step, whereas in unity gain there is a 5V input step. The LT83/LT8 is tested for a slew rate in a gain of. Lower slew rates occur in higher gain configurations. Power Dissipation The LT83/LT8 combine two or four amplifiers with high speed and large output drive in a small package. It is possible to exceed the maximum junction temperature specification under certain conditions. Maximum junction temperature (T J ) is calculated from the ambient temperature (T A ) and power dissipation (P D ) as follows: T J = T A (P D θ JA )

12 APPLICATIO S I FOR ATIO W Power dissipation is composed of two parts. The first is due to the quiescent supply current and the second is due to on-chip dissipation caused by the load current. The worst-case load induced power occurs when the output voltage is at /2 of either supply voltage (or the maximum swing if less than /2 the supply voltage). Therefore P DMAX is: P DMAX = (V V ) (I SMAX ) (V /2) 2 /R L or P DMAX = (V V ) (I SMAX ) (V V OMAX ) (V OMAX /R L ) Example: LT8S at 7 C,, R L =Ω P DMAX = (V) (.5mA) (2.5V) 2 /Ω = 8mW T JMAX = 7 C ( 8mW) ( C/W) = 3 C Circuit Operation The LT83/LT8 circuit topology is a true voltage feedback amplifier that has the slewing behavior of a current feedback amplifier. The operation of the circuit can be understood by referring to the Simplified Schematic. Complementary NPN and PNP emitter followers buffer the inputs and drive an internal resistor. The input voltage appears across the resistor, generating current that is mirrored into the high impedance node. Complementary followers form an output stage that buffers the gain node from the load. The input resistor, input stage transconductance, and the capacitor on the high impedance node determine the bandwidth. The slew rate is determined by the current available to charge the gain node capacitance. This current is the differential input voltage divided by R, so the slew rate is proportional to the input step. Highest slew rates are therefore seen in the lowest gain configurations. The RC network across the output stage is bootstrapped when the amplifier is driving a light or moderate load and has no effect under normal operation. When a heavy load (capacitive or resistive) is driven, the network is incompletely bootstrapped and adds to the compensation at the high impedance node. The added capacitance moves the unity-gain frequency away from the pole formed by the output impedance and the capacitive load. The zero created by the RC combination adds phase to ensure that the total phase lag does not exceed 8 (zero phase margin), and the amplifier remains stable. In this way, the LT83/ LT8 are stable with up to pf capacitive loads in unity gain, and even higher capacitive loads in higher closed-loop gain configurations. SI PLIFIED SCHE ATIC W W (one amplifier) V IN R IN C R C C C OT V 8 SS 2

13 TYPICAL APPLICATIO MHz, th Order Butterworth Filter Filter Frequency Response V IN 232Ω 232Ω 665Ω 22pF 7pF /2 LT83 27Ω 27Ω 562Ω 7pF 22pF /2 LT83 V OT 83/ TA VOLTAGE GAIN (db) V IN = 6mV P-P PEAKING <.2dB 9. FREQENCY (MHz) 83/ TA2 Gain of 2 Composite Amplifier Drives Differential Load with Low Distortion k 68pF k 99Ω LOAD 99Ω 8Ω / LT8 / LT8 / LT8 9k 68pF / LT8 GAIN = 2 V IN 3dB BANDWIDTH = MHz k 99Ω DISTORTION = 77dB AT 2MHz, R L = k 99Ω 8 TA3 3

14 PACKAGE DESCRIPTIO.675 ±.5 DD Package 8-Lead Plastic DFN (3mm 3mm) (Reference LTC DWG # ) R =.5 TYP ±. 3.5 ± ±.5.65 ±.5 (2 SIDES).28 ±.5.5 BSC 2.38 ±.5 (2 SIDES) PACKAGE OTLINE RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS PIN TOP MARK.2 REF 3. ±. ( SIDES).75 ± ±. (2 SIDES).28 ± ±. (2 SIDES) BOTTOM VIEW EXPOSED PAD NOTE:. DRAWING TO BE MADE A JEDEC PACKAGE OTLINE M-229 VARIATION OF (WEED-) 2. ALL DIMENSIONS ARE IN MILLIMETERS 3. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED.5mm ON ANY SIDE. EXPOSED PAD SHALL BE SOLDER PLATED.5 BSC (DD8) DFN 23 MS8 Package 8-Lead Plastic MSOP (Reference LTC DWG # ).889 ±.27 (.35 ±.5) 5.23 (.26) MIN (.26.36).2 ±. (.65 ±.5) TYP.65 (.256) BSC 3. ±.2 (.8 ±.) (NOTE 3) (.26) REF RECOMMENDED SOLDER PAD LAYOT GAGE PLANE.8 (.77).25 (.) DETAIL A DETAIL A NOTE:. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 6 TYP.53 ±.5 (.2 ±.6) SEATING PLANE.9 ±.5 (.93 ±.6). (.3) MAX (.9.5) TYP.65 (.256) BSC DIMENSION DOES NOT INCLDE MOLD FLASH, PROTRSIONS OR GATE BRRS. MOLD FLASH, PROTRSIONS OR GATE BRRS SHALL NOT EXCEED.52mm (.6") PER SIDE. DIMENSION DOES NOT INCLDE INTERLEAD FLASH OR PROTRSIONS. INTERLEAD FLASH OR PROTRSIONS SHALL NOT EXCEED.52mm (.6") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE.2mm (.") MAX 3. ±.2 (.8 ±.) NOTE.86 (.3) REF.3 ±.76 (.5 ±.3) MSOP (MS8) 82

15 PACKAGE DESCRIPTIO.5 BSC S8 Package 8-Lead Plastic Small Outline (Narrow.5 Inch) (Reference LTC DWG # 5-8-6).5 ± (.8 5.) NOTE MIN.6 ± ( ).5.57 ( ) NOTE 3.3 ±.5 TYP RECOMMENDED SOLDER PAD LAYOT (.23.25)..2 (.25.58) 5 8 TYP ( ).. (..25) (.6.27) ( ) NOTE: INCHES TYP. DIMENSIONS IN (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLDE MOLD FLASH OR PROTRSIONS. MOLD FLASH OR PROTRSIONS SHALL NOT EXCEED.6" (.5mm).5 (.27) BSC SO8 33 S Package -Lead Plastic Small Outline (Narrow.5 Inch) (Reference LTC DWG # 5-8-6).5 BSC.5 ± ( ) NOTE 3 N MIN 2 3 N/2.6 ± ( ) N N/ ( ) NOTE 3.3 ±.5 TYP RECOMMENDED SOLDER PAD LAYOT (.23.25)..2 (.25.58) 5 8 TYP ( ).. (..25) (.6.27) ( ) TYP NOTE: INCHES. DIMENSIONS IN (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLDE MOLD FLASH OR PROTRSIONS. MOLD FLASH OR PROTRSIONS SHALL NOT EXCEED.6" (.5mm).5 (.27) BSC Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. S 52 5

16 TYPICAL APPLICATIO Two Op Amp Instrumentation Amplifier R5 22Ω R k R k R2 k V IN /2 LT83 R3 k TRIM R5 FOR GAIN TRIM R FOR COMMON MODE REJECTION BW = MHz /2 LT83 ( ) R R R R R GAIN = R R R R = / TA3 V OT PACKAGE DESCRIPTIO.5 ±.5 GN Package 6-Lead Plastic SSOP (Narrow.5 Inch) (Reference LTC DWG # 5-8-6).89.96* (.8.978) (.229) REF.25 MIN ( ).5.57** ( ).65 ±.5 RECOMMENDED SOLDER PAD LAYOT NOTE:. CONTROLLING DIMENSION: INCHES INCHES 2. DIMENSIONS ARE IN (MILLIMETERS) 3. DRAWING NOT TO SCALE.25 TYP *DIMENSION DOES NOT INCLDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED.6" (.52mm) PER SIDE **DIMENSION DOES NOT INCLDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED." (.25mm) PER SIDE.7.98 (.78.29).6.5 (.6.27).5 ±. (.38 ±.) 5 8 TYP ( ).8.2 (.23.35) (.635) BSC..98 (.2.29) GN6 (SSOP) 52 RELATED PARTS PART NMBER DESCRIPTION COMMENTS LT363/LT36/LT365 Single/Dual/Quad 7MHz, V/µs, C-Load TM Op Amps ±2.5V to ±5V Operation LT395/LT396/LT397 Single/Dual/Quad MHz Current Feedback Amplifiers.6mA Supply Current, 8V/µs, 8mA Output Current LT86/LT87 Single/Dual 325MHz, V/µs Rail-to-Rail I/O Op Amps Low Noise 3.5nV/ Hz LT89/LT8 Single/Dual 8MHz, 35V/µs Rail-to-Rail I/O Op Amps Low Distortion 9dBc at 5MHz LT82 Single 3mA, MHz, 75V/µs Op Amp Single Version of LT83/LT8; 5µA Shutdown Option LT85/LT86/LT87 Single/Dual/Quad 22MHz, 5V/µs Op Amps 6.5mA Supply Current, 6nV/ Hz Input Noise C-Load is a trademark of Linear Technology Corporation. 6 Linear Technology Corporation 63 McCarthy Blvd., Milpitas, CA (8) 32-9 FAX: (8) LT/TP 53 K REV A PRINTED IN THE SA LINEAR TECHNOLOGY CORPORATION 2