TYPICAL APPLICATIO. LT1027 Precision 5V Reference FEATURES DESCRIPTIO APPLICATIO S

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1 Precision 5V Reference FEATRES Very Low Drift: 2ppm/ C Max TC Pin Compatible with LT121-5, REF-2, (PDIP Package) Output Sources 15mA, Sinks 1mA Excellent Transient Response Suitable for A-to-D Reference Inputs Noise Reduction Pin Excellent Long Term Stability Less Than 1ppm P-P Noise (.1Hz to 1Hz) APPLICATIO S A-to-D and D-to-A Converters Digital Voltmeters Reference Standard Precision Current Source DESCRIPTIO The LT 12 is a precision reference with extra-low drift, superior accuracy, excellent line and load regulation and low output impedance at high frequency. This device is intended for use in 12- to 16-bit A-to-D and D-to-A systems where demanding accuracy requirements must be met without the use of power hungry, heated substrate references. The fast settling output recovers quickly from load transients such as those presented by A-to-D converter reference inputs. The brings together both outstanding accuracy and temperature coefficient specifications. The reference is based on LTC s proprietary advanced subsurface Zener bipolar process which eliminates noise and stability problems associated with surface breakdown devices., LTC and LT are registered trademarks of Linear Technology Corporation. TYPICAL APPLICATIO Supplying V REF and V CC to the LTC bit ADC Output Voltage 2.2µF V TO 4V V OT V TRIM ANALOG INPTS 1k 22µF CH CH1 CH2 CH3 CH4 CH5 CH6 CH COM REF REF V CC LTC129 S CLK A CLK D OT D IN CS A V D 12 TA1 TO µc OTPT VOLTAGE (V) TEMPERATRE ( C) 12 TA2 1

2 ABSOLTE AXI RATI GS W W W Supply Voltage ( )... 4V Input-Output Voltage Differential... 35V Output to Ground Voltage... V V TRIM to Ground Voltage Positive... 5V Negative....3V Output Short-Circuit Duration > 2V... 1 sec 2V... Indefinite (Note 1) Operating Temperature Range C... C to C M (OBSOLETE) C to 125 C Storage Temperature Range All Devices C to 15 C Lead Temperature (Soldering, 1 sec)... 3 C PACKAGE/ORDER I FOR W ATIO 2 1 TOP VIEW V OT NR 3 5 V TRIM 4 H PACKAGE -LEAD TO-5 METAL CAN T JMAX = 15 C, θ JA = 15 C/W, θ JC = 45 C/W 6 NR TOP VIEW N PACKAGE -LEAD PDIP T JMAX = C, θ JA = 13 C/W VOT V TRIM NR 1 2 V TRIM 3 V OT 4 TOP VIEW 6 5 S PACKAGE -LEAD PLASTIC SO T JMAX = C, θ JA = 1 C/W SYMBOL PARAMETER CONDITIONS MIN TYP MAX NITS V OT Output Voltage (Note 2) A V B, C, D E TCV OT Output Voltage Temperature Coefficient A, B 1 2 ppm/ C (Note 3) C 2 3 D 2 5 E ORDER PART NMBER ORDER PART NMBER ORDER PART NMBER ACH-5 BCH-5 CCH-5 DCH-5 ECH-5 OBSOLETE PACKAGE Consider the N or S Packages for Alternate Source BCN-5 CCN-5 DCN-5 ECN-5 CCS-5 DCS-5 ECS-5 S PART MARKING 12C5 12D5 12E5 *Connected internally. Do not connect external circuitry to these pins. Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The denotes specifications which apply over the full operating temperature range otherwise specifications are at T A = 25 C. = 1V, I LOAD =, unless otherwise specified.

3 ELECTRICAL CHARACTERISTICS The denotes specifications which apply over the full operating temperature range otherwise specifications are at T A = 25 C. = 1V, I LOAD =, unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN TYP MAX NITS Line Regulation (Note 4) V 1V 6 12 ppm/v 25 ppm/v 1V 4V 3 6 ppm/v ppm/v Load Regulation (Notes 4, 6) Sourcing Current 3 6 ppm/ma I OT 15mA 1 ppm/ma Sinking Current 3 12 ppm/ma I OT 1mA Supply Current ma 3.5 ma V TRIM Adjust Range ±3 ±5 mv e n Output Noise (Note 5).1Hz f 1Hz 3 µv P-P 1Hz f 1kHz µv RMS Temperature Hysteresis H package; T = 25 C 1 ppm Long Term Stability H package 2 ppm/month Note 1: Absolute Maximum Ratings are those values beyond which the life of the part may be impaired. Note 2: Output voltage is measured immediately after turn-on. Changes due to chip warm-up are typically less than.5%. Note 3: Temperature coefficient is determined by the "box" method in which the maximum V OT over the temperature range is divided by T. Note 4: Line and load regulation measurements are done on a pulse basis. Output voltage changes due to die temperature change must be taken into account separately. Package thermal resistance is 15 C/W for TO-5 (H), 13 C/W for PDIP (N), and 1 C/W for plastic SO (SO-). Note 5: RMS noise is measured with an -pole bandpass filter with a center frequency of 3Hz and a Q of 1.5. The filter output is then rectified and integrated for a fixed time period, resulting in an average, as opposed to RMS voltage. A correction factor is used to convert average to RMS. This value is then used to obtain RMS noise voltage in the 1Hz to Hz frequency band. This test also screens for low frequency "popcorn" noise within the bandwidth of the filter. Consult factory for %.1Hz to 1Hz noise testing. Note 6: Devices typically exhibit a slight negative DC output impedance of.15ω. This compensates for PC trace resistance, improving regulation at the load. TYPICAL PERFOR A W CE CHARACTERISTICS REJECTION (db) Ripple Rejection = 1V k 1k FREQENCY (Hz) 12 G1 OTPT IMPEDANCE (Ω) Output Impedance vs Frequency I = ±3mA AC I SORCE = 5mA 1 1k 1k k 1M FREQENCY (Hz) 12 G2 OTPT VOLTAGE (V) Output Voltage TEMPERATRE ( C) 12 G3 3

TYPICAL PERFOR A W Start-p and Turn-Off (No Load) CE CHARACTERISTICS Start-p and

V OT 1V/DIV 1V 1µs/DIV 12 G4 V OT 1V/DIV 1V RL = 1k, C L = 4.

.5 5 1 15 2 25 3 35 4 INPT VOLTAGE (V) 12 G6 CHANGE IN OTPT VOLTAGE (µv) Load

OTPT VOLTAGE (µv) 5 4 3 2 2 3 4 Line Regulation 5 12 16 2 24 2 32 36 4 INPT VOLTAGE

= 6 C NR = 1µF 4 2 1 1k 1k FREQENCY (Hz) 12 G9 Output Settling Time (Sourcing)

4 TYPICAL PERFOR A W Start-p and Turn-Off (No Load) CE CHARACTERISTICS Start-p and Turn-Off 2.5 Quiescent Current 2. V OT 1V/DIV 1V 1µs/DIV 12 G4 V OT 1V/DIV 1V RL = 1k, C L = 4.µF 5µs/DIV 12 G5 SPPLY CRRENT (ma) INPT VOLTAGE (V) 12 G6 CHANGE IN OTPT VOLTAGE (µv) Load Regulation Sink Source I OT (ma) 12 G CHANGE IN OTPT VOLTAGE (µv) Line Regulation INPT VOLTAGE (V) 12 G OTPT NOISE DENSITY (nv/ Hz) Output Noise Voltage Density C NR = 6 C NR = 1µF k 1k FREQENCY (Hz) 12 G9 Output Settling Time (Sourcing) Output Settling Time (Sinking).1Hz to 1Hz Output Noise Filtering = 1 zero at.1hz 2 poles at 1Hz V OT 4µV/DIV AC COPLED V OT 4µV/DIV AC COPLED 5µV/DIV 1mA LOAD STEP 2µs/DIV 12 G1 1mA LOAD STEP 2µs/DIV 12 G11 1sec/DIV 12 G12 4

5 APPLICATI O S I FOR W ATIO Effect of Reference Drift on System Accuracy A large portion of the temperature drift error budget in many systems is the system reference voltage. Figure 1 indicates the maximum temperature coefficient allowable if the reference is to contribute no more than.5lsb error to the overall system performance. The example shown is a 12-bit system designed to operate over a temperature range from 25 C to 65 C. Assuming the system calibration is performed at 25 C, the temperature span is 4 C. It can be seen from the graph that the temperature coefficient of the reference must be no worse than 3ppm/ C if it is to contribute less than.5lsb error. For this reason, the has been optimized for low drift. MAXIMM TEMPERATRE COEFFICIENT FOR.5LSB ERROR (ppm/ C) BIT 12-BIT 1-BIT -BIT TEMPERATRE SPAN ( C) 12 AI1 Figure 1. Maximum Allowable Reference Drift Trimming Output Voltage The has an adjustment pin for trimming output voltage. The impedance of the V ADJ pin is about 2kΩ with an open-circuit voltage of 2.5V. A ±3mV guaranteed trim range is achievable by tying the V ADJ pin to the wiper of a 1k potentiometer connecting between the output and ground. Trimming output voltage does not affect the TC of the device. Noise Reduction The positive input of the internal scaling amplifier is brought out as the Noise Reduction (NR) pin. Connecting a 1µF Mylar capacitor between this pin and ground will reduce the wideband noise of the from 2.µV RMS to approximately 1.2µV RMS in a 1Hz to 1kHz bandwidth. Transient response is not affected by this capacitor. Startup settling time will increase to several milliseconds due to the kω impedance looking into the NR pin. The capacitor must be a low leakage type. Electrolytics are not suitable for this application. Just na leakage current will result in a 15ppm error in output voltage. This pin is the most sensitive pin on the device. For maximum protection a guard ring is recommended. The ring should be driven from a resistive divider from V OT set to 4.4V (the open-circuit voltage on the NR pin). Transient Response The has been optimized for transient response. Settling time is under 2µs when an AC-coupled 1mA load transient is applied to the output. The achieves fast settling by using a class B NPN/PNP output stage. When sinking current, the device may oscillate with capacitive loads greater than pf. The is stable with all capacitive loads when at no DC load or when sourcing current, although for best settling time either no output bypass capactor or a 4.µF tantalum unit is recommended. An.1µF ceramic output capacitor will maximize output ringing and is not recommended. Kelvin Connections Although the does not have true force-sense capability, proper hook-up can improve line loss and ground loop problems significantly. Since the ground pin of the carries only 2mA, it can be used as a lowside sense line, greatly reducing ground loop problems on the low side of the reference. The V OT pin should be close to the load or connected via a heavy trace as the resistance of this trace directly affects load regulation. It is important to remember that a 1.22mV drop due to trace resistance is equivalent to a 1LSB error in a 5V FS, 12-bit system. The circuits in Figures 2 and 3 illustrate proper hook-up to minimize errors due to ground loops and line losses. Losses in the output lead can be further reduced by adding a PNP boost transistor if load current is 5mA or higher. R2 can be added to further reduce current in the output sense load. 5

6 APPLICATI O S I FOR W ATIO INPT INPT IN OT KEEP THIS LINE RESISTANCE LOW IN R1 91Ω 2N443 LOAD OT GROND RETRN 12 F2 R2* 2.4k 4.µF LOAD Figure 2. Standard Hook-p GROND RETRN 12 F3 *OPTIONAL REDCES CRRENT IN OTPT SENSE LEAD Figure 3. Driving Higher Load Currents TYPICAL APPLICATIONS 1V Reference 1V Reference IN OT V TRIM 5k LT19 5k* 1.V OTPT OT 1µF 1µF V OT LTC k* 16 1 *.1% METAL FILM 12 TA3.1µF 12 TA4 Operating 5V Reference from 5V Supply CMOS LOGIC GATE** 1N914 5V LOGIC SPPLY 1N914.5V f IN 2kHz* IN OT C1 5µF* C2 5µF* 5V REFERENCE *FOR HIGHER FREQENCIES C1 AND C2 MAY BE DECREASED **PARALLEL GATES FOR HIGHER REFERENCE CRRENT LOADING 12 TA5 6

7 EQIVALE T SCHE ATIC W V OT NR V ADJ 12 ES OTPT CRRENT LIMIT AND BIAS CIRCITS NOT SHOWN PACKAGE DESCRIPTIO H Package -Lead TO-5 Metal Can (.23 Inch PCD) (Reference LTC DWG # ) SEATING PLANE.1.45* ( ) ( ) DIA (.4.59).4 (1.16) MAX.5 (1.2) MAX ( ).16.21** ( ) GAGE PLANE.5.5 ( ) REFERENCE PLANE 45 TYP.2.34 (.11.64).2.45 ( ) PIN 1.23 (5.42) TYP ( ) INSLATING STANDOFF * LEAD DIAMETER IS NCONTROLLED BETWEEN THE REFERENCE PLANE AND.45" BELOW THE REFERENCE PLANE ** FOR SOLDER DIP LEAD FINISH, LEAD DIAMETER IS (.46.61) OBSOLETE PACKAGE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. H (TO-5).23 PCD 119

8 PACKAGE DESCRIPTIO ( ) N Package -Lead PDIP (Narrow.3 Inch) (Reference LTC DWG # ) ( ).13 ±.5 (3.32 ±.12).4* (1.16) MAX ( ) ( ).65 (1.651) TYP. (2.54) BSC *THESE DIMENSIONS DO NOT INCLDE MOLD FLASH OR PROTRSIONS. MOLD FLASH OR PROTRSIONS SHALL NOT EXCEED.1 INCH (.254mm).255 ±.15* (6.4 ±.31).125 (3.15) MIN.2 (.5) ±.3 (.45 ±.6) MIN N ( ).1.2 (.254.5) 45 TYP S Package -Lead Plastic Small Outline (Narrow.15 Inch) (Reference LTC DWG # ) ( ).4.1 ( ).19.19* ( ) ( ) ( ) TYP * DIMENSION DOES NOT INCLDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED.6" (.152mm) PER SIDE ** DIMENSION DOES NOT INCLDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED.1" (.254mm) PER SIDE.5 (1.2) BSC ( ) ** ( ) SO 129 RELATED PARTS PART NMBER DESCRIPTION COMMENTS LT119 Precision Series Bandgap Reference,.5%, 5ppm/ C Drift 2.5V, 4.5V, 5V, 1V Outputs; Industrial, Military Grades Available LT121 Precision Buried Zener Diode Reference, 5V, V, 1V Outputs; -Pin PDIP, SO, TO-5 Packages;.5%, 5ppm/ C Drift Military Grades Available LT1236 Precision Series Reference,.5%, 5ppm/ C Drift 5V, 1V Outputs; -Pin PDIP, SO Packages; Industrial Grade Available LT146 Micropower Precision Series Bandgap Reference, 2.5V, 5V, 1V Outputs; -Pin PDIP, SO, MSOP;.5%, 1ppm/ C Drift TO-92 and SOT-23 Packages LT1461 Low Dropout 3ppm/ C Drift,.4% Series Reference 2.5V, SO- Package LT19 Low Dropout, Micropower Reference 2.5V, 3V, 4.96V, 5V, Adjustable in SO- Linear Technology Corporation 163 McCarthy Blvd., Milpitas, CA (4) FAX: (4) LT/CPI K REV C PRINTED IN SA LINEAR TECHNOLOGY CORPORATION 1992

TYPICAL APPLICATIO. LT MHz, 250V/µs, A V 4 Operational Amplifier DESCRIPTIO FEATURES APPLICATIO S

TYPICAL APPLICATIO. LT MHz, 250V/µs, A V 4 Operational Amplifier DESCRIPTIO FEATURES APPLICATIO S 5MHz, 5V/µs, A V Operational Amplifier FEATRES Gain-Bandwidth: 5MHz Gain of Stable Slew Rate: 5V/µs Input Noise Voltage: nv/ Hz C-Load TM Op Amp Drives Capacitive Loads Maximum Input Offset Voltage: µv