DESCRIPTIO FEATURES TYPICAL APPLICATIO. LTC1550L/LTC1551L Low Noise, Switched Capacitor Regulated Voltage Inverters APPLICATIO S

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1 FEATRES Regulated Negative Voltage from a Single Positive Supply Low Output Ripple: Less Than mv P-P Typ High Charge Pump Frequency: 9kHz Small Charge Pump Capacitors:.µF Requires Only Four External Capacitors Fixed.V,.V, V or Adjustable Output Shutdown Mode Drops Supply Current to <µa High Output Current: p to ma (Depending on V CC to V OT Range) Output Regulation:.% Over Line, Load and Temperature Available in -Lead MSOP, -Lead Narrow SO and -Lead Narrow SSOP APPLICATIO S GaAs FET Bias Generators Negative Supply Generators Battery-Powered Systems Single Supply Applications, LTC and LT are registered trademarks of Linear Technology Corporation. TYPICAL APPLICATIO DESCRIPTIO LTCL/LTCL Low Noise, Switched Capacitor Regulated Voltage Inverters The LTC L/LTCL are switched capacitor charge pump voltage inverters which include internal linear postregulators to minimize output ripple. The LTCL fixed output voltage versions include.v,.v and V with ripple voltages typically below mv P-P. The LTCL is also available in an adjustable output voltage version. The LTCL/LTCL are ideal for use as bias voltage generators for GaAs transmitter FETs in portable RF and cellular telephone applications. The LTCL/LTCL operate from single.v to.v supplies and draw typical quiescent currents of 3.mA with a V supply. Each device includes a TTL compatible Shutdown pin which drops supply current to.µa typically. The LTCL Shutdown pin is active low (SHDN), while the LTCL Shutdown pin is active high (SHDN). Only four external components are required: an input bypass capacitor, two.µf charge pump capacitors and a filter capacitor at the linear regulator output. The adjustable LTCL/LTCL require two additional resistors to set the output voltage. The LTCL/LTCL will supply up to ma (depending on V CC to V OT range), while maintaining guaranteed output regulation of ±.%. Both fixed voltage and adjustable LTCL/LTCL are available in -lead MSOP and SO plastic packages: the adjustable LTCL is also available in a -pin SSOP with the REG pin. V OT Output Noise and Ripple 3.V SHDN REG V CC CP OT.µF LTCL- C IN 3 C GND V OT C R k POWER VALID C CP.µF V OT AC COPLED mv/div C.µF C OT µf V OT = V I LOAD = ma C L.µF Figure. V Generator with mv P-P Noise L/L TA µs/div L/L TAa

2 LTCL/LTCL ABSOLTE MAXIMM RATINGS W W W Supply Voltage....V Output Voltage....3V to (V CC.V) Total Voltage, V CC to CP OT....V Input Voltage (SHDN Pin)....3V to (V CC.3V) Input Voltage (REG Pin)....3V to V Output Short-Circuit Duration... 3 sec PACKAGE/ORDER INFORMATION W (Note ) Commercial Temperature Range... C to C Extended Commercial Operating Temperature Range (Note 3)... C to C Industrial Temperature Range... C to C Storage Temperature Range... C to C Lead Temperature (Soldering, sec)... 3 C SHDN* V CC C V OT 3 *SHDN FOR LTCL, SHDN FOR LTCL *FOR ADJSTABLE VERSION T JMAX = C, θ JA = C/W ORDER PART NMBER LTCLCMS LTCLCMS- LTCLCMS-. LTCLCMS-. MS PART MARKING LTEG LTGR LTFV LTEH TOP VIEW MS PACKAGE -LEAD PLASTIC MSOP REG (ADJ*) CP OT GND C LTCLCMS LTCLCMS-. LTFQ LTFT SHDN* V CC C 3 V OT TOP VIEW S PACKAGE -LEAD PLASTIC SO REG (ADJ*) CP OT GND C *SHDN FOR LTCL, SHDN FOR LTCL *FOR ADJSTABLE VERSION T JMAX = C, θ JA = 3 C/W ORDER PART NMBER LTCLCS LTCLCS- LTCLCS-. LTCLCS-. LTCLCS LTCLCS-. NC C NC 3 V OT C PGND AGND NC TOP VIEW GN PACKAGE -LEAD PLASTIC SSOP T JMAX = C, θ JA = C/W ORDER PART NMBER LTCLCGN LTCLIGN V CC SHDN REG 3 NC ADJ CP OT NC 9 NC GN PART MARKING L LI Consult factory for Military grade parts and additional voltage options. ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T A = C. V CC =.V to.v, C = C CP =.µf, C OT = µf, T A = C unless otherwise specified. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX NITS V CC Supply Voltage (Adjustable, Fixed V).. V (Fixed.V) 3.. V (Fixed.V).. V V REF Reference Voltage, ADJ = GND, V REF = V OT. V V REF Reference Voltage I OT = ma,.v V CC.V. mv/v (V CC V OT) Line Regulation I S Supply Current, V SHDN = V CC (LTCL) or GND (LTCL) 3. ma, V SHDN = GND (LTCL) or V CC (LTCL). µa

3 LTCL/LTCL ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T A = C. V CC =.V to.v, C = C CP =.µf, C OT = µf, T A = C unless otherwise specified. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX NITS f OSC Internal Oscillator Frequency 9 khz V OL REG Output Low Voltage I REG = ma,.. V I REG REG Sink Current V REG =.V, ma V IH SHDN Input High Voltage V V IL SHDN Input Low Voltage. V I IN SHDN Input Current V SHDN = V CC (All LTCL Versions). µa V SHDN = V CC (All LTCL Versions) µa t ON Turn-On Time, I OT = ma,.v V OT.V ms (LTCL/LTCL), I OT = ma, V OT =.V ms (LTCL/LTCL), I OT = ma, V OT = V ms (LTCL-), I OT = ma, V OT =.V ms (LTCL-.), I OT = ma, V OT =.V ms (LTCL-./LTCL-.) V OT Output Regulation.V V CC.V, I OT ma.3..3 V (LTCL/LTCL).V V CC.V, I OT ma.3..3 V 3.V V CC.V, I OT ma.3..3 V V OT Output Regulation.V V CC.V, I OT ma...9 V (LTCL/LTCL-/ 3.V V CC.V, I OT ma...9 V LTCL) 3.V V CC.V, I OT ma...9 V V OT Output Regulation 3.V V CC.V, I OT ma...3 V (LTCL/LTCL-./ 3.V V CC.V, I OT ma...3 V LTCL).V V CC.V, I OT ma...3 V V OT Output Regulation 3.V V CC.V, I OT ma V (LTCL/LTCL) 3.V V CC.V, I OT ma V.V V CC.V, I OT ma V V OT Output Regulation 3.9V V CC.V, I OT ma V (LTCL/LTCL).V V CC.V, I OT ma V.V V CC.V, I OT ma V V OT Output Regulation.V V CC.V, I OT ma V (LTCL/LTCL-.).V V CC.V, I OT ma V (LTCL/LTCL-.) V OT Output Regulation.V V CC.V, I OT ma.3..3 V (LTCL/LTCL)).V V CC.V, I OT ma.3..3 V I SC Output Short-Circuit Current V OT = V, V CC =.V ma V RIPPLE Output Ripple Voltage mv Note : Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note : All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to ground unless otherwise specified. All typicals are given at T A = C. Note 3: The LTCLC/LTCLC are guaranteed to meet specified performance from C to C and are designed, characterized and expected to meet these extended temperature limits, but are not tested at C and C. The LTCLI is guaranteed to meet the extended temperature limits. 3

4 LTCL/LTCL TYPICAL PERFORMANCE CHARACTERISTICS W OSCILLATOR FREQENCY (khz) 9 9 Oscillator Frequency vs Temperature V OT =.V 3 TEMPERATRE ( C) L/L G SPPLY CRRENT (ma) Supply Current vs Temperature V OT =.V. 3 TEMPERATRE ( C) L/L G POSITIVE SPPLY VOLTAGE (V) Minimum Required V CC vs V OT and I OT I OT = ma I OT = ma I OT = ma 3 OTPT VOLTAGE (V) L/L G3 Maximum Output Current vs Supply Voltage Start-p Time vs Supply Voltage Reference Voltage vs V CC V OT MAXIMM OTPT CRRENT (ma) 3 T A = C V OT = V V OT =.V V OT =.V SPPLY VOLTAGE (V) START-P TIME (ms)..... T A = C V OT = V R L = 39Ω V OT =.V R L = Ω SPPLY VOLTAGE (V) REFERENCE VOLTAGE (V)..3 T A = C V CC V OT (V) L/L G L/L G L/L G Startup Time (LTCL Shown) Load Transient Response (See Figure 3, ) Line Transient Response (See Figure 3, I L = ma) V SHDN V V V OT.V V POWER VALID V V V OT OT mv/div mv/div AC AC COPLED COPLED ma.v I V CC OT.V ma.ms/div / G ms/div / G ms/div / G9

5 LTCL/LTCL TYPICAL PERFORMANCE CHARACTERISTICS W NOISE (dbµv) Output Spectrum (*See Figure ) 9 3 k M M FREQENCY (Hz) L/L G NOISE (µv/ Hz).. Spot Noise (*See Figure ) Output Spectrum (See Figure 3) FREQENCY (khz) /L G NOISE (dbµv) 9 3 k I L = ma C IN =.µf C OT =.µf C L =.µf M FREQENCY (Hz) L/L G M NOISE (µv/ Hz).. Spot Noise (See Figure 3) I L = ma C IN =.µf C OT =.µf C L =.µf FREQENCY (khz) L/L G3 NOISE (dbµv) 9 3 Output Spectrum (See Figure 3) k I L = ma C IN.µF C OT = µf C L =.µf M FREQENCY (Hz) L/L G M NOISE (µv/ Hz).. Spot Noise (See Figure 3) I L = ma C IN =.µf C OT = µf C L =.µf FREQENCY (khz) L/L G * On first page of data sheet.

6 LTCL/LTCL PIN FNCTIONS SHDN: Shutdown (TTL Compatible). This pin is active low (SHDN) for the LTCL and active high (SHDN) for the LTCL. When this pin is at V CC (GND for LTCL), the LTCL operates normally. When SHDN is pulled low (SHDN pulled high for LTCL), the LTCL enters shutdown mode. In shutdown, the charge pump stops, the output collapses to V, and the quiescent current drops typically to.µa. The SHDN pin for the LTCL is a high impedance input and has no internal pull-up. The user must supply a resistor or current source pull-up to default the LTCL into normal operation. The SHDN pin for the LTCL has an internal µa typical pull-down that defaults the LTCL into normal operation. V CC : Power Supply. V CC requires an input voltage between.v and.v. Certain combinations of output voltage and output load current may place additional restrictions on the required input voltage. Consult the Electrical Characteristics table and Typical Performance Characteristics for guaranteed test points. The difference between the input voltage and output should not exceed.v or damage to the chip may occur. V CC must be bypassed directly to PGND (GND for -pin packages) with at least a.µf capacitor placed in close proximity to the chip. A µf or larger low ESR bypass capacitor is recommended to minimize noise and ripple at the output. A surface mount ceramic capacitor is recommended. C : C Positive Input. Connect a.µf capacitor between C and C. V OT : Negative Voltage Output. This pin must be bypassed with a.µf or larger capacitor to ensure regulator loop stability. LTC recommends at least µf to achieve the specified output ripple. The output capacitor should be a moderate ESR capacitor, and not a very low ESR capacitor, as the zero in the feedback loop (formed by the ESR and the output capacitor) provides phase lead to the linear regulator feedback loop. sing very low ESR output capacitors will result in the output oscillating. A low ESR.µF capacitor is recommended in parallel with the main output capacitor to minimize high frequency spikes at the output. The ground connection for the output capacitor should connect directly to the V CC and CP OT bypass capacitors, as well as to the GND of the LTCL/ LTCL. LTC recommends a separate trace for the V OT capacitor ground connection to minimize noise. C : C Negative Input. Connect a.µf capacitor from C to C. GND: Ground. Connect to a low impedance ground. A ground plane will help minimize regulation errors. CP OT : Negative Charge Pump Output. This pin requires a.µf storage capacitor to ground. In order to achieve ripple on the output voltage of less than mv, the ground connection for the CP OT capacitor must tie directly to the bottom of the V CC bypass capacitor and at the GND pin of the LTCL/LTCL. This minimizes the AC current path for the charge pump. REG: This is an open-drain output that pulls low when the output voltage is within % of the set value. It will sink ma to ground with a V supply. The external circuitry must provide a pull-up or REG will not swing high. The voltage at REG may exceed V CC and can be pulled up to V above ground without damage. For the LTCL adjustable voltage version, the REG pin is only available in the -lead GN package. ADJ (for adjustable versions): This is the feedback point for the external resistor divider string. Connect a divider string from GND to V OT with the divided tap connected to ADJ. Note that the resistor string needs to be connected upside-down from a negative regulator. See the Applications Information section for hook-up details. GN PACKAGE ONLY PGND: Power Ground. Connect to a low impedance ground. PGND should be connected to the same potential as AGND. AGND: Analog Ground. Connect to a low impedance ground. AGND should be connected to a ground plane to minimize regulation errors. NC: No Internal Connection.

7 BLOCK DIAGRAM W LTCL/LTCL C CP C OT V CC CPOT S S LINEAR REGLATOR V OT CLK 9kHz S C C C ** S3 CHARGE PMP ** ADJ *SHDN.V mv.v COMP REG *SHDN FOR LTCL, SHDN FOR LTCL ** FIXED OTPT VERSIONS ONLY L/L BD APPLICATIONS INFORMATION OVERVIEW W The LTCL/LTCL are switched capacitor, inverting charge pumps with internal linear post-regulators. The LTCL/LTCL provide a regulated, low ripple output at up to ma load current with the appropriate input voltage as output load current depends on the input/ output voltage combination. Consult the graph provided in the Typical Performance Characteristics section and the Electrical Characteristics table for guaranteed test points. The LTCL/LTCL are ideal for use as bias voltage generators for GaAs transmitter FETs in portable RF and cellular telephone applications. The LTCL features an active-low Shutdown pin (SHDN) that drops quiescent current to below µa. The LTCL is identical to the LTCL, except that the Shutdown pin is active-high (SHDN). All members of the LTCL/LTCL family feature a 9kHz charge pump frequency. The LTCL/ LTCL come standard with fixed.v,.v, V and adjustable output voltages. The LTCL/LTCL can be configured for other fixed output voltages; contact Linear Technology for more information.

8 LTCL/LTCL APPLICATIONS INFORMATION The LTCL/LTCL consist of two major blocks (see Block Diagram): an inverting charge pump and a negative linear regulator. The charge pump uses two external capacitors, C and C CP to generate a negative voltage at CP OT. It operates by charging and discharging C on alternate phases of the internal 9kHz clock. C is initially charged to V CC through switches S and S3. When the internal clock changes phase, S and S3 open and S and S close, shorting the positive side of C to ground. This forces the negative side of C below ground, and charge is transferred to C CP through S. As this cycle repeats, the magnitude of the negative voltage approaches V CC. The 9kHz internal clock frequency helps keep noise out of the khz to khz IF bands commonly used by portable radio frequency systems and reduces the size of the external capacitors required. Most applications can use standard.µf ceramic capacitors for C and C CP. Increasing C and C CP beyond.µf has little effect on the output ripple or the output current capacity of the LTCL/LTCL. The negative voltage at CP OT supplies the input to the negative regulator block. This block consists of an N-channel MOSFET pass device and a feedback amplifier that monitors the output voltage and compares it to the internal reference. The regulated output appears at the V OT pin. The regulation loop is optimized for fast transient response, enabling it to remove most of the switching artifacts present at the CP OT pin. Output ripple is typically below mv P-P with output loads between ma and ma. The output voltage is set by a pair of internal divider resistors for the fixed voltage versions. The N- channel pass device minimizes dropout, allowing the output to remain in regulation with supply voltages as low as.v for an output voltage of V. An output capacitor of at least.µf from V OT to ground is required to keep the regulator loop stable; for optimum stability and minimum output ripple, at least µf is recommended. Adjustable Hook-p For the adjustable LTCL/LTCL, the output voltage is set with a resistor divider from GND to V OT (Figure ). Note that the internal reference and the internal feedback amplifier are set up as a positive-output regulator referenced to the V OT pin, not as a negative regulator W PGND, AGND LTCL ADJ V OT Figure. External Resistor Connections referenced to ground. The output resistor divider must be set to provide.v at the ADJ pin with respect to V OT. For example, a 3V output would require a.k resistor from GND to ADJ, and a.k resistor to V OT. CAPACITOR SELECTION The LTCL/LTCL requires four external capacitors: an input bypass capacitor, two.µf charge pump capacitors and an output filter capacitor. The overall behavior of the LTCL/LTCL is strongly affected by how the capacitors are used, and by how the capacitors are laid out on the printed circuit board (PCB). In particular, the output capacitor s value and ESR have a significant effect on the output ripple and noise performance. In addition, the ground connections for the V CC bypass capacitor, the CP OT capacitor and the V OT bypass capacitor must employ star-ground techniques at the GND pin of the LTCL/LTCL. Proper capacitor selection is critical for optimum performance of the LTCL/ LTCL. Output Ripple vs Output Capacitor Figure shows the effect of using different output capacitor values on the LTCL/LTCL output ripple. These curves are taken using the LTCL circuit in Figure 3, with C IN =.µf and I LOAD = ma. The upper curve shows the performance with a standard tantalum capacitor alone and the lower curve shows that of the tantalum capacitor in parallel with a.µf ceramic capacitor. As a general rule, larger output capacitors provide lower output ripple. To keep output voltage ripple below mv P P, µf, or greater, in parallel with a.µf ceramic capacitor is required. To guarantee loop stability under all conditions, a minimum of.µf is required at the output. R R R R V OT =.V ( R ) L/L F

9 LTCL/LTCL APPLICATIONS INFORMATION W Figure shows a marked decrease in peak-to-peak output ripple when a.µf ceramic capacitor is added in parallel with the tantalum output capacitor. The additional ripple with the tantalum output capacitor alone is mostly very high order harmonics of the 9kHz clock, which appear as sharp "spikes" at the output. The energy in these spikes is very small and they do not contribute to the RMS output voltage, but their peak-to-peak amplitude can be several millivolts under some conditions. A.µF ceramic capacitor has significantly lower impedance at the spike frequency than a large tantalum capacitor, and eliminates most of these left-over switching spikes that the tantalum capacitor leaves behind. Figure and show scope photos of the output of Figure with and without the additional ceramic capacitor at the output. V CC SHDN V CC REG CP OT C IN LTCL.µF 3 C GND V OT C C.µF R k Figure 3. Output Ripple Test Circuit C OT µf C CP.µF V OT.V C L.µF L/L F3 A series RC or LC filter can reduce high frequency output noise even further. Due to the high 9kHz switching frequency, not much R or L is required; a ferrite bead or a relatively long PC board trace in series with.µf ceramic capacitor will usually keep the output ripple well below mv P-P. Figure shows an example of an ultralow noise V generator. The corresponding spectrum and spot noise plots for this circuit are shown in the Typical Performance Characteristics section. OTPT RIPPLE (mv P-P ) 3 WITHOT.µF WITH.µF T A = C C IN =.µf OTPT CAPACITANCE (µf) L/L F Figure. Output Ripple vs Output Capacitance V OT AC COPLE mv/div V OT AC COPLE mv/div µs/div L/L F Figure. Output Ripple with µf Tantalum Capacitor µs/div L/L F Figure. Output Ripple with µf Tantalum Capacitor Paralleled with.µf Ceramic Capacitor 9

10 LTCL/LTCL APPLICATIONS INFORMATION W Output Ripple vs Input Bypass Capacitor The input bypass capacitor (C IN ) can also have a fairly significant impact on the output ripple. C IN provides most of the LTCL/LTCL s supply current while it is charging the flying capacitor (C). Inadequate input bypassing can cause the V CC supply to dip when the charge pump switches, causing the output linear regulator to momentarily stop regulating. C IN should be mounted as close to the LTCL/LTCL V CC and GND pins as possible and its value should be significantly larger than C. Surface mount tantalum or ceramic capacitors with low ESR generally provide adequate performance. Figure shows the LTCL/LTCL peak-to-peak output ripple vs C IN, taken using the test circuit in Figure 3 with I LOAD set at ma. C OT is a µf in parallel with a.µf ceramic capacitor. A.µF surface mount ceramic capacitor at V CC generally provides adequate output ripple performance for most applications. OTPT RIPPLE (mv P-P ) 3 T A = C C OT = µf. INPT CAPACITANCE (µf) L/L F Figure. Output Ripple vs Input Bypass Capacitance TYPICAL APPLICATION.V Output GaAs FET Bias Generator.V V CC.V C IN.µF 3 SHDN V CC REG CP OT LTCL-. C GND V OT C C CP.µF.V BIAS C.µF C OT µf C L.µF GaAs TRANSMITTER L/L TA

11 LTCL/LTCL PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted. GN Package -Lead Plastic SSOP (Narrow.) (LTC DWG # --).9.9* (..9) (.9) REF.9. (..9)..** (3. 3.9) 3..9 (..9). ±. (.3 ±.) TYP.3. (.3.)..9 (..9).. (..) * DIMENSION DOES NOT INCLDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED." (.mm) PER SIDE ** DIMENSION DOES NOT INCLDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED." (.mm) PER SIDE.. (.3.3). (.3) BSC GN (SSOP) 9 MS Package -Lead Plastic MSOP (LTC DWG # --). (.). ±. (.3 ±.) TYP SEATING PLANE. ±. (. ±.). (.3) REF. (.) BSC.3 ±. (. ±.) * DIMENSION DOES NOT INCLDE MOLD FLASH, PROTRSIONS OR GATE BRRS. MOLD FLASH, PROTRSIONS OR GATE BRRS SHALL NOT EXCEED." (.mm) PER SIDE ** DIMENSION DOES NOT INCLDE INTERLEAD FLASH OR PROTRSIONS. INTERLEAD FLASH OR PROTRSIONS SHALL NOT EXCEED." (.mm) PER SIDE. ±. (. ±.). ±.* (3. ±.).93 ±. (.9 ±.) 3. ±.** (3. ±.) MSOP (MS) 9 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

12 LTCL/LTCL TYPICAL APPLICATION mv P-P Ripple, V Output GaAs FET Bias Generator SHDN REG.V V CC.V V CC CP OT C IN LTCL-.µF 3 C GND V OT C k REG C CP.µF V C.µF C OT µf C L.µF GaAs TRANSMITTER L/L TA3 PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted. S Package -Lead Plastic Small Outline (Narrow.) (LTC DWG # --).9.9* (..).. (.3.).. (..) TYP.3.9 (.3.).. (..).. (..)..9 (.3.3) TYP * DIMENSION DOES NOT INCLDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED." (.mm) PER SIDE ** DIMENSION DOES NOT INCLDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED." (.mm) PER SIDE. (.) BSC.. (.9.9) 3..** (3. 3.9) SO 9 RELATED PARTS PART NMBER DESCRIPTION COMMENTS LT Switched-Capacitor Voltage Converter with Regulator ma Switched-Capacitor Converter LTC Switched-Capacitor Regulated Voltage Inverter Selectable Fixed Output Voltages LTCL Switched-Capacitor Regulated Voltage Inverter Adjustable and Fixed Output Voltages, p to ma I OT, MSOP LTC9 Clock-Synchronized Switched-Capacitor Voltage Inverter Synchronizable p to MHz System Clock LTC/LTC Step-p/Step-Down Switched-Capacitor DC/DC Converters V IN V to V, Adjustable or Fixed V OT, I OT to ma LTC Micropower Regulated V Charge Pump DC/DC Converter I OT = ma (V IN V), I OT = ma (V IN 3V) LTC Micropower Regulated V Charge Pump DC/DC Converter I OT = ma (V IN.V), I OT = ma (V IN 3V) LTC/LTC Low Noise, Switched-Capacitor Regulated Voltage Inverters 9kHz Charge Pump, mv P-P Ripple LTC/LTC SIM Power Supply and Level Translator Step-p/Step-Down SIM Power Supply and Level Translators LT.MHz Inverting Mode Switching Regulator V at ma from a V Input, -Lead SOT-3 LT Inverting khz Switching Regulator with Low-Battery Detector V at ma from a V Input, MSOP LTC- Micropower, Regulated V Charge Pump with Shutdown in SOT-3 I CC = 3µA, I OT = ma (V IN 3V), I OT = ma (V IN.V) Linear Technology Corporation 3 McCarthy Blvd., Milpitas, CA 93- ()3-9 FAX: () 3- lf LT/TP 3 K PRINTED IN SA LINEAR TECHNOLOGY CORPORATION 99

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