FEATURES DESCRIPTIO APPLICATIO S. LTC /LTC High Efficiency, Low Noise, Inductorless Step-Down DC/DC Converter TYPICAL APPLICATIO

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1 High Efficiency, Low Noise, Inductorless Step-Down FEATRES.7V to.v Input Voltage Range No Inductors Li-Ion (3.6V) to.v with 8% Efficiency Low Noise Constant Frequency Operation Output Voltages:.V ±4%,.V ±4% Output Current: ma Shutdown Disconnects Load from Low Operating Current: I Q = 3µA Low Shutdown Current: I SD < µa Oscillator Frequency =.MHz Soft-Start Limits Inrush Current at Turn-On Short-Circuit and Overtemperature Protected Low Profile (mm) SOT-3 Package APPLICATIO S Handheld Computers Cellular Phones Digital Cameras Handheld Medical Instruments Low Power DSP Supplies TYPICAL APPLICATIO 3.V TO 4.V Li-Ion OFF ON C LTC3-. SHDN Li-Ion to.v Output with Shutdown C + GND 4.7µF =.V ± 4% ma 3 TAa DESCRIPTIO The LTC 3-./LTC3-. are charge pump stepdown DC/DC converters that produce a.v or.v regulated output from a.7v to.v input. The parts use switched capacitor fractional conversion to achieve typical efficiency two times higher than that of a linear regulator. No inductors are required. A unique constant frequency architecture provides a low noise regulated output as well as lower input noise than conventional charge pump regulators.* High frequency operation (f OSC =.MHz) simplifies filtering to further reduce conducted noise. The part also uses Burst Mode operation to improve efficiency at light loads. Low operating current (3µA with no load, <µa in shutdown) and low external parts count (three small ceramic capacitors) make the LTC3-./LTC3-. ideally suited for space constrained battery powered applications. The parts are short-circuit and overtemperature protected, and are available in a low profile (mm) 6-pin ThinSOT TM package., LTC and LT are registered trademarks of Linear Technology Corporation Burst Mode is a registered trademark of Linear Technology Corporation ThinSOT is a trademark of Linear Technology Corporation. *.S. Patent #6, 4, 3 EFFICIENCY (%) Efficiency vs Input Voltage (I OT = ma) LTC3-. LDO TAb

2 ABSOLTE AXI RATI GS (Note ) W W W to GND....3V to 6V SHDN to GND....3V to ( +.3V) I OT (Note )... 3mA Operating Ambient Temperature Range (Note 3)... 4 C to 8 C Storage Temperature Range... 6 C to C Lead Temperature (Soldering, sec)... 3 C W PACKAGE/ORDER I FOR ATIO GND SHDN 3 TOP VIEW 6 C + S6 PACKAGE 6-LEAD PLASTIC SOT-3 4 C T JMAX = C, θ JA = 3 C/W, θ JC = C/W ORDER PART NMBER LTC3ES6-. LTC3ES6-. S6 PART MARKING LTZE LTAGJ Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at., C FLY =, C IN =, C OT = 4.7µF unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX NITS LTC3-. Operating Voltage Range 3.. V LTC3-. Operating Voltage Range.7. V LTC3-. Output Voltage Range I OT ma 3.V.V V I OT ma 3.V.V V I OT ma 3.V V V LTC3-. Output Voltage Range I OT ma.7v < <.V... V I OT ma.9v V... V I IN Operating Current I OT = ma 3 6 µa Shutdown Current SHDN = V. µa V RB Burst Mode Operation Output Ripple mv P-P V RC Continuous Mode Output Ripple 4 mv P-P f OSC Switching Frequency...8 MHz V IH SHDN Input Hi Voltage..8 V V IL SHDN Input Low Voltage.8.4 V I IH SHDN Input Current SHDN = µa I IL SHDN Input Current SHDN = V µa t ON Turn On Time R LOAD = 6Ω.8 ms LTC3-. Load Regulation I OT ma. mv/ma LTC3-. Load Regulation I OT ma. mv/ma Line Regulation I OT = ma. %/V R OL Open-Loop Output Impedance I OT = ma (Note 4). Ω Note : Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note : Based on long term current density limitations. Note 3: The LTC3-.E/LTC3-.E are guaranteed to meet specified performance from C to 7 C. Specifications over the 4 C and 8 C operating temperature range are assured by design characterization and correlation with statistical process controls. Note 4: Output not in regulation; R OL = ( / - )/I OT. Note : This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability.

3 TYPICAL PERFOR A CE CHARACTERISTICS W LTC3-./LTC3-. I IN (µa) No Load Supply Current vs Supply Voltage 3.V < <.V (LTC3-.).7V < <.V (LTC3-.) T A = 8 C T A = 4 C FREQENCY (MHz) Oscillator Frequency vs Supply Voltage 3.V < <.V (LTC3-.).7V < <.V (LTC3-.) T A = 8 C T A = 4 C V SHDN (mv) V SHDN Threshold Voltage vs Supply Voltage 3.V < <.V (LTC3-.).7V < <.V (LTC3-.) T A = 4 C T A = 8 C G 3 G 3 G3 (LTC3-.) (V) Output Voltage vs Load Current I OT (ma) 3 EFFICIENCY (%) Efficiency vs Output Current 9 = 3.3V 8 7 = 4V 6 = V 4 3. I OT (ma) (V) Output Voltage vs Supply Voltage I OT = ma I OT = ma..48 I OT = ma G4 3 G 3 G6 (LTC3-.) (V) Output Voltage vs Load Current EFFICIENCY (%) Efficiency vs Output Current 9 =.7V 8 V 7 IN = 3V 6 = 3.V = 4.V 4 3 (V) Output Voltage vs Supply Voltage I OT = ma. I OT = ma..8 I OT = ma I OT (ma) 3. I OT (ma) G 3 G3 3 G4 3

SHDN LOW ma I OT ma mv/div mv/div AC R L =

Input Voltage Ripple vs Input Capacitor ) 4.

I = µf I OT = ma 3 G9 I OT = ma R SORCE =.

4 TYPICAL PERFOR A CE CHARACTERISTICS W Output Voltage Soft-Start and Shutdown (LTC3-.) Output Current Transient Response (LTC3-.) HI SHDN LOW ma I OT ma mv/div mv/div AC R L = 6Ω 3 G7 3 G8 Line Transient Response (LTC3-.) Input Voltage Ripple vs Input Capacitor (LTC3-.) 4.V 3.V mv/div AC C I = mv/div AC mv/div AC C I = µf I OT = ma 3 G9 I OT = ma R SORCE =.Ω 3 G Output Voltage Ripple (LTC3-.) mv/div AC C OT = 4.7µF XR6.3V I OT = ma 3 G 4

5 PI F CTIO S (Pin ): Input Supply Voltage. Bypass with a low ESR ceramic capacitor. GND (Pin ): Ground. Connect to a ground plane for best performance. SHDN (Pin 3): Active Low Shutdown Input. A low voltage on SHDN disables the LTC3-./LTC3-.. SHDN must not be allowed to float. C (Pin 4): Flying Capacitor Negative Terminal (Pin ): Regulated Output Voltage. is disconnected from during shutdown. Bypass with a 4.7µF low ESR ceramic capacitor (.µf min, ESR <mω). C + (Pin 6): Flying Capacitor Positive Terminal. BLOCK DIAGRA W SHDN 3 THERMAL SHTDOWN (>6 C) LTC3-./ LTC3-. SWITCH CONTROL AND SOFT-START.MHz OSCILLATOR CHARGE PMP 6 C + 4 C BRST DETECT CIRCIT + V REF GND 3 BD

6 OPERATIO (Refer to Simplified Block Diagram) The LTC3-./LTC3-. use a switched capacitor charge pump to step down to a regulated.v ±4% or.v ±4% (respectively) output voltage. Regulation is achieved by sensing the output voltage through an internal resistor divider and modulating the charge pump output current based on the error signal. A -phase nonoverlapping clock activates the charge pump switches. On the first phase of the clock current is transferred from, through the flying capacitor, to. Not only is current being delivered to on the first phase, but the flying capacitor is also being charged up. On the second phase of the clock the flying capacitor is connected from to ground, delivering the charge stored during the first phase of the clock to. sing this method of switching, only half of the output current is delivered from, thus achieving twice the efficiency over a conventional LDO. The sequence of charging and dis-charging the flying capacitor continues at a free running frequency of.mhz (typ). This constant frequency architecture provides a low noise regulated output as well as lower input noise than conventional switch-capacitor charge pump regulators. The part also has a low current Burst Mode operation to improve efficiency even at light loads. In shutdown mode all circuitry is turned off and the LTC3-./LTC3-. draw only leakage current from the supply. Furthermore, is disconnected from. The SHDN pin is a CMOS input with a threshold voltage of approximately.8v. The LTC3-./LTC3-. are in shutdown when a logic low is applied to the SHDN pin. Since the SHDN pin is a high impedance CMOS input it should never be allowed to float. To ensure that its state is defined it must always be driven with a valid logic level. Short-Circuit/Thermal Protection The LTC3-./LTC3-. have built-in short-circuit current limiting as well as overtemperature protection. During short-circuit conditions, the parts will automatically limit the output current to approximately ma. At higher temperatures, or if the input voltage is high enough to cause excessive self heating on chip, thermal shutdown circuitry will shut down the charge pump once the junction temperature exceeds approximately 6 C. It will reenable the charge pump once the junction temperature drops back to approximately C. The LTC3-./LTC3-. will cycle in and out of thermal shutdown without latchup or damage until the short-circuit on is removed. Long term overstress (I OT > 3mA, and/or T J > 4 C) should be avoided as it can degrade the performance of the part. Soft-Start To prevent excessive current flow at during start-up, the LTC3-./LTC3-. have a built-in soft-start circuitry. Soft-start is achieved by increasing the amount of current available to the output charge storage capacitor linearly over a period of approximately µs. Soft-start is enabled whenever the device is brought out of shutdown, and is disabled shortly after regulation is achieved. Low Current Burst Mode Operation To improve efficiency at low output currents, Burst Mode operation was included in the design of the LTC3-./ LTC3-.. An output current sense is used to detect when the required output current drops below an internally set threshold (3mA typ.). When this occurs, the part shuts down the internal oscillator and goes into a low current operating state. The LTC3-./LTC3-. will remain in the low current operating state until the output has dropped enough to require another burst of current. nlike traditional charge pumps whose burst current is dependant on many factors (i.e. supply voltage, switch resistance, capacitor selection, etc.), the LTC3-./LTC3-. s burst current is set by the burst threshold and hysteresis. This means that the ripple voltage in Burst Mode will be fixed and is typically mv for a 4.7µF output capacitor. Power Efficiency The power efficiency (η) of the LTC3-./LTC3-. are approximately double that of a conventional linear regulator. This occurs because the input current for a to step-down charge pump is approximately half the output 6

7 OPERATIO (Refer to Simplified Block Diagram) current. For an ideal to step-down charge pump the power efficiency is given by: POT VOT IOT V η = = PIN V VIN IOT OT The switching losses and quiescent current of the LTC3-./LTC3-. are designed to minimize efficiency loss over the entire output current range, causing only a couple % error from the theoritical efficiency. For example with, I OT = ma and regulating to.v the measured efficiency is 8.6% which is in close agreement with the theoretical 83.3% calculation. Capacitor Selection The ESR and value of capacitors used with the LTC3-./LTC3-. determine several important parameters such as regulator control loop stability, output ripple, and charge pump strength. The value of C OT directly controls the amount of output ripple for a given load current. Increasing the size of C OT will reduce the output ripple. To reduce output noise and ripple, it is suggested that a low ESR (<.Ω) ceramic capacitor (4.7µF or greater) be used for C OT. Tantalum and aluminum capacitors are not recommended because of their high ESR. Both ESR and value of the C OT can significantly affect the stability of the LTC3-./LTC3-.. As shown in the block diagram, the LTC3-./LTC3-. use a control loop to adjust the strength of the charge pump to match the current required at the output. The error signal of this loop is stored directly on the output charge storage capacitor. Thus the charge storage capacitor also serves to form the dominant pole for the control loop. To prevent ringing or instability it is important for the output capacitor to maintain at least.µf of capacitance over all conditions (see Ceramic Capacitor Selection Guidelines section). Likewise excessive ESR on the output capacitor will tend to degrade the loop stability of the LTC3-./LTC3-.. The closed-loop output resistance is designed to be IN.Ω for the LTC3-. and.ω for the LTC3-.. For a ma load current change the output voltage will change by about 37mV for the LTC3-. and by 3mV for the LTC 3-.. If the ESR of the output capacitor is greater than the closed-loop-output impedance the part will cease to roll-off in a simple one-pole fashion and poor load transient response or instability could result. Ceramic capacitors typically have exceptional ESR performance and combined with a tight board layout should yield excellent stability and load transient performance. Further output noise reduction can be achieved by filtering the LTC3-./LTC3-. output through a very small series inductor as shown in Figure. A nh inductor will LTC3-./ LTC3-. GND nh (TRACE INDCTANCE) 4.7µF.µF 3 F Figure. nh Inductor sed for Additional Output Noise Reduction reject the fast output transients, thereby presenting a nearly constant output voltage. For economy the nh inductor can be fabricated on the PC board with about cm (.4") of PC board trace. Capacitor Selection The constant frequency architecture used by the LTC3-./LTC3-. makes input noise filtering much less demanding than conventional charge pump regulators. On a cycle by cycle basis, the LTC3-./ LTC3-. input current will go from I OT / to ma. Lower ESR will reduce the voltage steps caused by changing input current, while the absolute capacitor value will determine the level of ripple. For optimal input noise and ripple reduction, it is recommended that a low ESR or greater ceramic capacitor be used for C IN (see Ceramic Capacitor Selection Guidelines section). Aluminum and tantalum capacitors are not recommended because of their high ESR. 7

8 OPERATIO (Refer to Simplified Block Diagram) Flying Capacitor Selection Warning: A polarized capacitor such as tantalum or aluminum should never be used for the flying capacitor since its voltage can reverse upon start-up of the LTC3-./LTC3-.. Ceramic capacitors should always be used for the flying capacitor. The flying capacitor controls the strength of the charge pump. In order to achieve the rated output current it is necessary for the flying capacitor to have at least.4µf of capacitance over operating temperature with a V bias (see Ceramic Capacitor Selection Guidelines section). If only ma or less of output current is required for the application the flying capacitor minimum can be reduced to.µf. Ceramic Capacitor Selection Guidelines Capacitors of different materials lose their capacitance with higher temperature and voltage at different rates. For example, a ceramic capacitor made of X7R material will retain most of its capacitance from 4 C to 8 C whereas a Z or YV style capacitor will lose considerable capacitance over that range (6% to 8% loss typ.). Z and YV capacitors may also have a very strong voltage coefficient causing them to lose an additional 6% or more of their capacitance when the rated voltage is applied. Therefore, when comparing different capacitors it is often more appropriate to compare the amount of achievable capacitance for a given case size rather than discussing the specified capacitance value. For example, over rated voltage and temperature conditions, a 4.7µF, V, YV ceramic capacitor in a 8 case may not provide any more capacitance than a, V, X7R available in the same 8 case. In fact over bias and temperature range, the, V, X7R will provide more capacitance than the 4.7µF, V, YV. The capacitor manufacturer s data sheet should be consulted to determine what value of capacitor is needed to ensure minimum capacitance values are met over operating temperature and bias voltage. Below is a list of ceramic capacitor manufacturers and how to contact them: AVX -(83) Kemet -(864) Murata -(8) Taiyo Yuden -(8) Vishay -(8) Layout Considerations Due to the high switching frequency and transient currents produced by the LTC3-./LTC3-. careful board layout is necessary for optimal performance. A true ground plane and short connections to all capacitors will improve performance and ensure proper regulation under all conditions. Figure shows the recommended layout configuration. GND SHDN LTC3-./LTC3-. VIA TO GROND PLANE Figure. Recommended Layout The flying capacitor pins, C + and C will have very high edge rate wave forms. The large dv/dt on these pins can couple energy capacitively to adjacent printed circuit board runs. Magnetic fields can also be generated if the flying capacitors are not close to the LTC3-./LTC3-. (i.e. the loop area is large). To decouple capacitive energy transfer, a Faraday shield may be used. This is a grounded PC trace between the sensitive node and the LTC3-./ LTC3-. pins. For a high quality AC ground it should be returned to a solid ground plane that extends all the way to the LTC3-./LTC µF 3 F 8

9 OPERATIO (Refer to Simplified Block Diagram) Thermal Management For higher input voltages and maximum output current there can be substantial power dissipation in the LTC3-./LTC3-.. If the junction temperature increases above approximately 6 C the thermal shutdown circuitry will automatically deactivate the output. To reduce the maximum junction temperature, a good thermal connection to the PC board is recommended. Connecting the GND pin (Pin ) to a ground plane, and maintaining a solid ground plane under the device can reduce the thermal resistance of the package and PC board considerably. Derating Power at Higher Temperatures To prevent an overtemperature condition in high power applications Figure 3 should be used to determine the maximum combination of ambient temperature and power dissipation. The power dissipated in the LTC3-./ LTC3-. should always fall under the line shown (i.e. within the safe region) for a given ambient temperature. The power dissipated in the LTC3-./LTC3-. is given by the expression: P D VIN = VOT I OT This derating curve assumes a maximum thermal resistance, θ JA, of 7 C/W for the 6-pin ThinSOT-3. This thermal resistances can be achieved from a printed circuit board layout with a solid ground plane (mm )on at least one layer with a good thermal connection to the ground pin of the LTC3-./LTC3-.. Operation outside of this curve will cause the junction temperature to exceed 4 C which may trigger the thermal shutdown circuitry and ultimately reduce the life of the device. POWER DISSIPATION (W) θ JA = 7 C/W T J = 4 C. 7 AMBIENT TEMPERATRE ( C) 3 F3 Figure 3. Maximum Power Dissipation vs Ambient Temperature 9

10 TYPICAL APPLICATIO S Fixed 3.3V Input to.v Output with Shutdown 4 6 C C + = 3.3V =.V ±4% LTC µF 3 OFF ON SHDN GND 3 TAa EFFICIENCY (%) Efficiency vs Output Current 9 = 3.3V I OT (ma) 3 TAb Li-Ion or 3-Cell NiMH to.v Output with Shutdown -CELL Li-Ion OR 3-CELL NiMH OFF ON 4 6 C C + LTC3-. 3 SHDN GND 4.7µF =.V ±4% 3 TA3a EFFICIENCY (%) Efficiency vs Output Current = 4V = V I OT (ma) 3 TA3b 3-Cell NiMH to.v Output with Shutdown 4 6 C C + =.7V TO V =.V ±4% 3-CELL NiMH LTC µF 3 OFF ON SHDN GND 3 TAa EFFICIENCY (%) Efficiency vs Input Voltage (I OT = ma) LTC3 LDO TAb

11 PACKAGE DESCRIPTIO S6 Package 6-Lead Plastic TSOT-3 (Reference LTC DWG # ).6 MAX.9 REF.9 BSC (NOTE 4). REF 3.8 MAX.6 REF.4 MIN.8 BSC..7 (NOTE 4) PIN ONE ID RECOMMENDED SOLDER PAD LAYOT PER IPC CALCLATOR.9 BSC PLCS (NOTE 3).8.9. BSC DATM A. MAX...3. REF.9..9 BSC (NOTE 3) S6 TSOT-3 3 NOTE:. DIMENSIONS ARE IN MILLIMETERS. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLSIVE OF PLATING 4. DIMENSIONS ARE EXCLSIVE OF MOLD FLASH AND METAL BRR. MOLD FLASH SHALL NOT EXCEED.4mm 6. JEDEC PACKAGE REFERENCE IS MO-93 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

12 TYPICAL APPLICATIO Multiple High Efficiency Outputs from Single Li-Ion Battery Li-Ion LTC3-3 SHDN C + GND C 6 4 V ma µf µf 7 OT MODE SW LTC344 8 SHDN SW 6k RT FB GND V C OT 8 LTC9-.8 SHDN C + C + 3 C C GND 6 3 µh 4 9 k 3pF µf 34k k µf 3.3V ma.8v ma OFF ON OT 3 SHDN C + 6 LTC3-. GND C 4 4.7µF.V ma 3-. TA4 RELATED PARTS PART NMBER DESCRIPTION COMMENTS LTC4 ma, 6kHz, Step p/down Charge Pump :.7V to V, : 3V/V, with Low Battery Comparator Regulated Output, I Q : 6µA, I SD : µa, S8 Package LTC ma, 6kHz, Step p/down Charge Pump :.7V to V, : 3.3V or V, with Power On Reset Regulated Output, I Q : 6µA, I SD : <µa, S8 Package LT776 ma (I OT ), khz, High Efficiency Step-Down 9% Efficiency, : 7.4V to 4V, (MIN) :.4V, I Q : 3.mA, I SD : 3µA, N8,S8 Packages LTC9-./LTC9-.8 ma,.mhz, High Efficiency Step-Down 7% Efficiency, :.7V to.v, :.V/.8V, Charge Pump Regulated Output, I Q : 8µA, I SD : µa, MS8 Package LTC3 ma, Spread Spectrum, High Efficiency p to 9% Efficiency, :.7V to.v, :.9V to.6v, Step-Down Charge Pump Regulated Output, I Q : 9µA, I SD : <µa, MS Package LTC3 Dual ma (I OT ), Spread Spectrum, Inductorless (CS), p to 9% Efficiency, :.7V to.v, :.9V to.6v, Step-Down I Q : 6µA, I SD : <µa, DFN Package LTC34/LTC34A 3mA (I OT ),.MHz, Synchronous Step-Down 9% Efficiency, :.7V to 6V, (MIN) :.8V, I Q : µa, I SD : <µa, ThinSOT Package LTC346/LTC346B 6mA (I OT ),.MHz, Synchronous Step-Down 9% Efficiency, :. to.v, (MIN) :.6V, I Q : µa, I SD : <µa, ThinSOT Package LTC34.A (I OT ), 4MHz, Synchronous Step-Down 9% Efficiency, :.V to.v, (MIN) :.8V, I Q : 6µA, I SD : <µa, MS Package LTC34.A (I OT ), 4MHz, Synchronous Step-Down 9% Efficiency, :.V to.v, (MIN) :.8V, I Q : 6µA, I SD : <µa, TSSOP6E Package LTC344 6mA (I OT ), MHz, Synchronous Buck-Boost 9% Efficiency, :.V to.v, :.V to.v, I Q : µa, I SD : <µa, MS Package LTC344.A (I OT ), MHz, Synchronous Buck-Boost 9% Efficiency, :.4V to.v, :.4V to.v, I Q : µa, I SD : <µa, DFN Package LT/TP 3 K REV A PRINTED IN SA Linear Technology Corporation 63 McCarthy Blvd., Milpitas, CA (48) 43-9 FAX: (48) LINEAR TECHNOLOGY CORPORATION

APPLICATIO S TYPICAL APPLICATIO. LTC3252 Dual, Low Noise, Inductorless Step-Down DC/DC Converter DESCRIPTIO FEATURES

APPLICATIO S TYPICAL APPLICATIO. LTC3252 Dual, Low Noise, Inductorless Step-Down DC/DC Converter DESCRIPTIO FEATURES FEATRES.V to.v Input Voltage Range No Inductors Typical Efficiency 0% Higher than LDOs Spread Spectrum Operation Low Input and Output Noise Shutdown Disconnects Load from V IN Dual Adjustable Independent