LT1342 5V RS232 Transceiver with 3V Logic Interface DESCRIPTIO
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1 V RS Transceiver with V Logic Interface FEATRES ESD Protection Over ±kv V Logic Interface ses Small Capacitors:.µF,.µF µa Supply Current in Shutdown Low Power Driver Disable Operating Mode Pin Compatible with LT7A kbaud Operation for R L = k, C L = pf kbaud Operation for R L = k, C L = pf CMOS Comparable Low Power: mw Operates from a V Supply and V Logic Supply Easy PC Layout: Flowthrough Architecture Rugged Bipolar Design Outputs Assume a High Impedance State When Off or Powered Down Absolutely No Latchup APPLICATI O S Notebook Computers Palmtop Computers DESCRIPTIO The LT is an advanced low power three-driver, fivereceiver RS transceiver. The LT operates from a V supply and a V logic supply. Receiver outputs can interface directly to V logic circuits. Included on the chip is a shutdown pin for reducing supply current to near zero. All receivers and drivers assume high impedance states during shutdown. The driver disable function provides additional control of operating mode. When driver disable is high the charge pump and drivers turn off. Receivers continue to operate during driver disable. New ESD structures on the chip allow the LT to survive multiple ±kv strikes, eliminating the need for costly TransZorbs on the RS line pins. The LT is fully compliant with all EIA RS specifications and operates in excess of kbaud even driving heavy capacitive loads., LTC and LT are registered trademarks of Linear Technology Corporation. TransZorb is a registered trademark of General Instruments, GSI. TYPICAL APPLICATI O Output Waveforms.µF.µF TO LINE V V CC DRIVER OT RX IN DRIVER OT RX IN RX IN RX IN DRIVER OT RX IN ON/OFF V V L 7 9 LT V DRIVER IN RX OT DRIVER IN RX OT RX OT RX OT DRIVER IN RX OT GND.µF DRIVER DISABLE NC LT TA TO V LOGIC.µF RECEIVER OTPT V L = V C L = pf DRIVER ROTPT R L = k C L = pf INPT LT TA
2 ABSOLTE AXI RATI GS W W W (Note ) Supply Voltage (V CC )... V Supply Voltage (V L )... V....V V....V Input Voltage Driver... V to Receiver... V to V Output Voltage Driver... V to V Receiver....V to V CC +.V Short-Circuit Duration... sec V... sec Driver Output... Indefinite Receiver Output... Indefinite Operating Temperature Range... C to 7 C Storage Temperature Range... C to C Lead Temperature (Soldering, sec)... C PACKAGE/ORDER I FOR TOP VIEW V V CC C + C DRIVER OT RX IN DRIVER OT 7 RX IN RX IN 9 RX IN DRIVER OT RX IN ON/OFF V V L G PACKAGE -LEAD PLASTIC SSOP V 7 C C + DRIVER IN RX OT DRIVER IN RX OT RX OT RX OT 9 DRIVER IN RX OT 7 GND DRIVER DISABLE NC NW PACKAGE -LEAD WIDE PDIP SW PACKAGE -LEAD WIDE PLASTIC SO T JMAX = C, θ JA = 9 C/ W (G) T JMAX = C, θ JA = C/ W (NW) T JMAX = C, θ JA = C/ W (SW) W ATIO ORDER PART NMBER LTCG LTCNW LTCSW Consult factory for Industrial and Military grade parts. ELECTRICAL CHARA CTERISTICS (Note ) PARAMETER CONDITIONS MIN TYP MAX NITS Power Supply Generator Output. V V Output 7 V Supply Current (V CC ) (Note ) 7 ma Logic Supply Current (V L ) (Note ). ma Supply Current When OFF (V CC ) Shutdown (Note ) µa Driver Disable ma Logic Supply Current (V L ) When OFF Shutdown (Note ) µa Driver Disable. ma Supply Rise Time C = C =.µf,. ms Shutdown to Turn-On C + = C =.µf ON/OFF Pin Thresholds Input Low Level (Device Shutdown).. V Input High Level (Device Enabled).. V ON/OFF Pin Current V V ON/OFF V µa DRIVER DISABLE Pin Thresholds Input Low Level (Drivers Enabled).. V Input High Level (Drivers Disabled).. V DRIVER DISABLE Pin Current V V DRIVER DISABLE V µa Oscillator Frequency khz
3 ELECTRICAL CHARA CTERISTICS (Note ) PARAMETER CONDITIONS MIN TYP MAX NITS Any Driver Output Voltage Swing Load = k to GND Positive 7. V Negative. V Logic Input Voltage Level Input Low Level (V OT = High).. V Input High Level (V OT = Low). V Logic Input Current.V V IN V µa Output Short-Circuit Current V OT = V ±9 7 ma Output Leakage Current Shutdown, V OT = ±V (Note ) µa Data Rate (Note ) R L = k, C L = pf kbaud R L = k, C L = pf kbaud Slew Rate R L = k, C L = pf V/µs R L = k, C L = pf V/µs Propagation Delay Output Transition t HL High to Low (Note ).. µs Output Transition t LH Low to High.. µs Any Receiver Input Voltage Thresholds Input Low Threshold (V OT = High).. V Input High Threshold (V OT = Low).7. V Hysteresis.. V Input Resistance 7 kω Output Leakage Current Shutdown (Note ) V OT V CC µa Receivers Through Output Voltage Output Low, I OT =.ma.. V Output High, I OT = µa.7.9 V Output Short-Circuit Current Sinking Current, V OT = V CC ma Sourcing Current, V OT = V ma Propagation Delay Output Transition t HL High to Low (Note 7) ns Output Transition t LH Low to High ns Receiver Output Voltage Output Low, I OT = µa.. V Output High, I OT = µa.7.9 V Output Short-Circuit Current Sinking Current, V OT = V CC ma Sourcing Current, V OT = V ma Propagation Delay Output Transition t HL High to Low (Note 7) µs Output Transition t LH Low to High µs The denotes specifications which apply over the full operating temperature range ( C T A 7 C for commercial grade). Note : Absolute Maximum Ratings are those values beyond which the life of the device may be impaired. Note : Testing done at V CC = V, V L =.V and V ON/OFF = V. Note : Supply current is measured with external capacitors C + = C =.µf, C = C =.µf. All outputs are open with all driver inputs tied high. Note : V L supply current is measured with all receiver outputs high. Note : Supply current and leakage measurements in shutdown are performed with V ON/OFF.V. Supply current measurements using driver disable are performed with V DRIVER DISABLE V. Note : For driver delay measurements, R L = k and C L = pf. Trigger points are set between the driver s input logic threshold and the output transition to the zero crossing (t HL =.V to V and t LH =.V to V). Note 7: For receiver delay measurements, C L = pf. Trigger points are set between the receiver s input logic threshold and the output transition to standard TTL/CMOS logic threshold (t HL =.V to.v and t LH =.7V to.v). Note : Data rate operation guaranteed by slew rate, short-circuit current and propagation delay tests.
4 TYPICAL PERFOR A W CE CHARA CTERISTICS DRIVER OTPT VOLTAGE (V) Driver Output Voltage R L = k OTPT HIGH V CC =.V V CC = V V CC =.V V CC =.V V CC = V V CC =.V OTPT LOW THRESHOLD VOLTAGE (V) Receiver Input Thresholds INPT HIGH INPT LOW SPPLY CRRENT (ma) 7 Supply Current vs Data Rate DRIVERS ACTIVE R L = k C L = pf DATA RATE (kbad) LT TPC LT TPC LT TPC Supply Current in Shutdown Supply Current in Driver Disable. Driver Disable Threshold SPPLY CRRENT (µa) 7 SPPLY CRRENT (ma) THRESHOLD VOLTAGE (V) LT TPC LT TPC LT TPC. ON/OFF Thresholds Supply Current Driver Leakage in Shutdown THRESHOLD VOLTAGE (V)..... ON THRESHOLD OFF THRESHOLD SPPLY CRRENT (ma) DRIVERS LOADED R L = k DRIVERS LOADED R L = k DRIVER LOADED R L = k NO LOAD LEAKAGE CRRENT (µa) V OT = V V OT = V LT TPC7 LT TPC LT TPC9
5 TYPICAL PERFOR A W CE CHARA CTERISTICS Driver Short-Circuit Current Receiver Short-Circuit Current SHORT-CIRCIT CRRENT (ma) I SC + I SC SHORT-CIRCIT CRRENT (ma) RX TO RX I SC + RX I SC RX I SC + RX TO RX I SC 7 7 LT TPC LT TPC Receiver Output Waveforms Driver Output Waveforms RX OTPT C L = pf DRIVER OTPT R L = k RX TO RX OTPT C L = pf DRIVER OTPT R L = k C L = pf INPT INPT V L = V LT TPC LT TPC PI F CTIO S V CC : V Input Supply Pin. This pin should be decoupled with a.µf ceramic capacitor close to the package pin. Insufficient supply bypassing can result in low output drive levels and erratic charge pump operation. V L : V Logic Supply Pin. Provides power to the receiver outputs. Decouple with a.µf ceramic capacitor. GND: Ground Pin. ON/OFF: A TTL/CMOS Compatible Operating Mode Control. A logic low puts the device in the low power shutdown mode. Drivers and receivers assume a high impedance state in shutdown. The transceiver consumes almost no supply current while in shutdown. A logic high fully enables the transceiver. An ON/OFF logic low signal supersedes the state of the DRIVER DISABLE pin. DRIVER DISABLE: This pin provides an alternate control for the charge pump and RS drivers. A logic high on this pin shuts down the charge pump and places all drivers in a high impedance state. All five receivers remain active under these conditions. Floating the DRIVER DISABLE pin or driving it to a logic low level fully enables the transceiver. A logic low on the ON/OFF pin supersedes the state of the DRIVER DISABLE pin. Supply current drops to ma when in driver disable mode. : Positive Supply Output (RS Drivers). V CC.V. This pin requires an external charge storage capacitor C.µF, tied to ground or V CC. With multiple transceivers, the and V pins may be paralleled into common charge storage capacitors. Larger value capacitors may be used to reduce supply ripple.
6 PI F CTIO S V : Negative Supply Output (RS Drivers). V (V CC.V). This pin requires an external charge storage capacitor C.µF. To reduce supply ripple, increase the size of the storage capacitor. C +, C, C +, C : Commutating Capacitor Inputs. These pins require two external capacitors C.µF: one from C + to C, and another from C + to C. The capacitor s effective series resistance should be less than Ω. For C µf, low ESR tantalum capacitors work well in this application, although small value ceramic capacitors may be used with a minimal reduction in charge pump compliance. For operation with an external V supply, omit C and connect the V supply to pin C +. Pin may also be shorted to C + when a separate supply is used. The V supply must be bypassed with a.f capacitor. DRIVER IN: RS Driver Input Pins. These inputs are compatible with TTL or CMOS logic. Tie unused inputs to V CC or V L. DRIVER OT: Driver Outputs at RS Voltage Levels. Driver output swing meets RS levels for loads up to k. Slew rates are controlled for lightly loaded lines. Output current capability is sufficient for load conditions up to pf. Outputs are in a high impedance state when in shutdown mode, V CC = V, or when the DRIVER DISABLE pin is active. Outputs are fully shortcircuit protected from V + V to V. Applying higher voltages will not damage the device if the overdrive is moderately current limited. Short circuits on one output can load the power supply generator and may disrupt the signal levels of the other outputs. The driver outputs are protected against ESD to ±V for human body model discharges. RX IN: Receiver Inputs. These pins accept RS level signals (±V) into a protected k terminating resistor. The receiver inputs are protected against ESD to ±kv for human body model discharges. Each receiver provides.v of hysteresis for noise immunity. Open receiver inputs assume a logic low state. RX OT: Receiver Outputs with.v Logic Compatible Voltage Levels. Outputs are in a high impedance state when in shutdown mode to allow data line sharing. Outputs are fully short-circuit protected to ground or V CC or V L with the power on, off, or in shutdown mode. Receiver output level is determined by V L supply voltage. se V L =.V for interfacing with.v logic, V L = V for interfacing with V logic. ESD PROTECTIO The RS line inputs of the LT have on-chip protection from ESD transients up to ±kv. The protection structures act to divert the static discharge safely to system ground. In order for the ESD protection to function effectively, the power supply and ground pins of the LT must be connected to ground through low impedances. The power supply decoupling capacitors and charge pump storage capacitors provide this low impedance in normal application of the circuit. The only constraint is that low ESR capacitors must be used for bypassing and charge storage. ESD testing must be done with pins V CC,, V and GND shorted to ground or connected with low ESR capacitors..µf RS LINE PINS PROTECTED TO ±kv V V CC.µF.µF DRIVER OT RX IN DRIVER OT RX IN RX IN RX IN DRIVER OT RX IN ON/OFF V V L 7 9 ESD Test Circuit LT V.µF.µF DRIVER IN RX OT DRIVER IN RX OT RX OT RX OT DRIVER IN RX OT GND DRIVER DISABLE NC LT ESD TC.µF
7 PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted. G Package -Lead Plastic SSOP (.9) (LTC DWG # --)..** (..)..7 (.7.99).97.7* (.7.) (..)..7 (..9). (.) BSC.. (..).. (..).. (7. 7.9) *DIMENSIONS DO NOT INCLDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED." (.mm) PER SIDE ** DIMENSIONS DO NOT INCLDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED." (.mm) PER SIDE 7 9 G SSOP 9 NW Package -Lead PDIP (Wide.) (LTC DWG # --).. (..7).9. (.9.) ( ). ±. (. ±.7). (.) MIN. (.7) MIN.. (.9.). ±. (. ±.).. (..). ±. (.7 ±.7).7 (.77) TYP..* (.7.).* (.97) MAX N 97 *THESE DIMENSIONS DO NOT INCLDE MOLD FLASH OR PROTRSIONS. MOLD FLASH OR PROTRSIONS SHALL NOT EXCEED. INCH (.mm) SW Package -Lead Plastic Small Outline (Wide.) (LTC DWG # --).9.99** ( ) (..77) (..).7. (.9.).97.7* (7.7.) TYP.9. (.9.) NOTE.. (..7). (.7) TYP..9 (..) TYP NOTE:. PIN IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANFACTRING OPTIONS. THE PART MAY BE SPPLIED WITH OR WITHOT ANY OF THE OPTIONS *DIMENSION DOES NOT INCLDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED." (.mm) PER SIDE ** DIMENSION DOES NOT INCLDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED." (.mm) PER SIDE NOTE.. (..) (.7.) S (WIDE) 99 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 7
8 TYPICAL APPLICATIO S Operation sing V and V Power Supplies V V V CC V CC LT 7.µF C +.µf.µf.µf C DRIVER IN DRIVER OT RX OT RX IN DRIVER IN 7 DRIVER OT RX OT TO LOGIC TO RX IN RX OT LINE 9 RX IN RX OT RX IN 9 DRIVER IN DRIVER OT RX OT RX IN 7 GND ON/FF = V DRIVER DISABLE V V L NC.µF V LT TA Typical Mouse Driving Application V MOSE LOGIC OPTICS V () () (9) DCD DSR RX RTS TX CTS DTR RI.µF V V CC.µF DRIVER OT RX IN DRIVER OT 7 RX IN RX IN 9 RX IN DRIVER OT RX IN ON/OFF V V L LT 7.µF.µF DRIVER IN LOGIC RX OT DRIVER IN LOGIC RX OT RX OT MOSE DATA RX OT 9 DRIVER IN LOGIC RX OT 7 GND DRIVER DISABLE NC DB9 LT TA RELATED PARTS PART NMBER DESCRIPTION COMMENTS LT7A -DR/-RX RS Transceiver ±kv IEC--- ESD Protection LTC7 -DR/-RX RS Transceiver.V Operation LT -DR/-RX RS V Logic Interface LT -DR/-RX RS/RS Transceiver V RS or V RS Operation LTC7 -DR/-RX Micropower RS Transceiver Receivers Active in Shutdown LTC -DR/-RX RS Transceiver True RS from V Linear Technology Corporation McCarthy Blvd., Milpitas, CA 9-77 ()-9 FAX: () -7 fa LT/TP 9 REV A K PRINTED IN SA LINEAR TECHNOLOGY CORPORATION 99
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LTC/LTC/LTC ltralow Power Quad Comparators with Reference FEATRES ltralow Quiescent Current:.µA Max Reference Output Drives.µF Capacitor Adjustable Hysteresis (LTC/LTC) Wide Supply Range Single: V to V
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LT5 Micropower Rail-to-Rail Op Amp and Reference FEATRES Guaranteed Operation at.v Op Amp and Reference on Single Chip Micropower: µa Supply Current Industrial Temperature Range SO- Packages Rail-to-Rail
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FEATRES Fully Compliant with the Intel RM 8. ID Specification Programs Regulator Output oltage from.0 to.8 in m Steps Programs an Entire Family of Linear Technology DC/DC Converters with 0.8 References
More informationDESCRIPTION FEATURES APPLICATIONS TYPICAL APPLICATION. January 1998
Final Electrical Specifications Single Cell High Current Micropower 00kHz Boost DC/DC Converter January 1998 FEATRES 5V at 1A from a Single Li-Ion Cell 3.3V at 300mA from a Single NiCd Cell Low Quiescent
More informationAPPLICATIO S. LT /LT1585A-1.5 Fixed 1.5V, 4.6A and 5A Low Dropout, Fast Response GTL+ Regulators DESCRIPTIO FEATURES TYPICAL APPLICATIO
FEATRES Fast Transient Response Guaranteed Dropout Voltage at Multiple Currents Load Regulation: 0.05% Typ Trimmed Current Limit On-Chip Thermal Limiting APPLICATIO S GTL+ Power Supply Low Voltage Logic
More informationDistributed by: www.jameco.com --3-44 The content and copyrights of the attached material are the property of its owner. MHz, 3nV/ Hz, A V Operational Amplifier FEATRES Gain-Bandwidth: MHz Gain of Stable
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Linear Phase, DC Accurate, Low Power, 0th Order Lowpass Filter FEATRES One External R Sets Cutoff Frequency Root Raised Cosine Response ma Supply Current with a Single Supply p to khz Cutoff on a Single
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FEATRES 3MHz Gain Bandwidth V/µs Slew Rate 5µA Supply Current Available in Tiny MSOP Package C-Load TM Op Amp Drives All Capacitive Loads nity-gain Stable Power Saving Shutdown Feature Maximum Input Offset
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FEATRES Maximum Offset Voltage of µv Maximum Offset Voltage Drift of nv/ C Noise:.µV P-P (.Hz to Hz Typ) Voltage Gain: db (Typ) PSRR: db (Typ) CMRR: db (Typ) Supply Current:.8mA (Typ) Supply Operation:.7V
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a FEATURES kbps Data Rate Specified at 3.3 V Meets EIA-3E Specifications. F Charge Pump Capacitors Low Power Shutdown (ADM3E and ADM35) DIP, SO, SOIC, SSOP and TSSOP Package Options Upgrade for MAX3/3
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FEATURES Fully Sequence Four Supplies Six with Minimal External Circuitry Cascadable for Additional Supplies Power Off in Reverse Order or Simultaneously Charge Pump Drives External MOSFETs Drives Power
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Precision 5V Reference FEATRES Very Low Drift: 2ppm/ C Max TC Pin Compatible with LT121-5, REF-2, (PDIP Package) Output Sources 15mA, Sinks 1mA Excellent Transient Response Suitable for A-to-D Reference
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Synchronous, Step-Down 8kHz PWM DC/DC Converter FEATRES Operates from Input Voltage As Low As 2V Internal.7A Synchronous Switches ses Ceramic Input and Output Capacitors 62mV Reference Voltage 8kHz Fixed
More informationDistributed by: www.jameco.com -8-8-22 The content and copyrights of the attached material are the property of its owner. FEATRES Input Bias Current, Warmed p: pa Max % Tested Low Voltage Noise: 8nV/ Hz
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FEATRES Fast Transient Response Guaranteed Dropout Voltage at Multiple Currents Load Regulation: 0.05% Typ Trimmed Current Limit On-Chip Thermal Limiting APPLICATIONS Intel Pentium Pro Processor GTL Supply
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LTC0- -Bit ID oltage Programmer for AMD Opteron CPs FEATRES Programs Regulator Output oltage Range from 0. to. in m Steps Programs a Wide Range of Linear Technology DC/DC Converters with a 0. Reference
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1.GHz to 2.GHz Receiver Front End FEATURES 1.V to 5.25V Supply Dual LNA Gain Setting: +13.5dB/ db at Double-Balanced Mixer Internal LO Buffer LNA Input Internally Matched Low Supply Current: 23mA Low Shutdown
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2mA, Low Noise, Low Dropout Negative Micropower Regulator in ThinSOT FEATRES Low Profile (1mm) ThinSOT TM Package Low Noise: 3µV RMS (1Hz to 1kHz) Low Quiescent Current: 3µA Low Dropout Voltage: 34mV Output
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FEATRES Regulated Negative Voltage from a Single Positive Supply Low Output Ripple: Less Than mv P-P Typ High Charge Pump Frequency: 9kHz Small Charge Pump Capacitors:.µF Requires Only Four External Capacitors
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Precision 3MHz to 7GHz RF Detector with Shutdown and Gain Adjustment FEATURES Temperature Compensated Internal Schottky Diode RF Detector Wide Input Frequency Range: 3MHz to 7GHz* Wide Input Power Range:
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Micropower Regulator and Comparator FEATRES Input Voltage Range:. to V µa Supply Current ma Output Current. Reference Voltage Reference Output Sources ma and Sinks.mA Dual Output Comparator Comparator
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-Bit Desktop VID Voltage Programmer FEATRES Programs Regulator Output Voltage Range from.v to.v in mv Steps and from.v to.v in mv Steps (VRM 8.) Programs a Wide Range of Linear Technology DC/DC Converters
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LTC553 Precision 3MHz to 7GHz RF Detector with Shutdown and Offset Adjustment FEATURES Temperature Compensated Internal Schottky Diode RF Detector Wide Input Frequency Range: 3MHz to 7GHz* Wide Input Power
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Micropower, Regulated Charge Pump DC/DC Converters FEATRES 5V Output Current: ma ( V).V Output Current: ma (.5V) ltralow Power: µa Quiescent Current Regulated Output Voltage:.V ±%, 5V ±%, ADJ No Inductors
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Switched-Capacitor Voltage Converter with Regulator FEATRES Available in Space Saving SO-8 Package Output Current: ma (LT54 5mA (LT54L Reference and Error Amplifier for Regulation Low Loss:.V at ma Operating
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LT4 MHz to GHz Power Detector with 6dB Dynamic Range FEATRES Frequency Range: MHz to GHz Linear Dynamic Range: 6dB Exceptional Accuracy over Temperature and Power Supply Fast Transient Response: 8ns Full-Scale
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FEATRES Single Supply Operation from V to.v Small (mm mm) MSOP -Lead Package Internal Resistors for a Gain of Two V/µs Slew Rate MHz db Bandwidth MHz Flat to.db % Settling Time: ns Input Common Mode Range
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FEATRES Differential or Single-Ended Gain Block Wide Supply Range V to.v Output Swings Rail-to-Rail Input Common Mode Range Includes Ground V/µs Slew Rate db Bandwidth = 7MHz, A V = ± CMRR at MHz: >db
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FEATRES DNL and INL Over Temperature: ±.LSB Max Gain Error: ±LSB Max Low Supply Current: µa Max -Quadrant Multiplication Power-On Reset Asynchronous Clear Input Daisy-Chain -Wire Serial Interface -Pin
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EVALUATION KIT AVAILABLE MAX325 General Description The MAX325 is a 3.V to 5.5V powered, ±5V isolated EIA/TIA-232 and V.28/V.24 communications interface with high data-rate capabilities. The MAX325 is
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FEATRES Gain of Stable MHz Gain Bandwidth V/µs Slew Rate V/mV DC Gain, R L = Ω mv Maximum Input ffset Voltage ±V Minimum utput Swing into Ω ide Supply Range: ±.V to ±V 7mA Supply Current 9ns Settling Time
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Low Noise, Regulated Charge Pump DC/DC Converters FEATRES Low Noise Constant Frequency Operation Output Current: 00mA Available in 8-Pin MSOP (LTC00) and Low Profile (mm) 6-Pin ThinSOT TM (LTC00-5) Packages
More informationDistributed by: www.jameco.com --- The content and copyrights of the attached material are the property of its owner. Precision, Rail-to-Rail, Zero-Drift, Resistor-Programmable Instrumentation Amplifier
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FEATURES 3µV Maximum Offset Voltage pa Maximum Input Bias Current 3µA Supply Current Rail-to-Rail Output Swing µa Supply Current in Shutdown db Minimum Voltage Gain (V S = ±V).µV/ C Maximum V OS Drift
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FEATRES 7µA Max Supply Current per Amplifier 7µV Max Offset Voltage 5pA Max Offset Current 5nA Max Input Bias Current.9µV P-P.Hz to Hz Voltage Noise.5pA P-P.Hz to Hz Current Noise.5µV/ C Offset Voltage
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FEATRES Clock-Tunable Cutoff Frequency mv DC Offset (Typical) db CMR (Typical) Internal or External Clock µv RMS Clock Feedthrough : Clock-to-Cutoff Frequency Ratio µv RMS Total Wideband Noise.% Noise
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FEATRES One External Resistor Sets the Frequency Fast Start-p Time:
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FEATRES Clock-Tunable Cutoff Frequency mv DC Offset (Typical) db CMRR (Typical) Internal or External Clock µv RMS Clock Feedthrough : Clock-to-Cutoff Frequency Ratio 9µV RMS Total Wideband Noise.% THD
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a FEATURES kb Transmission Rate ADM: Small (. F) Charge Pump Capacitors ADM3: No External Capacitors Required Single V Power Supply Meets EIA-3-E and V. Specifications Two Drivers and Two Receivers On-Board
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19-1949; Rev ; 1/1 ±15k ESD-Protected, 3. to 5.5, Low-Power, General Description The is a 3-powered EIA/TIA-232 and.28/.24 communications interface with low power requirements, high data-rate capabilities,
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LTC Very Low Noise Zero-Drift Bridge Amplifier FEATRES Very Low Noise:.µV P-P Typ,.Hz to Hz DC to Hz Noise Lower Than OP- Full Output Swing into k Load Offset Voltage: µv Max Offset Voltage Drift: nv/
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LTC/LTC-./LTC- Doubler Charge Pumps with Low Noise Linear Regulator FEATRES Low Output Noise: µv RMS (khz BW) Adjustable or Fixed Boosted Output Adjustable Output Voltage Range:.V to.v Fixed Output Voltages:.V,
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FEATURES Fully Sequence and Monitor Four Supplies Six with Minimal External Circuitry Cascadable for Additional Supplies Power Off in Reverse Order or Simultaneously Charge Pump Drives External MOSFETs
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SP385A 3V to 5V RS-3 Line Driver/Receiver Operates from 3.3V or 5V Power Supply Meets All EIA-3D and V.8 Specifications at 5V Meets EIA-56 Specifications at 3.3V Two Drivers and Receivers Operates with
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FEATURES Low Power: 45µA Fast: 6ns at 2mV Overdrive 85ns at 5mV Overdrive Low Offset Voltage:.8mV Operates Off Single or Dual ± Supplies Input Common Mode Extends to Negative Supply No Minimum Input Slew
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LT27 Dual 25mA/6MHz Current Feedback Amplifier FEATRES 25mA Minimum Output Drive Current 6MHz Bandwidth, A V = 2, R L = Ω 9V/µs Slew Rate, A V = 2, R L = 5Ω.2% Differential Gain, A V = 2, R L = 3Ω.7 Differential
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LT MHz Gain of Triple Video Buffer FEATRES MHz db Small Signal Bandwidth MHz db V P-P Large Signal Bandwidth MHz ±.db Bandwidth High Slew Rate: V/µs Fixed Gain of Requires No External Resistors 9dB Channel
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