Quad Supply Monitor with Adjustable Tolerance (5V, 3.3V, 2.5V, 1.8V) R3 10k POWER V1 COMP1 16 COMP2 COMP V REF RST 8.

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1 FEATURES Simultaneously Monitors Four Supplies User Selectable Combinations of V,.V, V,.V,.V,.V and/or ±Adjustable Voltage Thresholds Guaranteed Threshold Accuracy: ±.% of Monitored Voltage Over Temperature Selectable Supply Tolerance: %, 7.%, %,.% Below Monitored Voltage Low Supply Current: µa Typ Adjustable Reset Time RESET Disable Pin for Margining Applications Open-Drain Output (LTC9-) Push-Pull Output (LTC9-) Individual Nondelayed Monitor Outputs for Each Supply Power Supply Glitch Immunity Guaranteed RESET for V CC V APPLICATIO S U Desktop and Notebook Computers Multivoltage Systems Telecom Equipment Portable Battery-Powered Equipment TYPICAL APPLICATIO U DESCRIPTIO U LTC9 Programmable Quad Supply Monitor with Adjustable Reset Timer and Supply Tolerance The LTC 9 is a programmable supply monitor for systems with up to four supply voltages. One of preset or adjustable voltage monitor combinations can be selected using an external resistor divider connected to the program pin. The preset voltage thresholds are digitally programmable to %, 7.%, % or.% below the nominal operating voltage, and are accurate to.% over temperature. All four voltage comparator outputs are connected to separate pins for individual supply monitoring. The reset delay time is adjustable using an external capacitor. Tight voltage threshold accuracy and glitch immunity ensure reliable reset operation without false triggering. The output is guaranteed to be in the correct state for V CC down to V and may be disabled during supply margin testing. The LTC9- features an open-drain output, while the LTC9- has a push-pull output. The µa supply current makes the LTC9 ideal for power conscious systems and the part may be configured to monitor less than four inputs. The LTC9-/LTC9- are available in the -lead narrow SSOP package. Network Servers, LTC and LT are registered trademarks of Linear Technology Corporation. Quad Supply Monitor with Adjustable Tolerance (V,.V,.V,.V) V DC/DC CONVERTER.V.V.V SYSTEM LOGIC C.µF C.µF R 9k R.k R V V k POWER GOOD V COMP COMP COMP LTC9- COMP V REF RDIS MARGIN 7 T 9 TOLERANCE = % V PG T GND CRT t = ms CRT 7nF 9 TA

2 LTC9 ABSOLUTE AXI U RATI GS W W W (Notes,, ) V,, V, V, V PG....V to 7V (LTC9-)....V to 7V (LTC9-)....V to ( +.V) COMPX, RDIS....V to 7V T, T....V to (V CC +.V) CRT....V to (V CC +.V) V REF....V to (V CC +.V) Reference Load Current (I VREF )... ±ma V Input Current ( ADJ Mode)... ma Operating Temperature Range LTC9-C/LTC9-C... C to 7 C LTC9-I/LTC9-I... C to C Storage Temperature Range... C to C Lead Temperature (Soldering, sec)... C U U U W PACKAGE/ORDER I FOR ATIO COMP COMP V V CRT T RDIS 7 TOP VIEW COMP COMP V V REF V PG GND 9 T GN PACKAGE -LEAD PLASTIC SSOP T JMAX = C, θ JA = C/W ORDER PART NUMBER LTC9-CGN LTC9-CGN LTC9-IGN LTC9-IGN GN PART MARKING 9 9 9I 9I Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T A = C. V CC = V, unless otherwise noted. (Note ) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V RT V, % Reset Threshold V Input Threshold..7.7 V V, 7.% Reset Threshold.7.. V V, % Reset Threshold... V V,.% Reset Threshold...7 V V RT.V, % Reset Threshold V, Input Threshold... V.V, 7.% Reset Threshold.9.. V.V, % Reset Threshold V.V,.% Reset Threshold.79.. V V RT V, % Reset Threshold Input Threshold.7.. V V, 7.% Reset Threshold V V, % Reset Threshold...7 V V,.% Reset Threshold... V V RT.V, % Reset Threshold, V Input Threshold...7 V.V, 7.% Reset Threshold..7. V.V, % Reset Threshold.7.. V.V,.% Reset Threshold... V V RT.V, % Reset Threshold V, V Input Threshold...7 V.V, 7.% Reset Threshold... V.V, % Reset Threshold..9. V.V,.% Reset Threshold...7 V V RT.V, % Reset Threshold V, V Input Threshold... V.V, 7.% Reset Threshold... V.V, % Reset Threshold... V.V,.% Reset Threshold..9. V V RTA ADJ, % Reset Threshold V, V Input Threshold.9.. V ADJ, 7.% Reset Threshold V ADJ, % Reset Threshold..7. V ADJ,.% Reset Threshold...7 V

3 LTC9 ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T A = C. V CC = V, unless otherwise noted. (Note ) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V RTAN ADJ Reset Threshold V Input Threshold mv V CC Minimum Internal Operating Voltage, COMPX in Correct Logic State; V V CC Rising Prior to Program V CCMINP Minimum Required for Programming V CC Rising. V V CCMINC Minimum Required for Comparators V CC Falling. V V REF Reference Voltage V CC.V, I VREF = ±ma, C REF pf T Low, T Low.9.. V T Low, T High..7.9 V T High, T Low... V T High, T High.9.. V V PG Programming Voltage Range V CC V CCMINP V REF V I VPG V PG Input Current V PG = V REF ± na I V V Input Current V = V, I VREF = µa, (Note ) 7 µa I Input Current =.V. µa I V V Input Current V =.V.. µa V =.V (ADJ Mode) na I V V Input Current V =.V.. µa V =.V (ADJ Mode) na V =.V ( ADJ Mode) na I CRT(UP) CRT Pull-Up Current V CRT = V.. µa I CRT(DN) CRT Pull-Down Current V CRT =.V µa t Reset Time-Out Period C RT = pf 7 9 ms t UV V X Undervoltage Detect to or COMPX V X Less Than Reset Threshold V RTX µs by More Than V OL Output Voltage Low, COMPX I SINK =.ma; V = V, = V;.. V V, V = V; V PG = V I SINK = µa; = V; V, V, V = V.. V I SINK = µa; V = V;, V, V = V.. V V OH Output Voltage High, COMPX (Note ) I SOURCE = µa V V OH Output Voltage High (LTC9-) I SOURCE = µa. V (Note ) Digital Inputs T, T, RDIS V IL T, T Low Level Input Voltage V CC =.V to.v.v CC V V IH T, T High Level Input Voltage V CC =.V to.v.7v CC V I INTOL T, T Input Current T = V, T = V CC ±. ± µa V IL RDIS Input Threshold Low V CC =.V to.v. V V IH RDIS Input Threshold High V CC =.V to.v. V I RDIS RDIS Pull-Up Current V RDIS = V µa Note : Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note : All voltage values are with respect to GND. Note : The greater of V, is the internal supply voltage (V CC ). Note : Under static no-fault conditions, V will necessarily supply quiescent current. If at any time is larger than V, must be capable of supplying the quiescent current, programming (transient) current and reference load current. Note : The output pins and COMPX have internal pull-ups to of typically µa. However, external pull-up resistors may be used when faster rise times are required or for V OH voltages greater than. Note : The push-pull output pin on the LTC9- is actively pulled up to.

4 LTC9 TEST CIRCUITS V V V LTC9- OR COMPX I SOURCE µa V V V LTC9- OR COMPX I SINK.mA, µa V V V LTC9- I SOURCE µa 9 F 9 F 9 F Figure., COMPX V OH Test Figure., COMPX V OL Test Figure. Active Pull-Up V OH Test U W W TI I G DIAGRA V X Monitor Timing V X V RTX t UV t.v COMPX 9 TD TYPICAL PERFOR A CE CHARACTERISTICS UW THRESHOLD VOLTAGE, V RT (V) V Threshold Voltage % 7.% %.%. 9 G THRESHOLD VOLTAGE, V RT (V) V Threshold Voltage % 7.% %.%.7 9 G THRESHOLD VOLTAGE, V RT (V) V Threshold Voltage % 7.% %.%. 9 G

5 LTC9 TYPICAL PERFOR A CE CHARACTERISTICS UW THRESHOLD VOLTAGE, V RT (V) V Threshold Voltage % 7.% %.%. 9 G THRESHOLD VOLTAGE, V RT (V) V Threshold Voltage % 7.% %.%. 9 G THRESHOLD VOLTAGE, V RT (V) V Threshold Voltage % 7.% %.%. 9 G THRESHOLD VOLTAGE, V RTA (V) ADJ Threshold Voltage % 7.% %.%. THRESHOLD VOLTAGE, V RTAN (V)..... ADJ Threshold Voltage. V REF (V) V REF % 7.% %.%.9 9 G7 9 G 9 G9 IV (µa) 9 7 I V V = V =.V V =.V V =.V 9 G I (µa) I V = V =.V V =.V V =.V 9 G IV (µa) I V V = V =.V V =.V V =.V 9 G

6 LTC9 TYPICAL PERFOR A CE CHARACTERISTICS UW IV (µa) I V V = V =.V V =.V V =.V 9 G TYPICAL TRANSIENT DURATION (µs) Typical Transient Duration vs Comparator Overdrive (V, ) RESET OCCURS ABOVE CURVE T A = C. RESET COMPARATOR OVERDRIVE VOLTAGE (% OF V RTX ) 9 G TYPICAL TRANSIENT DURATION (µs) Typical Transient Duration vs Comparator Overdrive (V, V) T A = C RESET OCCURS ABOVE CURVE. RESET COMPARATOR OVERDRIVE VOLTAGE (% OF V RTX ) 9 G Output Voltage vs V, V PG = V Reset Time-Out Period Reset Time-Out Period vs Capacitance OUTPUT VOLTAGE (V) V = = V = V k PULL-UP FROM TO V T A = C RESET TIME-OUT PERIOD, t (ms) C RT = pf (SILVER MICA) RESET TIME-OUT PERIOD, t (sec) m m m T A = C V (V).9 µ p p n n n µ C RT (FARAD) 9 G 9 G 9 G7 I SINK (ma) 9 7, COMPX I SINK vs Supply Voltage T A = C V OL =.V V OL =.V VOL (V)......, COMPX Voltage Output Low vs Output Sink Current = V V = V C C C V OH (V) High Level Output Voltage vs Output Source Current (LTC9-) C C V = V = V V =.V V = V C V OR (V) 7 9 I SINK (ma).. I SOURCE (ma). 9 G 9 G9 9 G

7 LTC9 TYPICAL PERFOR A CE CHARACTERISTICS UW PULL-UP CURRENT (µa) COMPX Pull-Up Current vs (COMPX Held at V) T A = C.... (V) 9 G COMPX PROPAGATION DELAY (µs) COMPX Propagation Delay vs Input Overdrive Above Threshold V, V, V T A = C INPUT OVERDRIVE ABOVE THRESHOLD (mv) 9 G PULL-UP CURRENT (µa) Pull-Up Current vs (LTC9-) T A = C V RT V RT V RT PULL-UP CURRENT (ma) Pull-Up Current vs (LTC9-) T A = C V RT V RT V RT.. (V)... (V). 9 G 9 G PI FU CTIO S U U U COMP (Pin ): Comparator Output. Nondelayed, active high logic output with weak pull-up to. Pulls high when V is above reset threshold. May be pulled greater than using external pull-up. COMP (Pin ): Comparator Output. Nondelayed, active high logic output with weak pull-up to. Pulls high when V is above reset threshold. May be pulled greater than using external pull-up. V (Pin ): Voltage Input. Select from.v,.v,.v or ADJ. See Table for details. V (Pin ): Voltage Input. Select from V or.v. See Table for details. The greater of (V, ) is also V CC for the chip. Bypass this pin to ground with a.µf (or greater) capacitor. CRT (Pin ): Reset Delay Time Programming Pin. Attach an external capacitor (C RT ) to GND to set a reset delay time of.ms/nf. Leaving the pin open generates a minimum delay of approximately µs. A 7nF capacitor will generate a ms reset delay time. 7

8 LTC9 PI FU CTIO S U U U (Pin ): Reset Logic Output. Active low with weak pull-up to (LTC9-) or active pull-up to (LTC9-). Pulls low when any voltage input is below the reset threshold and held low for programmed delay time after all voltage inputs are above threshold. May be pulled above using an external pull-up (LTC9- only). T (Pin 7): Digital Input for Supply Tolerance Selection (%, 7.%, % or.%). Used in conjunction with T (Pin 9). See Applications Information for tolerance selection chart (Table ). RDIS (Pin ): Digital Input for Disable. A low input on this pin forces the output to (or pull-up voltage). Useful for determining supply margins without issuing reset command to processor. A weak internal pull-up allows pin to be left floating for normal monitor operation. T (Pin 9): Digital Input for Supply Tolerance Selection (%, 7.%, % or.%). Used in conjunction with T (Pin 7). See Applications Information for tolerance selection chart (Table ). GND (Pin ): Ground. V PG (Pin ): Voltage Threshold Combination Select Input. Connect to an external resistive divider between V REF and GND to select of combinations of preset and/or ±adjustable voltage thresholds (see Table ). Do not add capacitance on the V PG pin. V REF (Pin ): Buffered Reference Voltage. A.V nominal reference used for programming voltage (V PG ) and for the offset of negative adjustable applications. The buffered reference can source and sink up to ma. The reference can drive a bypass capacitor of up to pf without oscillation. V (Pin ): Voltage Input. Select from.v,.v, ADJ or ADJ. See Table for details. (Pin ): Voltage Input. Select from.v, V or.v. See Table for details. The greater of (V, ) is also V CC for chip. Bypass this pin to ground with a.µf (or greater) capacitor. All logic outputs (COMP, COMP, COMP, COMP) are weakly pulled up to. is weakly pulled up to in the LTC9- and is actively pulled up to in the LTC9-. COMP (Pin ): Comparator Output. Nondelayed, active high logic output with weak pull-up to. Pulls high when V is above reset threshold. May be pulled greater than using external pull-up. COMP (Pin ): Comparator Output. Nondelayed, active high logic output with weak pull-up to. Pulls high when is above reset threshold. May be pulled greater than using external pull-up.

9 BLOCK DIAGRA W V LTC9 POWER DETECT V CC µa COMP + V µa V V RESISTIVE DIVIDER MATRIX + COMP GND + µa COMP V PG + A/D V REF BUFFER BANDGAP REFERENCE µa COMP BUFFER GAIN ADJUST ADJUSTABLE RESET PULSE GENERATOR V CC µa LTC9- µa µa V CC µa 7 T 9 T CRT RDIS C RT LTC9-9 DB- 9

10 LTC9 APPLICATIO S I FOR ATIO Power-Up U W U U On power-up, the larger of V or will power the drive circuits for the and the COMPX pins. This ensures that the and COMPX outputs will be low as soon as V or reaches V. The and COMPX outputs will remain low until the part is programmed. After programming, if any one of the V X inputs is below its programmed threshold, will be a logic low. Once all the V X inputs rise above their thresholds, an internal timer is started and is released after the programmed delay time. If V CC < (V ) and V CC <.V, the V input impedance will be low (kω typ). Monitor Programming The LTC9 input voltage combination is selected by placing the recommended resistor divider from V REF to GND and connecting the tap point to V PG, as shown in Figure. Table offers recommended resistor values for the various modes. The last column in Table specifies optimum V PG /V REF ratios (±.) to be used when programming with a ratiometric DAC. During power-up, once V or reaches.v (max), the monitor enters a programming period of approximately µs during which the voltage on the V PG pin is sampled and the monitor is configured to the desired input combination. Do not add capacitance to the V PG pin. Immediately after programming, the comparators are enabled and supply monitoring will begin. Supply Monitoring The LTC9 is a low power, high accuracy programmable quad supply monitoring circuit with four nondelayed monitor outputs, a common reset output and selectable supply thresholds. Reset timing is adjustable using an external capacitor. Single pin programming selects of input voltage monitor combinations. Two digital inputs select one of four supply tolerances (%, 7.%, % or.%). All four voltage inputs must be above predetermined thresholds for the reset not to be invoked. The LTC9 will assert the reset and comparator outputs during power-up, power-down and brownout conditions on any one of the voltage inputs. LTC9 V REF V PG GND R Table. Voltage Threshold Programming R 9 F Figure. Monitor Programming V PG MODE V (V) (V) V (V) V (V) R (kω) R (kω) V REF.. ADJ ADJ Open Short... ADJ ADJ ADJ ADJ..... ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ ADJ Short Open. The inverting inputs on the V and/or V comparators are set to.v when the positive adjustable modes are selected and with T and T low (% tolerance) (Figure ). The tap point on an external resistive divider, connected between the positive voltage being sensed and ground, is connected to the high impedance noninverting inputs (V, V). The trip voltage is calculated from: R VTRIP =. V + R Once the resistor divider is set in the % tolerance mode, there is no need to change the divider for the other tolerance modes (7.%, %,.%) because the internal reference is scaled accordingly, moving the trip point in.% increments.

11 LTC9 APPLICATIO S I FOR ATIO V OR V U W U U Figure. Setting the Positive Adjustable Trip Point V TRIP V TRIP R R R R V REF V In the negative adjustable mode, the noninverting input on the V comparator is connected to ground (Figure ). The tap point on an external resistive divider, connected between the negative voltage being sensed and the V REF pin, is connected to the high impedance inverting input (V). V REF provides the necessary level shift required to operate at ground. The trip voltage is calculated from: R VTRIP = VREF ; VREF =. V R T,T Low (% Tolerance Mode) Once the resistor divider is set in the % tolerance mode, there is no need to change the divider for the other tolerance modes (7.%, %,.%) because V REF is scaled accordingly, moving the trip point in.% increments. In a negative adjustable application, the minimum value for R is limited by the sourcing capability of V REF (±ma). With no other load on V REF, R (minimum) is:.v ma =.kω Tables and offer suggested resistor values for various adjustable applications. + LTC9 Figure. Setting the Negative Adjustable Trip Point + +.V % TOLERANCE MODE LTC9 9 F 9 F Table. Suggested Resistor Values for the ADJ Inputs V SUPPLY (V) V TRIP (V) R (kω) R (kω) Table. Suggested Resistor Values for the ADJ Input V SUPPLY (V) V TRIP (V) R (kω) R (kω) Although all four supply monitor comparators have built-in glitch immunity, bypass capacitors on V and are recommended because the greater of V or is also the V CC for the chip. Filter capacitors on the V and V inputs are allowed. Power-Down On power-down, once any of the V X inputs drop below their threshold, and COMPX are held at a logic low. A logic low of.v is guaranteed until both V and drop below V. If the bandgap reference becomes invalid (V CC < V typ), the part will reprogram once V CC rises above.v (max). Monitor Output Rise and Fall Time Estimation All of the outputs (, COMPX) have strong pull-down capability. If the external load capacitance (C LOAD ) for a

12 LTC9 APPLICATIO S I FOR ATIO U W U U particular output is known, output fall time (% to 9%) is estimated using: t FALL. R PD C LOAD where R PD is the on-resistance of the internal pull-down transistor. The typical performance curve (V OL vs I SINK ) demonstrates that the pull-down current is somewhat linear versus output voltage. Using the C curve, R PD is estimated to be approximately Ω. Assuming a pf load capacitance, the fall time is about.ns. Although the outputs are considered to be open-drain, they do have a weak pull-up capability (see COMPX or Pull-Up Current vs curve). Output rise time (% to 9%) is estimated using: t RISE. R PU C LOAD where R PU is the on-resistance of the pull-up transistor. The on-resistance as a function of the voltage at room temperature is estimated using: R PU = Ω with =.V, R PU is about k. Using pf for load capacitance, the rise time is µs. If the output needs to pull up faster and/or to a higher voltage, a smaller external pull-up resistor may be used. Using a k pullup resistor, the rise time is reduced to.µs for a pf load capacitance. The LTC9- has an active pull-up to on the output. The typical performance curve ( Pull-Up Current vs curve) demonstrates that the pull-up current is somewhat linear versus the voltage and R PU is estimated to be approximately Ω. A pf load capacitance makes the rise time about ns. Selecting the Reset Timing Capacitor The reset time-out period is adjustable in order to accommodate a variety of microprocessor applications. The reset time-out period, t, is adjusted by connecting a capacitor, C RT, between the CRT pin and ground. The value of this capacitor is determined by: C RT = t 7 9 with C RT in Farads and t in seconds. The C RT value per millisecond of delay can also be expressed as C RT /ms = 7 (pf/ms). Leaving the CRT pin unconnected will generate a minimum reset time-out of approximately µs. Maximum reset time-out is limited by the largest available low leakage capacitor. The accuracy of the time-out period will be affected by capacitor leakage (the nominal charging current is µa) and capacitor tolerance. A low leakage ceramic capacitor is recommended. Tolerance Programming and the RESET Disable Using the two digital inputs T and T, the user can program the global supply tolerance for the LTC9 (%, 7.%, %,.%). The larger tolerances provide more headroom by lowering the trip thresholds. Table. Tolerance Programming T T TOLERANCE (%) V REF (V) Low Low. Low High 7..7 High Low. High High.. Under conventional operation, and COMPX will go low when V X is below its threshold. At any time, the RDIS pin can be pulled low, overriding the reset operation and forcing the pin high. This feature is useful when determining supply margins under processor control since the reset command will not be invoked. The RDIS pin is connected to a weak internal pull-up to V CC (µa typ), allowing the pin to be left floating if unused. Ensuring Valid for V CC Down to V (LTC9-) When V CC is below V the pull-down capability is drastically reduced. The pin may float to undetermined voltages when connected to high impedance (such as CMOS logic inputs). The addition of a pull-down resistor from to ground will provide a path for stray charge and/or leakage currents. The resistor value should be small enough to provide effective pull-down without excessively loading the pull-up circuitry. Too large a value may not pull down well enough. A k resistor from to ground is satisfactory for most applications.

13 LTC9 TYPICAL APPLICATIO S U Quad Supply Monitor, % Tolerance V, V,.V, V (ADJ).V COMP COMP V COMP COMP V V V LTC9 V CRT V REF SYSTEM V RESET PG 7 T GND C RT RDIS T 9 R.M R k V V TRIP =.V 9 TA V, V Monitor with Unused, V Inputs Pulled Above Trip Thresholds (% Tolerance) V SYSTEM RESET C RT 7 COMP COMP V COMP COMP V LTC9 V CRT T RDIS V REF V PG GND T 9 R.k R.k R k R k V V TRIP =.V 9 TA

14 LTC9 TYPICAL APPLICATIO S U Quad Supply Monitor with LED Undervoltage Indicators,.% Tolerance, Reset Disabled V,.V,.V,.V R L k R L k R L k R L k LED LED LED LED V C RT.V 7 COMP COMP V COMP COMP V LTC9 V CRT V REF V PG T GND RDIS T 9.V.V R.k R 7.k 9 TA

15 LTC9 PACKAGE DESCRIPTIO U GN Package -Lead Plastic SSOP (Narrow. Inch) (Reference LTC DWG # --). ±..9.9* (..97) 9.9 (.9) REF. MIN...9. (.7.9)..7** (..9). ±. RECOMMENDED SOLDER PAD LAYOUT. TYP (.7.9). ±. (. ±.) TYP.. (..77)..9 (..9).. (..7) NOTE:. CONTROLLING DIMENSION: INCHES INCHES. DIMENSIONS ARE IN (MILLIMETERS). DRAWING NOT TO SCALE *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED." (.mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED." (.mm) PER SIDE.. (..). (.) BSC GN (SSOP) Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

16 LTC9 TYPICAL APPLICATIO U Quad Supply Monitor with Hysteresis % Tolerance (Supplies Rising).% Tolerance (After Goes High) V.V.V.V R 9k R.k LTC9- V COMP V V RDIS V REF V PG GND COMP COMP COMP T T CRT 7 9 k C RT 9 TA RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC9 V Supply Monitor, Watchdog Timer and Battery Backup.V Threshold LTC9-..V Supply Monitor, Watchdog Timer and Battery Backup.9V Threshold LTC99 V Supply Monitor and Watchdog Timer.V Threshold LTC V Supply Monitor, Watchdog Timer and Push-Button Reset.7V/.V Threshold LTC Micropower Precision Triple Supply Monitor for V,.V and ADJ.7V,.V, V Thresholds (±.7%) LTC-. Micropower Precision Triple Supply Monitor for.v,.v and ADJ.V,.V, V Thresholds (±.7%) LTC Precision Triple Supply Monitor for PCI Applications Meets PCI t FAIL Timing Specifications LTC7-. Micropower Triple Supply Monitor for.v,.v and ADJ Adjustable RESET and Watchdog Time-Outs LTC7- Micropower Triple Supply Monitor for V,.V and ADJ Adjustable RESET and Watchdog Time-Outs LTC77-./LTC77- Micropower Triple Supply Monitor with Open-Drain Reset Individual Monitor Outputs in MSOP LTC7-./LTC7-. Micropower Triple Supply Monitor with Open-Drain Reset -Lead SOT- Package LTC7-./LTC7- Micropower Triple Supply Monitor with Open-Drain Reset -Lead SOT- Package LTC9-. Micropower Triple Supply Monitor with Push-Pull Reset Output -Lead SOT- Package LTC9 Programmable Quad Supply Monitor Adjustable RESET, -Lead MSOP Package LTC9 Programmable Quad Supply Monitor Adjustable RESET and Watchdog Timer, -Lead SSOP Package Linear Technology Corporation McCarthy Blvd., Milpitas, CA 9-77 () -9 FAX: () -7 LT/TP K PRINTED IN USA LINEAR TECHNOLOGY CORPORATION