DESCRIPTIO. APPLICATIO S Desktop and Notebook Computers Handheld Devices Network Servers Core, I/O Monitor TYPICAL APPLICATIO

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1 FEATRES Monitors Two Inputs Simultaneously Three Threshold Selections for V, 3.3V or 2.V Supplies Low Voltage Adjustable Input (.V) Three Supply Tolerances (%, 7.%, %) Guaranteed Threshold Accuracy: ±.% of Monitored Voltage Over Temperature Internal Auto Select Power Supply Glitch Immunity 2ms Reset Time Delay (LTC296 Only) Adjustable Reset Time Delay (LTC297 Only) Open Drain Output Guaranteed for V or V Low Profile (mm) SOT-23 (ThinSOT TM ) and Plastic (3mm 2mm) DFN Packages APPLICATIO S Desktop and Notebook Computers Handheld Devices Network Servers Core, I/O Monitor, LTC and LT are registered trademarks of Linear Technology Corporation. DESCRIPTIO LTC296/LTC297 Precision Dual Supply Monitors with One Pin-Selectable Threshold and One Adjustable Input The LTC 296/LTC297 are dual supply monitors intended for systems with multiple supply voltages. The dual supply monitors have a common reset output with delay (2ms for the LTC296 and adjustable using an external capacitor for the LTC297). These products provide a precise, space-conscious and micropower solution for supply monitoring. The LTC296/LTC297 feature a tight.% threshold accuracy over the whole operating temperature range and glitch immunity to ensure reliable reset operation without false triggering. The open drain output state is guaranteed to be in the correct state for and/or down to V. The LTC296/LTC297 also feature one adjustable input with a nominal threshold level at.v, another input with three possible input threshold levels, and three supply tolerances for possible margining. These features provide versatility for any kind of system requiring dual supply monitors. Two three-state input pins program the threshold and tolerance level without requiring any external components. TYPICAL APPLICATIO Dual Supply Monitor with Adjustable Tolerance (2.V,.8V) DC/DC CONVERTER.µF ERANCE = % LTC297 2.V.8V V ADJ TMR.µF 22nF 49.9k k SYSTEM LOGIC 2967 TA Supply Selection Programming. 3.3 OPEN 2. Tolerance Programming ERANCE % 7.% OPEN % 2967f

2 LTC296/LTC297 ABSOLTE AXI RATI GS W W W Terminal Voltages,....3V to 7V, V ADJ,....3V to (V MAX +.3V)....3V to 7V (LTC296)....3V to 7V TMR (LTC297)....3V to 7V (Notes, 2) Operating Temperature Range LTC296C/LTC297C... C to 7 C LTC296I/LTC297I... 4 C to 8 C Storage Temperature Range... 6 C to C Lead Temperature (Soldering, sec)... 3 C PACKAGE/ORDER I FOR ATIO W /TMR* TOP VIEW 9 DDB8 PACKAGE 8-LEAD (3mm 2mm) PLASTIC DFN EXPOSED PAD IS (PIN 9), MST BE SOLDERED TO PCB * FOR LTC296 TMR FOR LTC297 T JMAX = 2 C, θ JA = 2 C/W V ADJ ORDER PART NMBER LTC296CDDB LTC296IDDB LTC297CDDB LTC297IDDB DDB8 PART MARKING LBDC LBDD LBDF LBDG Consult LTC Marketing for parts specified with wider operating temperature ranges. /TMR* TOP VIEW 8 7 V ADJ 6 TS8 PACKAGE 8-LEAD PLASTIC TSOT-23 * FOR LTC296 TMR FOR LTC297 T JMAX = 2 C, θ JA = 2 C/W ORDER PART NMBER LTC296CTS8 LTC296ITS8 LTC297CTS8 LTC297ITS8 TS8 PART MARKING LTBCM LTBCN LTBCP LTBCQ ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T A = 2 C. = = 2.V, V ADJ =.V, = = V, unless otherwise noted. (Notes 2, 3, 4) SYMBOL PARAMETER CONDITIONS MIN TYP MAX NITS V RT V, % Reset Threshold Input Threshold V V, 7.% Reset Threshold V V, % Reset Threshold V V RT33 3.3V, % Reset Threshold Input Threshold V 3.3V, 7.% Reset Threshold V 3.3V, % Reset Threshold V V RT2 2.V, % Reset Threshold Input Threshold V 2.V, 7.% Reset Threshold V 2.V, % Reset Threshold V V RTADJ ADJ, % Reset Threshold V ADJ Input Threshold V ADJ, 7.% Reset Threshold V ADJ, % Reset Threshold V V MAX(MIN) Minimum V MAX Operating Voltage (Note 2), in Correct Logic State V I VCC Input Current > 4 µa > ± µa I Input Current > 3 µa > µa I VADJ V ADJ Input Current ± na f

3 ELECTRICAL CHARACTERISTICS LTC296/LTC297 The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T A = 2 C. = = 2.V, V ADJ =.V, = = V, unless otherwise noted. (Notes 2, 3, 4) SYMBOL PARAMETER CONDITIONS MIN TYP MAX NITS I TMR(P) TMR Pull-p Current (LTC297) V TMR = V µa I TMR(DOWN) TMR Pull-Down Current (LTC297) V TMR =.4V µa t Reset Time-Out Period (LTC296) ms t Reset Time-Out Period (LTC297) C TMR = 22nF ms t V V X ndervoltage Detect to V X Less Than Reset Threshold V RTX µs or by More than % V OL Output Voltage Low, I = 2.mA..4 V I = µa; and/or = V ( Only)..3 V V OH Output Voltage High, I = µa V MAX V (Notes 2, ) Three-State Inputs, V IL Low Level Input Voltage.4 V V IH High Level Input Voltage.4 V V Z Pin Voltage when Left in Hi-Z State I = µa.7 V I = µa.9 V I = µa. V I VPG Programming Input Current (Note 6) ±2 µa Note : Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The greater of, is the internal supply voltage (V MAX ). Note 3: All currents into pins are positive; all voltages are referenced to unless otherwise noted. Note 4: For reset thresholds test conditions refer to the voltage threshold programming table in the Applications Information section. Note : The output pins and have an internal pull-up to V MAX of typically 6µA. However, an external pull-up resistor may be used when faster rise time is required or for V OH voltages greater than V MAX. Note 6: The input current to the three-state input pins are the pull-up and the pull-down current when the pins are either set to or respectively. In the open state, the maximum leakage current to or permissible is µa. TYPICAL PERFOR A CE CHARACTERISTICS W Specifications are at T A = 2 C unless otherwise noted. THRESHOLD VOLTAGE, VRT (V) V Threshold Voltage vs Temperature % % % 4.4 THRESHOLD VOLTAGE, VRT33 (V) V Threshold Voltage vs Temperature % 7.% % THRESHOLD VOLTAGE, VRT2 (V) V Threshold Voltage vs Temperature % 7.% % TEMPERATRE ( C) TEMPERATRE ( C) TEMPERATRE ( C) 2967 G 2967 G G3 2967f 3

4 LTC296/LTC297 TYPICAL PERFOR A CE CHARACTERISTICS W Specifications are at T A = 2 C unless otherwise noted. THRESHOLD VOLTAGE, V RTADJ (V) ADJ Threshold Voltage vs Temperature I vs Temperature I VCC vs Temperature % 7.% % I (µa) = V = 3.3V V ADJ =.V = =.4V I VCC (µa) = 2.V = 3.3V V ADJ =.V = =.4V TEMPERATRE ( C) TEMPERATRE ( C) TEMPERATRE ( C) 2967 G G 2967 G6 TYPICAL TRANSIENT DRATION (µs) Typical Transient Duration vs Comparator Overdrive (, V ADJ ) RESET OCCRS ABOVE CRVE RESET TIME OT PERIOD, t (ms) Reset Time Out Period (t ) vs Capacitance (C TMR ) RESET TIME OT PERIOD, t (ms) Reset Time Out Period (t ) vs Temperature CRT = 22nF (FILM). COMPARATOR OVERDRIVE VOLTAGE (% OF V RTX ) 2967 G7. p p n n n µ C TMR (FARAD) 2967 G TEMPERATRE ( C) 2967 G9 4 Output Voltage vs = = = V ADJ =.V k PLL-P RESISTOR 4 Output Voltage vs = = = V ADJ =.V k PLL-P RESISTOR 4 Output Voltage vs = = = V ADJ =.V pf CAPACITOR AT OTPT VOLTAGE (V) 3 2 OTPT VOLTAGE (V) 3 2 OTPT VOLTAGE (V) (V) 2967 G (V) 2967 G (V) 2967 G f

5 LTC296/LTC297 TYPICAL PERFOR A CE CHARACTERISTICS W Specifications are at T A = 2 C unless otherwise noted. Pull-Down Current (I ) vs V MAX Pull-Down Current (I ) vs V MAX Output Voltage Low (V OL ) vs Pull-Down Current (I ) PLL-DOWN CRRENT, I (ma) = = = V ADJ =.V NO PLL-P R AT mv AT mv PLL-DOWN CRRENT, I (ma) = = = V ADJ =.V NO PLL-P R AT mv AT mv OTPT VOLTAGE LOW, VOL (V) = = V V ADJ =.4V = = NO PLL-P R 8 C 2 C 4 C V MAX (V) V MAX (V) PLL-DOWN CRRENT, I (ma) 2967 G G4 2967G OTPT VOLTAGE LOW, VOL (V) Output Voltage Low (V OL ) vs Pull-Down Current (I ) = = V V ADJ =.V = = NO PLL-P R 8 C 2 C 4 C PLL-DOWN CRRENT, I (ma) 2967 G6 PLL-P CRRENT, I (µa) Pull-p Current (I ) vs V MAX 2. = V RT2 V RT33 V RT V MAX (V) 2967G7 PLL-P CRRENT, I (µa) Pull-p Current (I ) vs V MAX = 2 V RT2 V RT33 V RT V MAX (V) 2967 G8 OTPT VOLTAGE HIGH, VOH (V) Output Voltage High (V OH ) vs Output Source Current (I ) = = 3.3V V ADJ =.V = OPEN NO PLL-P R 8 C 2 C 4 C OTPT VOLTAGE HIGH, VOH (V) Output Voltage High (V OH ) vs Output Source Current (I ) = = 3.3V V ADJ =.4V = OPEN NO PLL-P R 4 C 2 C 8 C I, I (µa) I, I vs Temperature 2 = = = 3.3V OTPT SORCE CRRENT, I (µa) OTPT SORCE CRRENT, I (µa) TEMPERATRE ( C) 2967 G G G2 2967f

6 LTC296/LTC297 TYPICAL PERFOR A CE CHARACTERISTICS W Specifications are at T A = 2 C unless otherwise noted. I, I (µa) I, I vs Temperature 2 = = 9 = 3.3V TEMPERATRE ( C) 2967 G22 PI F CTIO S (TS8 Package/DDB8 Package) (Pin /Pin 4): Optional Power Supply Pin. powers and maintains the correct operation of the and pins in the complete absence of. If is present, the greater of or (V MAX ) powers the internal circuitry and the reset outputs. Bypass this pin to ground with a.µf (or greater) capacitor. Tie to when no optional power is available. (Pin 2/Pin 3): (LTC296 Only) Reset Logic Output. When all voltage inputs are above the reset threshold for at least the programmed delay time, this pin pulls low. This pin has a weak pull up to V MAX and may be pulled above V MAX using an external pull-up. TMR (Pin 2/Pin 3): (LTC297 Only) Reset Delay Time Programming Pin. Attach an external capacitor (C TMR ) to to set a reset delay time of 9ms/nF. Leaving the pin open generates a minimum delay of approximately 2µs. A 22nF capacitor will generate a 2ms reset delay time. (Pin 3/Pin 2): Inverted Reset Logic Output. Pulls low when either or V ADJ is below the reset threshold and holds low for programmed delay time after all voltage inputs are above threshold. This pin has a weak pull up to V MAX and may be pulled above V MAX using an external pull-up. (Pin 4/Pin and Pin 9): Ground. (Pin /Pin 8): Three-State Input for Supply Tolerance Selection (%, 7.% or %). Refer to Applications Information for tolerance selection chart (Table 3). (Pin 6/Pin 7): The Voltage Threshold Select Three- State Input. Connect to, or leave unconnected in open state to select one of three possible input threshold levels (refer to Table ). V ADJ (Pin 7/Pin 6): Adjustable Voltage Input. Bypass this pin to ground with a.µf (or greater) capacitor in a noisy environment. (Pin 8/Pin ): Voltage Input. Select from V, 3.3V or 2.V. Refer to Table for details. The greater of (, ) is also the internal (V MAX ). Bypass this pin to ground with a.µf (or greater) capacitor f

7 LTC296/LTC297 BLOCK DIAGRA W LTC296 V MAX 6µA V MAX POWER DETECT RESISTOR NETWORK + 2ms RESET PLSE GENERATOR 6µA V MAX + V ADJ BAND GAP REFERENCE THREE-STATE DECODER 296 BD LTC297 TMR V MAX V MAX POWER DETECT RESISTOR NETWORK + + 2ms RESET PLSE GENERATOR 6µA V ADJ BAND GAP REFERENCE THREE-STATE DECODER 297 BD 2967f 7

8 LTC296/LTC297 W W TI I G DIAGRA Vx Monitor Timing V RTX V X t V t V V 2967 TD APPLICATIO S I FOR Supply Monitoring 8 ATIO W The LTC296/LTC297 are low power, high accuracy dual supply monitoring circuits with an adjustable input and another input with selectable threshold. Reset delay is set to a nominal of 2ms for LTC296 and is adjustable using an external capacitor for LTC297. The three-state input pin () selects one of three possible threshold voltage levels for. Another three-state input pin sets the supply tolerance (%, 7.% or %). Both input voltages ( and V ADJ ) must be above predetermined thresholds for the reset not to be invoked. The LTC296/LTC297 assert the reset outputs during powerup, power-down and brownout conditions on any one of the voltage inputs. Power-p The greater of, is the internal supply voltage (V MAX ). V MAX powers the drive circuits for the pin. Therefore, as soon as or reaches V during power up, the output asserts low. V MAX also powers the drive circuits for the pin in the LTC296. Therefore, weakly pulls high when either or reaches at least V. Threshold programming is complete, when reaches at least 2.7V. After programming, if any one of the Vx inputs falls below its programmed threshold, asserts low ( weakly pulls high) as long as V MAX is at least V. Once both and V ADJ inputs rise above their thresholds, an internal timer is started. After the programmed delay time, weakly pulls high ( asserts low). Power-Down On power-down, once either or V ADJ drops below its threshold, asserts logic low and weakly pulls high. V MAX of at least V guarantees a logic low of.4v at. Auxiliary Power If an auxiliary power is available it can be connected to the pin. Since the internal supply voltage (V MAX ) is the greater of, ; a of at least V guarantees logic low of.4v at for voltage inputs ( and/or V ADJ ) down to V. Programming Pins The two three-state input pins, and, should be connected to, or left unconnected during normal operation. Note that when left unconnected, the maximum leakage current allowable from the pin to either or is µa. 2967f

9 LTC296/LTC297 APPLICATIO S I FOR ATIO In margining application, the three-state input pins can be driven using a three-state buffer. Note however, the low and high output of the three-state buffer has to satisfy the V IL and V IH of the three-state pin listed in the Electrical Characteristics Table. Moreover, when the three-state buffer is in the high impedance state, the maximum leakage current allowed from the pin to either or is µa. Monitor Programming Connecting to either, or, or leaving it in open state selects the LTC296/LTC297 input voltage threshold. Table shows the three possible selections of nominal input voltage and their corresponding connection. Table. Supply Selection Programming. 3.3 OPEN 2. Note: Open = open circuit or driven by a three-state buffer in high impedance state with leakage current less than µa. The noninverting input on the V ADJ comparator is set to.v when the pin is set high (% tolerance) (Figure ) and the high impedance inverting input directly ties to the V ADJ pin. V ADJ V TRIP R % R2 % + +.V LTC296/LTC F Figure. Setting the Adjustable Trip Point In a typical application, the V ADJ pin connects to a tap point on an external resistive divider between the positive voltage being monitored and ground. The following formula obtains R resistor value for a particular value of R2 and a desired trip voltage at % tolerance: VTRIP R = R2 (%). V W R2 =kω is recommended. Once the resistor divider is set in the % tolerance mode, there is no need to change the divider for the other tolerance modes (7.%, %) because the internal reference at the noninverting input on the V ADJ comparator is scaled accordingly, moving the trip point in 2.% decrements. Table 2 shows suggested % resistor values for various adjustable applications. Table 2. Suggested % Resistor Values for the V ADJ Inputs V SPPLY (V) V TRIP (V) R (kω) R2 (kω) Tolerance Programming The three-state input pin, programs the common supply tolerance for both and V ADJ input voltages (%, 7.% or %). The larger the tolerance the lower the trip threshold. Table 3 shows the tolerances selection corresponding to a particular connection at the pin. Table 3. Tolerance Programming ERANCE % 7.% OPEN % 2967f 9

10 LTC296/LTC297 APPLICATIO S I FOR ATIO W Threshold Accuracy Reset threshold accuracy is of the utmost importance in a supply sensitive system. Ideally such a system should not reset while supply voltages are within a specified margin below the rated nominal level. Both of the LTC296/ LTC297 inputs have the same relative threshold accuracy. The specification for LTC296/LTC297 is ±.% of the programmed nominal input voltage (over the full operating temperature range). For example, when the LTC296/LTC297 are programmed to handle a V input with % tolerance ( = and =, refer to Table and Table 3), it does not issue a reset command when is above 4.V. The typical % trip threshold is at.% below the nominal input voltage level. Therefore, the typical trip threshold for the V input is 4.42V. With ±.% accuracy, the trip threshold range is 4.42V ±7mV over temperature (i.e. % to 3% below V). This implies that the monitored system must operate reliably down to 4.3V or 3% below V over temperature. The same system using a supervisor with only ±2.% accuracy needs to work reliably down to 4.2V (4.37V ±2mV) or % below V, requiring the monitored system to work over a much wider operating voltage range. In any supervisory application, supply noise riding on the monitored DC voltage can cause spurious resets, particularly when the monitored voltage is near the reset threshold. A less desirable but common solution to this problem is to introduce hysteresis around the nominal threshold. Notice however, this hysteresis introduces an error term in the threshold accuracy. Therefore, a ±2.% accurate monitor with ±% hysteresis is equivalent to a ±3.% monitor with no hysteresis. The LTC296/LTC297 take a different approach to solve this problem of supply noise causing spurious reset. The first line of defense against this spurious reset is a first order low pass filter at the output of the comparator. Thus, the comparator output goes through a form of integration before triggering the output logic. Therefore, any kind of transient at the input of the comparator needs to be of sufficient magnitude and duration before it can trigger a change in the output logic. The second line of defense is the programmed delay time t (2ms for LTC296 and adjustable using an external capacitor for LTC297). This delay will eliminate the effect of any supply noise, whose frequency is above / t, on the and output. When either or V ADJ drops below its programmed threshold, the pin asserts low ( weakly pulls high). When the supply recovers above the programmed threshold, the reset-pulse-generator timer starts counting. If the supply remains above the programmed threshold when the timer finishes counting, the pin weakly pulls high ( asserts low). However, if the supply falls below the programmed threshold any time during the period when the timer is still counting, the timer resets and starts fresh when the supply next rises above the programmed threshold. Note that this second line of defense is only effective for a rising supply and does not affect the sensitivity of the system to a falling supply. Therefore, the first line of defense that works for both cases of rising and falling is necessary. These two approaches prevent spurious reset caused by supply noise without sacrificing the threshold accuracy. Selecting the Reset Timing Capacitor The reset time-out period for LTC297 is adjustable in order to accommodate a variety of microprocessor applications. Connecting a capacitor, C TMR, between the TMR pin and ground sets the reset time-out period, t. The following formula determines the value of capacitor needed for a particular reset time-out period: C TMR = t 9 [F/s] For example, using a standard capacitor value of 22nF gives a 2ms delay. The graph in Figure 2 shows the desired delay time as a function of the value of the timer capacitor that should be used: 2967f

11 LTC296/LTC297 APPLICATIO S I FOR ATIO RESET TIME OT PERIOD, t (ms) W. p p n n n µ C TMR (FARAD) 2967 F2 Figure 2. Reset Time-Out Period vs Capacitance Leaving the TMR pin open with no external capacitor generates a reset time-out of approximately 2µs. For long reset time-out, the only limitation is the availability of a large value capacitor with low leakage. The TMR capacitor will never charge if the leakage current exceeds the TMR charging current of 2.µA (typical). and Output Characteristics The DC characteristics of the and pull-up and pull-down strength are shown in the Typical Performance Characteristics section. Both and have a weak internal pull-up to V MAX and a strong pull-down to ground. The weak pull-up and strong pull-down arrangement allows these two pins to have open-drain behavior while possessing several other beneficial characteristics. The weak pull-ups eliminate the need for external pull-up resistors when the rise time on these pins is not critical. On the other hand, the open-drain configuration allows for wired-or connections and can be useful when more than one signal needs to pull-down on the line. As noted in the Power-p and Power-Down sections, the circuits that drive and are powered by V MAX = MAX (, ). During fault condition, V MAX of at least V guarantees a maximum V OL =.4V at. However, at V MAX = V the weak pull-up current on is barely turned on. Therefore, an external pull-up resistor of no more than k is recommended on the pin if the state and pullup strength of the pin is crucial at very low V MAX. Note however, by adding an external pull-up resistor, the pull-up strength on the pin is increased. Therefore, if it is connected in a wired-or connection, the pull-down strength of any single device needs to accommodate this additional pull-up strength. Output Rise and Fall Time Estimation The and output have strong pull-down capability. The following formula estimates the output fall time (9% to %) for a particular external load capacitance (C LOAD ): t FALL 2.2 R PD C LOAD where R PD is the on-resistance of the internal pull-down transistor estimated to be typically 4Ω at V MAX >V, at room temperature (2 C), and C LOAD is the external load capacitance on the pin. Assuming a pf load capacitance, the fall time is about 3ns. The rise time on the and pins is limited by weak internal pull-up current sources to V MAX. The following formula estimates the output rise time (% to 9%) at the and pins: t RISE 2.2 R P C LOAD where R P is the on-resistance of the pull-up transistor. Notice that this pull-up transistor is modeled as a 6µA current source in the Block Diagram as a typical representation. The on-resistance as a function of the V MAX = MAX (, ) voltage (for V MAX > V) at room temperature is estimated as follows: R P 6 = Ω MAX(, V ) V CC At V MAX = 3.3V, R P is about 26k. sing pf for load capacitance, the rise time is 86µs. A smaller external pullup resistor maybe used if the output needs to pull up faster and/or to a higher voltage. For example, the rise time reduces to 3.3µs for a pf load capacitance, when using a k pull-up resistor. 2967f

12 LTC296/LTC297 TYPICAL APPLICATIO S V, 3.3V Supply Monitor, % Tolerance with LED Power Good Indicator 3.3V.µF 499Ω LTC296 84k V PWER GOOD LED V ADJ k.µf SYSTEM RESET 296 TA2 3.3V,.8V Monitor, 7.% Tolerance with an Auxiliary V Supply (V Not Monitored) 3.3V.µF LTC296.8V 237k V V ADJ.µF 22nF SYSTEM RESET TMR k 297 TA f

13 LTC296/LTC297 TYPICAL APPLICATIO S 2.V, V Monitor, % Tolerance with LED ndervoltage Indicator and V High Availability Auxiliary Supply (V Not Monitored) 86.6k V 2.V.µF V.µF LED 499Ω V ADJ LTC297 TMR 22nF k.µf 297 TA4 Dual Supply Monitor with Hysteresis, % Tolerance (Supplies Rising), % Tolerance (After Goes Low) 3.3V k k V ADJ LTC296 V.µF k SYSTEM RESET 296 TA Dual Supply Monitor for Tracked/Sequenced Supply 3.3V.µF C GATE nf R TB R ONB 4k R ONA k ON GATE RAMPBF LTC2923 RAMP FB FB R FA IN DC/DC R FB OT 2.V.µF SYSTEM R TA R TB2 R TA2 TRACK TRACK2 FB2 FB R FA2 IN DC/DC R FB2 OT.8V 237k k LTC297 V ADJ TMR 22nF TA6 2967f 3

14 LTC296/LTC297 PACKAGE DESCRIPTIO DDB Package 8-Lead Plastic DFN (3mm 2mm) (Reference LTC DWG # -8-72) 2. ±.. ±..6 ±. (2 SIDES).67 ±. PACKAGE OTLINE.2 ±.. BSC 2.2 ±. (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS PIN BAR TOP MARK (SEE NOTE 6).2 REF 3. ±. (2 SIDES) 2. ±. (2 SIDES).7 ±...6 ±. (2 SIDES) R =. TYP 4.2 ±. 2. ±. (2 SIDES) BOTTOM VIEW EXPOSED PAD 8.38 ±.. BSC PIN CHAMFER OF EXPOSED PAD (DDB8) DFN 3 NOTE:. DRAWING CONFORMS TO VERSION (WECD-) IN JEDEC PACKAGE OTLINE M DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED.mm ON ANY SIDE. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN LOCATION ON THE TOP AND BOTTOM OF PACKAGE f

15 LTC296/LTC297 PACKAGE DESCRIPTIO TS8 Package 8-Lead Plastic TSOT-23 (Reference LTC DWG # ).2 MAX.6 REF 2.9 BSC (NOTE 4).22 REF 3.8 MAX 2.62 REF.4 MIN 2.8 BSC..7 (NOTE 4) PIN ONE ID RECOMMENDED SOLDER PAD LAYOT PER IPC CALCLATOR.6 BSC PLCS (NOTE 3) BSC DATM A. MAX...3. REF BSC (NOTE 3) TS8 TSOT NOTE:. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLSIVE OF PLATING 4. DIMENSIONS ARE EXCLSIVE OF MOLD FLASH AND METAL BRR. MOLD FLASH SHALL NOT EXCEED.24mm 6. JEDEC PACKAGE REFERENCE IS MO-93 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 2967f

16 LTC296/LTC297 TYPICAL APPLICATIO Quad Supply Monitor with LED ndervoltage Indicator, % Tolerance, 3.3V, 2.V,.8V,.6V.8V 3.3V 2.V.6V 49.9k k 22nF LTC297 V ADJ TMR.µF.µF 499Ω LED LTC297 V ADJ TMR 2.k k 22nF 297 TA7 RELATED PARTS PART NMBER DESCRIPTION COMMENTS LTC69 V Supply Monitor, Watchdog Timer and Battery Backup 4.6V Threshold LTC V Supply Monitor, Watchdog Timer and Battery Backup 2.9V Threshold LTC699 V Supply Monitor and Watchdog Timer 4.6V Threshold LTC232 V Supply Monitor, Watchdog Timer and Push-Button Reset 4.37V/4.62V Threshold LTC326/LTC Micropower Precision Triple Supply Monitor for 4.72V, 3.8V, V Threshold (±.7%) V/2.V, 3.3V and ADJ LTC36 Precision Triple Supply Monitor for PCI Applications Meets PCI t FAIL Timing Specifications LTC726-2./LTC726- Micropower Triple Supply Monitor for Adjustable RESET and Watchdog Time-Outs 2.V/V, 3.3V and ADJ LTC727-2./ LTC727- Micropower Triple Supply Monitor with Open-Drain Reset Individual Monitor Outputs in MSOP LTC728-.8/ LTC Micropower Triple Supply Monitor with Open-Drain Reset -Lead SOT-23 Package LTC728-2./ LTC728- Micropower Triple Supply Monitor with Open-Drain Reset -Lead SOT-23 Package LTC98-.8 Micropower Triple Supply Monitor with -Lead SOT-23 Package Push-Pull Reset Output LTC29 Programmable Quad Supply Monitor Adjustable RESET, -Lead MSOP and 3mm X 3mm -Lead DFN Packages LTC29 Programmable Quad Supply Monitor Adjustable RESET and Watchdog Timer, 6-Lead SSOP Package LTC292 Programmable Quad Supply Monitor Selectable Tolerance, RESET Disable for Margining Functions, 6-Lead SSOP Package LTC293 Precision Quad Supply Monitor ltralow Voltage RESET, 6-Lead SOT-23 Package LTC294 Three-State Programmable Precision Dual Supply Monitor Adjustable Tolerance, 8-Lead SOT-23 and 3mm 2mm DFN Packages LTC29 Three-State Programmable Precision Dual Supply Monitor Adjustable RESET and Tolerance, 8-Lead SOT-23 and 3mm 2mm DFN Packages 6 LT/TP 34 K PRINTED IN SA Linear Technology Corporation 63 McCarthy Blvd., Milpitas, CA (48) FAX: (48) LINEAR TECHNOLOGY CORPORATION f