DESCRIPTIO FEATURES TYPICAL APPLICATIO. LT1080/LT1081 Advanced Low Power 5V RS232 Dual Driver/Receiver APPLICATIO S

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1 Advanced Low Power V RS Dual Driver/Receiver FEATRES Superior to CMOS Improved Speed: Operates over kbaud Improved Protection: Outputs Can Be Forced to ±0V without Damage Three-State Outputs Are High Impedance When Off Only Needs Capacitors Absolutely No Latchup CMOS Comparable Low Power: 0mW Can Power Additional RS Drivers: ma Supply Current in Shutdown: µa Available in SO Package Available with or without Shutdown APPLICATIO S Portable Computers Battery-Powered RS Systems Power Supply Generator Terminals Modems DESCRIPTIO The LT 0/LT are the only dual RS driver/ receiver with charge pump to guarantee absolutely no latchup. These interface optimized devices provide a realistic balance between CMOS levels of power dissipation and real world requirements for ruggedness. The driver outputs are fully protected against overload and can be shorted to ±0V. nlike CMOS, the advanced architecture of the does not load the signal line when shut down or when power is off. Both the receiver and RS outputs are put into a high impedance state. An advanced output stage allows driving higher capacitive loads at higher speeds with exceptional ruggedness against ESD. For applications requiring up to five drivers and five receivers with charge pump in one package see the LT0A Series data sheet. A version of the, the LT0A and LTA that use only 0. capacitors, is also available. All of Linear Technology s RS ICs are available in standard surface mount packages., LTC and LT are registered trademarks of Linear Technology Corporation. TYPICAL APPLICATIO V INPT V OTPT Supply Generator Outputs INPTS OTPTS LT0 k k V OTPT RS OTPT RS OTPT RS INPT RS INPT OTPT VOLTAGE (V) 0 R L TO V CC = V R L TO OTPT OTPT R L TO GND R L TO GND 0 0 OTPT CRRENT (ma) 0/ TA0 0/ TA0a

2 ABSOLTE AXI RATI GS W W W Supply Voltage (V CC )... V... V... V Input Voltage Driver... to Receiver... 0V to 0V Pin... GND to V Output Voltage Driver... ( + 0V) to ( 0V) Receiver... 0.V to (V CC + 0.V) (Note ) Short-Circuit Duration... 0 sec... 0 sec Driver Output... Indefinite Receiver Output... Indefinite Operating Temperature Range LT0C/LTC... 0 C to 0 C LT0I/LTI... 0 C to C LT0M/LTM... C to C Storage Temperature Range... C to C Lead Temperature (Soldering, sec) C PACKAGE/ORDER I FOR NC C + C C + C TR OT REC IN J PACKAGE -LEAD CERDIP TOP VIEW LT0 N PACKAGE -LEAD PDIP SW PACKAGE -LEAD PLASTIC SO WIDE V CC GND TR OT REC IN REC OT TR IN TR IN REC OT T JMAX = C, θ JA = 0 C/W, θ JC = 0 C/W (J) T JMAX = C, θ JA = C/W, θ JC = 0 C/W (N) T JMAX = C, θ JA = 0 C/W, θ JC = C/W (SW) W ATIO ORDER PART NMBER LT0CJ LT0CN LT0CSW LT0IN LT0ISW LT0MJ C + C C + C TR OT REC IN J PACKAGE -LEAD CERDIP TOP VIEW LT V CC GND TR OT REC IN REC OT TR IN TR IN REC OT N PACKAGE -LEAD PDIP SW PACKAGE -LEAD PLASTIC SO WIDE T JMAX = C, θ JA = 0 C/W, θ JC = 0 C/W (J) T JMAX = C, θ JA = C/W, θ JC = 0 C/W (N) T JMAX = C, θ JA = C/W, θ JC = C/W (SW) ORDER PART NMBER LTCJ LTCN LTCSW LTIN LTISW LTMJ

3 ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T A = C. (Note ) PARAMETER CONDITIONS TYP MAX NITS Driver Output Voltage Swing Load = k to GND Both Outputs Positive. V Negative. V Logic Input Voltage Level Input Low Level (V OT = High). 0. V Input High Level (V OT = Low). V Logic Input Current V IN V 0 µa V IN 0.V 0 µa Output Short-Circuit Current Sourcing Current, V OT = 0V ma Sinking Current, V OT = 0 ma Output Leakage Current SHTDOWN (Note ), V OT = ±0V 0 µa Data Rate (Note ) R L = k, C L = 00pF kbd R L = k, C L = 00pF 0 kbd Slew Rate R L = k, C L = pf 0 V/µs Receiver Input Voltage Thresholds Input Low Threshold Commercial 0.. V Industrial and Military 0.. V Input High Threshold Commercial.. V Industrial and Military..0 V Hysteresis V Input Resistance V IN = ±V kω Output Voltage Output Low, I OT =.ma V Output High, I OT = µa (V CC = V).. V Output Short-Circuit Current Sinking Current, V OT = V CC 0 ma Sourcing Current, V OT = 0V 0. ma Output Leakage Current SHTDOWN (Note ), 0V V OT V CC µa Power Supply Generator (Note ) Output Voltage I OT = 0mA.0.0 V I OT = ma.0.0 V I OT = ma.. V Output Voltage I OT = 0mA.. V I OT = ma.. V I OT = ma.0.0 V Supply Current ma Supply Leakage Current (V CC ) SHTDOWN (Note ), LT0 Only 0 µa Pin Current 0V V V, LT0 Only 0 µa Supply Rise Time (Note ), LT0 Only ms Note : Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note : These parameters apply for.v V CC.V and V = V, unless otherwise specified. Note : V = 0.V for C T A 0 C, and V = 0.V for 0 C T A C. (LT0 only) Note : nless otherwise specified, V CC = V, external loading of and equals zero and the driver outputs are low (inputs high). Note : Time from either SHTDOWN high or power on until V and V. All external capacitors are. Note : Data rate operation guaranteed by slew rate, short-circuit current and propagation delay tests.

4 PI F CTIO S (Pin numbers refer to LT0) C + ; C ; C + ; C (Pins,,, ): Requires an external capacitor ( ) from C + to C and another from C + to C. Pin can be used for connecting a second positive supply. When a separate positive supply is used, C can be deleted. (Pin ): Positive Supply for RS Drivers. V CC.V. Requires an exterenal capacitor ( ) for charge storage. May be loaded (up to ma) for external system use. Loading does reduce voltage (see graphs). Capacitor may be tied to ground or +V input supply. With multiple transceivers, the and pins may be paralleled into common capacitors. (Pin ): Negative Supply for RS Drivers. (V CC.V). Requires an external capacitor ( ) for charge stroage. May be loaded (up to ma) for external system use. Loading does reduce voltage (see graphs). With multiple transceivers, the and pins may be paralleled into common capacitors. TR OT; TR OT (Pins, ): Driver Outputs with RS Voltage Levels. Outputs are in a high impedance state when in the SHTDOWN mode or when power is off (V CC = 0V) to allow data line sharing. Outputs are fully short-circuit protected from ( + 0V) to ( 0V) with power on, off or in the SHTDOWN mode. Typical output breakdowns are greater than ±V and higher applied voltages will not damage the device if moderately current limited. Shorting one output will affect output from the other. REC IN; REC IN (Pins, ): Receiver Inputs. Accepts RS voltage levels (±0V) and has 0.V of hysteresis to provide noise immunity. Input impedance is nominally kω. REC OT; REC OT (Pins, ): Receiver Outputs with TTL/CMOS Voltage Levels. Outputs are in a high impedance state when in the SHTDOWN mode to allow data line sharing. Outputs are fully short-circuit protected to ground or V CC with power on, off or in the SHTDOWN mode. TR IN; TR IN (Pins, ): RS Driver Input Pins. Inputs are TTL/CMOS compatible. Inputs should not be allowed to float. Tie unused inputs to V CC. GND (Pin ): Ground Pin. V CC (Pin ): Input Supply Pin. Supply current drops to zero in the SHTDOWN mode. (Pin ): Contols the operation mode of the LT0 and is TTL/CMOS compatible. A logic low puts the device in the SHTDOWN mode which reduces input supply current to zero and places both driver and receiver outputs in a high impedance state. A logic high fully enables the device. TYPICAL PERFOR A CE CHARACTERISTICS DRIVER OTPT VOLTAGE (V) 0 Driver Output Voltage V CC =.V V CC =.V R L = k V CC =.V V CC = V V CC = V OTPT HIGH W V CC =.V OTPT LOW TEMPERATRE ( C) OTPT VOLTAGE (V) 0 Supply Generator Outputs OTPT VOLTAGE LOADED TO LOADED TO GROND V CC = V LOADED TO LOADED TO GROND OTPT VOLTAGE 0 0 OTPT CRRENT (ma) SPPLY VOLTAGE (V) 0 Supply Generation from V CC or Shutdown SPPLY V CC = V C TO C = R L =.k; TO SPPLY TIME (ms) 0/ G0 0/ G0 0/ G0

TYPICAL PERFOR A CE CHARACTERISTICS W Receiver Input Thresholds Receiver Output Short-Circuit Current Pin Current vs Voltage.00

0 0 0 TEMPERATRE ( C) 0 INPT VOLTAGE (V) 0/ G0 0/ G0 0/ G0 Pin Thresholds Supply Current in Shutdown Driver Output Leakage in Shutdown.0. 00 V CC = V 0 PIN VOLTAGE (V).

0 0 0 0 TEMPERATRE ( C) SPPLY CRRENT (na) 0 0 0 0 TEMPERATRE ( C) OTPT LEAKAGE CRRENT (µa) V OT = 0V V OT = 0V 0.

5 TYPICAL PERFOR A CE CHARACTERISTICS W Receiver Input Thresholds Receiver Output Short-Circuit Current Pin Current vs Voltage INPT THRESHOLD (V) INPT HIGH INPT LOW OTPT CRRENT (ma) OTPT SINKING OTPT SORCING INPT CRRENT (µa) TEMPERATRE ( C) TEMPERATRE ( C) 0 INPT VOLTAGE (V) 0/ G0 0/ G0 0/ G0 Pin Thresholds Supply Current in Shutdown Driver Output Leakage in Shutdown V CC = V 0 PIN VOLTAGE (V) IMM ON VOLTAGE..0 MAXIMM OFF VOLTAGE TEMPERATRE ( C) SPPLY CRRENT (na) TEMPERATRE ( C) OTPT LEAKAGE CRRENT (µa) V OT = 0V V OT = 0V TEMPERATRE ( C) 0/ G0 0/ G0 0/ G0 Output Waveforms Shutdown to Driver Output Shutdown to Receiver Output V DRIVER 0V OTPT V OTPT INPT V 0V V 0V DRIVER OTPT HIGH V V 0V 0V OTPT V LOW OTPT V V INPT 0V INPT 0V 0 µs µs µs µs 0 ms ms ms ms 0 ms ms ms ms V CC = V 0/ G.tiff V CC = V 0/ G.tiff V CC = V R L = k R L = k V V V 0V 0/ G.tiff

6 APPLICATIO S I FOR ATIO W The driver output stage of the LT0 offers significantly improved protection over older bipolar and CMOS designs. In addition to current limiting, the driver output can be externally forced to ±0V with no damage or excessive current flow, and will not disrupt the supplies. Some drivers have diodes connected between the outputs and the supplies, so externally applied voltages can cause excessive supply voltage to develop. Placing the LT0 in the SHTDOWN mode (Pin low) puts both the driver and receiver outputs in a high impedance state. This allows data line sharing and transceiver applications. The SHTDOWN mode also drops input supply current (V CC ; Pin ) to zero for power-conscious systems. Driver Transceiver LT0 # DRIVER 0V 0V OTPT CAN BE FORCED EXTERNALLY TRANSMIT/RECEIVE LINE RS TRANSMIT/RECEIVE LINE 0/ F0 LT0 # Older RS Drivers and CMOS Drivers WITH SOME DRIVERS, EXTERNALLY APPLIED VOLTAGE CAN FORCE THE SPPLIES (TRANSMIT/ RECEIVE) INPT INVERTER 0/ F0 0/ F0 Sharing a Receiver Line LT0 # Sharing a Transmitter Line LT0 # DRIVER RS INPT A INPT A LT0 # LT0 # DRIVER RS INPT B OTPT INPT B RS TRANSMISSION LINE (CHANNEL SELECT) INPT INVERTER 0/ F0 (CHANNEL SELECT) INPT INVERTER 0/ F0

7 APPLICATIO S I FOR ATIO W When driving CMOS logic from a receiver that will be used in the SHTDOWN mode and there is no other active receiver on the line, a k resistor can be placed from the logic input to V CC to force a definite logic level when the receiver output is in a high impedance state. RS INPT INPT LT0 k* V CC CMOS * FORCES INPT STATE WHEN V IS LOW OTPT 0/ F0 The generated driver supplies ( and ) may be used to power external circuitry such as other RS drivers or op amps. They should be loaded with care, since excessive loading can cause the generated supply voltages to drop, causing the RS driver output voltages to fall below RS requirements. See the graph Supply Generator Outputs for a comparison of generated supply voltage versus supply current. + LT0 DRIVER EXTERNAL OP AMP + To protect against receiver input overloads in excess of ±0V, a voltage clamp can be placed on the data line and still maintain RS compatibility. GND RS INPT k* 0V k OTPT 0/ F0 0V * A PTC THERMISTOR WILL ALLOW CONTINOS OVERLOAD OF GREATER THAN ±0V 0/ F0 TYPICAL APPLICATIO Operating with V and V V INPT* V INPT LT0 V OTPT INPTS OTPTS k RS OTPT RS OTPT RS INPT RS INPT k * PIN SED ON LT. 0/ TA0

8 PACKAGE DESCRIPTIO CORNER LEADS OPTION ( PLCS) Dimensions in inches (millimeters) unless otherwise noted. J Package -Lead CERDIP (Narrow 0.00, Hermetic) (LTC DWG # 0-0-) 0.00 (0.) 0.0 (.) MAX (..) FLL LEAD OPTION 0.00 BSC (0. BSC) (0..) HALF LEAD OPTION 0.0 (0.) RAD TYP (..) 0.00 (.00) MAX (0.0.0) (0.0 0.) 0 NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS 0. (.) (..) ( ) 0.0 ± 0.0 (.0 ± 0.) J (..) FLL LEAD OPTION CORNER LEADS OPTION ( PLCS) (0..) HALF LEAD OPTION J Package -Lead CERDIP (Narrow 0.00, Hermetic) (LTC DWG # 0-0-) 0.00 (0.) 0.0 (0.) RAD TYP 0.0 (.) MAX (.0.0) 0.00 BSC (0. BSC) 0.00 (.00) MAX (0.0.0) (0.0 0.) 0 NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS 0. (.) (..) ( ) 0.0 ± 0.0 (.0 ± 0.) J

9 PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted. N Package -Lead PDIP (Narrow 0.00) (LTC DWG # 0-0-0) 0.0* (.) MAX 0. ± 0.0* (. ± 0.) (.0.) 0. ± 0.00 (.0 ± 0.) (..) (0. 0.) ( ) 0.00 (0.0) 0. (.) 0.0 ± 0.0 (.0 ± 0.) *THESE DIMENSIONS DO NOT INCLDE MOLD FLASH OR PROTRSIONS. MOLD FLASH OR PROTRSIONS SHALL NOT EXCEED 0.0 INCH (0.mm) 0.0 (.) TYP 0.0 ± 0.00 (0. ± 0.0) N N Package -Lead PDIP (Narrow 0.00) (LTC DWG # 0-0-0) 0.00* (.0) MAX 0. ± 0.0* (. ± 0.) (.0.) 0. ± 0.00 (.0 ± 0.) (..) (0. 0.) ( ) 0.00 (0.0) 0. (.) *THESE DIMENSIONS DO NOT INCLDE MOLD FLASH OR PROTRSIONS. MOLD FLASH OR PROTRSIONS SHALL NOT EXCEED 0.0 INCH (0.mm) 0.00 (0.) 0.0 ± 0.0 (.0 ± 0.) 0.0 (.) TYP 0.0 ± 0.00 (0. ± 0.0) N

10 PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted. SW Package -Lead Plastic Small Outline (Wide 0.00) (LTC DWG # 0-0-) 0. 0.* (..0) NOTE (.00.) 0. 0.** (..) (0. 0.) (..) (0.0.) 0 TYP (0. 0.0) 0.00 (.0) TYP (0. 0.) TYP NOTE (0.0.0) NOTE:. PIN IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANFACTRING OPTIONS. THE PART MAY BE SPPLIED WITH OR WITHOT ANY OF THE OPTIONS * DIMENSION DOES NOT INCLDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.00" (0.mm) PER SIDE ** DIMENSION DOES NOT INCLDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.0" (0.mm) PER SIDE (0. 0.0) S (WIDE) 0

11 PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted. SW Package -Lead Plastic Small Outline (Wide 0.00) (LTC DWG # 0-0-) 0. 0.* (..0) SEE NOTE (.00.) 0. 0.** (..) (0. 0.) (..) (0.0.) 0 TYP (0. 0.0) NOTE (0.0.0) 0.00 (.0) TYP (0. 0.) TYP NOTE:. PIN IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANFACTRING OPTIONS. THE PART MAY BE SPPLIED WITH OR WITHOT ANY OF THE OPTIONS * DIMENSION DOES NOT INCLDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.00" (0.mm) PER SIDE ** DIMENSION DOES NOT INCLDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.0" (0.mm) PER SIDE (0. 0.0) S (WIDE) 0 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

12 TYPICAL APPLICATIO Supporting an LT (Triple Driver/Receiver) SHTDOWN V V CC LT0 V CC LT TTL INPT RS OTPT TTL INPT RS OTPT TTL INPT RS OTPT TTL INPT RS OTPT TTL INPT RS OTPT TTL OTPT k RS INPT TTL OTPT 0k RS INPT TTL OTPT *C C + C C + C GND k RS INPT TTL OTPT TTL OTPT GND RS INPT 0k RS INPT 0k 0/ TA0 *IN APPLICATIONS WHERE A SEPARATE SECOND POSITIVE SPPLY IS AVAILABLE (SCH AS V AND V), THE V SPPLY MAY BE CONNECTED TO PIN AND C DELETED. THE POWER SPPLY CIRCITRY WILL THEN INVERT THE V SPPLY. THE V SPPLY IS STILL NEEDED TO POWER THE BIASING CIRCITRY AND S. RELATED PARTS PART NMBER DESCRIPTION COMMENTS LT0A/LTA V Low Power DR/TX RS Transceiver 0. Capacitors, kv ESD LT0/LT V Low Power DR/TX RS Transceiver kv ESD LT V Low Power DR/TX RS Transceiver -Pin Narrow SO Package LT0A/LT0A V RS Transceivers p to DR/RX LTC V Low Power DR/RX RS Transceiver Low Supply Current I CC = 0µA LTC.V Low Power EIA/TIA Transceiver Low Supply Current I CC = 00µA Linear Technology Corporation McCarthy Blvd., Milpitas, CA 0-0fd LT/TP 000 K REV D PRINTED IN SA (0)-00 FAX: (0) LINEAR TECHNOLOGY CORPORATION

DESCRIPTION FEATURES APPLICATIONS TYPICAL APPLICATION. LT1039A/LT1039A-16 Triple RS232 Driver/Receiver with Shutdown

DESCRIPTION FEATURES APPLICATIONS TYPICAL APPLICATION. LT1039A/LT1039A-16 Triple RS232 Driver/Receiver with Shutdown FEATRES On-Chip ESD Protection: ±15kV Human Body Model ±15kV IEC-00-4-2 Air Gap Test** ±8kV IEC-00-4-2 Contact Test 125kBd Operation with 3kΩ/2500pF Load 250kBd Operation with 3kΩ/00pF Load Operates from