FEATURES DESCRIPTIO APPLICATIO S TYPICAL APPLICATIO. LT1024 Dual, Matched Picoampere, Microvolt Input, Low Noise Op Amp

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1 FEATURES Guaranteed Offset Voltage: 5µV Max Guaranteed Bias Current: 5 C: pa Max 55 C to 5 C: 7pA Max Guaranteed Drift:.5µV/ C Max Low Noise,.Hz to Hz:.5µV P-P Guaranteed Supply Current: 6µA Max Guaranteed CMRR: db Min Guaranteed PSRR: db Min Guaranteed Voltage Gain with 5mA Load Current Guaranteed Matching Characteristics APPLICATIO S U Strain Gauge Signal Conditioner Dual Limit Precision Threshold Detection Charge Integrators Wide Dynamic Range Logarithmic Amplifiers Light Meters Low Frequency Active Filters Standard Cell Buffers Thermocouple Amplifiers, LTC and LT are registered trademarks of Linear Technology Corporation. LT Dual, Matched Picoampere, Microvolt Input, Low Noise Op Amp DESCRIPTIO U The LT dual, matched internally compensated universal precision operational amplifier can be used in practically all precision applications requiring multiple op amps. The LT combines picoampere bias currents (which are maintained over the full 55 C to 5 C temperature range), microvolt offset voltage (and low drift with time and temperature), low voltage and current noise and low power dissipation. Extremely high common mode and power supply rejection ratios, practically immeasurable warm-up drift, and the ability to deliver 5mA load current with a voltage gain of a million, round out the LT s superb precision specifications. Tight matching is guaranteed on offset voltage, noninverting bias currents and common mode and power supply rejections. The all-around excellence of the LT eliminates the necessity of the time-consuming error analysis procedure of precision system design in many dual applications; the LT can be stocked as the universal dual op amp in the -pin DIP configuration. For a single op amp with similar specifications, see the LT data sheet; for a single supply dual precision op amp in the 8-pin configuration, see the LT data sheet. TYPICAL APPLICATIO U Two Op Amp Instrumentation Amplifier Input Bias Current vs Temperature R5.k R k INPUTS R* k R k / LT R k / LT 6 OUTPUT INPUT BIAS CURRENT (pa) 5 5 UNDERCANCELLED UNIT OVERCANCELLED UNIT ( R R ) GAIN = R R R ~ R R R R5 TYPICAL PERFORMANCE: OFFSET VOLTAGE = µv BIAS CURRENT = ±pa OFFSET CURRENT = pa TEMPERATURE ( C) * TRIM FOR COMMON-MODE REJECTION TRIM FOR GAIN LT TA LTC TA

2 LT ABSOLUTE AXI U RATI GS W W W (Note ) Supply Voltage... ±V Differential Input Current (Note )... ±ma Input Voltage... ±V Output Short Circuit Duration... Indefinite Operating Temperature Range LTAM/LTM (OBSOLETE)...55 C to 5 C LTAC/LTC... C to 7 C Storage Temperature Range C to 5 C Lead Temperature (Soldering, sec)... C U U U W PACKAGE/ORDER I FOR ATIO NULL (A) NULL (A) IN (A) IN (A) V (B) OUT (B) V (B) TOP VIEW A V (A) OUT (A) V (A) IN (B) IN (B) 9 NULL (B) 8 NULL (B) N PACKAGE -PIN PDIP T JMAX = C, θ JA = C/W, θ JC = 6 C/W (N) NOTE: DEVICE MAY BE OPERATED EVEN IF INSERTION IS REVERSED; THIS IS DUE TO INHERENT SYMMETRY OF PIN LOCATIONS OF AMPLIFIERS A AND B (NOTE ) D PACKAGE -PIN SIDE BRAZED (HERMETIC) T JMAX = 5 C, θ JA = C/W, θ JC = 6 C/W (D) B ORDER PART NUMBER LTACN LTCN ORDER PART NUMBER ELECTRICAL CHARACTERISTICS Individual Amplifiers. V S = ±5V, V CM = V, unless otherwise noted. LTAMD LTMD OBSOLETE PACKAGE Consider the N Package as an Alternate Source Consult LTC Marketing for parts specified with wider operating temperature ranges. LTOAM/LTOAC LTM/LTOC SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS V OS Input Offset Voltage 5 5 µv Long Term Input Offset Voltage Stability.. µv/month I OS Input Offset Current 5 8 pa I B Input Bias Current ±5 ± ± ± pa e n Input Noise Voltage.Hz to Hz.5.5 µv P-P e n Input Noise Voltage Density f O = Hz (Note ) 7 7 nv/ Hz f O = Hz (Note ) nv/ Hz i n Input Noise Current Density f O = Hz fa/ Hz A VOL Large-Signal Voltage Gain V OUT = ±V, R L kω 5 8 V/mV V OUT = ±V, R L kω 5 V/mV CMRR Common Mode Rejection Ratio V CM = ±.5V 8 db PSRR Power Supply Rejection Ratio V S = ±V to ±V 8 db Input Voltage Range ±.5 ±. ±.5 ±. V V OUT Output Voltage Swing R L = kω ± ± ± ± V Slew Rate.... V/µs I S Supply Current per Amplifier µa

3 ELECTRICAL CHARACTERISTICS Matching Specifications. V S = ±5V, V CM = V, unless otherwise noted. LT LTAM/LTAC LTOM /LTOC SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS Input Offset Voltage Match µv I B Average Noninverting Bias ± ±5 ± ±5 pa Current I OS Noninverting Offset Current 5 pa CMRR Common Mode Rejection Ratio V CM = ±.5V 6 db Match PSRR Power Supply Rejection Ratio V S = ±V to V 6 db Match Channel Separation f Hz (Note ) 5 5 db Individual Amplifiers. The denotes the specifications which apply over the full operating temperature range of C T A = 7 C for the LTAC and LTC; 55 C T A 5 C for the LTAM and LTM. V S = ±5V, V CM = V, unless otherwise noted. LTAM/LTAC LTM/LTC SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS V OS Input Offset Voltage C to 7 C 5 µv 55 C to 5 C 5 µv Average Temperature Coefficient of µv/ C Input Offset Voltage I OS Input Offset Current C to 7 C 5 5 pa 55 C to 5 C pa Average Temperature Coefficient of pa/ C Input Offset Current I B Input Bias Current C to 7 C ± ±5 ±5 ± pa 55 C to 5 C ± ±7 ± ± pa Average Temperature Coefficient of C to 7 C..5 pa/ C Input Bias Current 55 C to 5 C 6 pa/ C A VOL Large-Signal Voltage Gain V OUT = ±V, R L kω 5 5 V/mV V OUT = ±V, R L kω 6 6 V/mV CMRR Common Mode Rejection Ratio V CM = ±.5V db PSRR Power Supply Rejection Ratio V S = ±.5V to ±8V db Input Voltage Range ±.5 ±.5 V V OUT Output Voltage Swing R L = kω ± ± ± ± V I S Supply Current 8 9 µa

4 LT ELECTRICAL CHARACTERISTICS Matching Specifications. The denotes the specifications which apply over the temperature range of C T A = 7 C for the LTAC and LTC; 55 C T A 5 C for the LTAM and LTM, V S = ±5V, V CM = V unless otherwise noted. LTAM/LTAC LTM/LTC SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS Input Offset Voltage Match C to 7 C µv 55 C to 5 C µv Input Offset Voltage Tracking...5 µv/ C I B Average Noninverting Bias Current C to 7 C ± ± ±5 ±5 pa 55 C to 5 C ± ±8 ± ± pa I OS Noninverting Offset Current C to 7 C 5 5 pa 55 C to 5 C pa CMRR Common Mode Rejection Ratio Match V CM = ±.5V db PSRR Power Supply Rejection Ratio Match V S = ±.5V to ±8V db Note : Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note : Differential input voltages greater than V will cause excessive current to flow through the input protection diodes unless limiting resistance is used. Note : The V supply terminals are completely independent and may be powered by separate supplies if desired (this approach, however, would sacrifice the advantages of the power supply rejection ratio matching). The V supply terminals are both connected to the common substrate and must be tied to the same voltage. Both V pins should be used. Note : This parameter is tested on a sample basis only. (8) (9) Optional Offset Nulling Circuit 5k TO k POT (7) () / LT OUTPUT (6) () (5) V V INPUT OFFSET VOLTAGE CAN BE ADJUSTED OVER A ±8µV RANGE WITH A 5k TO k POTENTIOMETER LT EC TYPICAL PERFOR A CE CHARACTERISTICS UW INPUT OFFSET VOLTAGE (µv) Offset Voltage vs Source Resistance (Balanced or Unbalanced) V S = ±5V 55 C TO 5 C 5 C INPUT OFFSET CURRENT (pa) 6 5 Input Offset Current vs Temperature V S = ±5V V CM = V k k k k k k M M M SOURCE RESISTANCE (Ω) TEMPERATURE ( C) LT TPC LT TPC

5 LT TYPICAL PERFOR A CE CHARACTERISTICS UW Input Bias Current Over Common Mode Range Warm-Up Drift Offset Voltage Drift and Tracking with Temperatures of Representative Units INPUT BIAS CURRENT (pa) V S = ±5V DEVICE WITH POSITIVE INPUT CURRENT R IN CM = x Ω DEVICE WITH NEGATIVE INPUT CURRENT COMMON MODE INPUT VOLTAGE (V) I B V CM CHANGE IN OFFSET VOLTAGE (µv) 5 V S = ±5V 5 TIME AFTER POWER ON (MINUTES) OFFSET VOLTAGE (µv) V S = ±5V INDIVIDUAL AMPLIFIERS TRACKING (MATCH DRIFT) TEMPERATURE ( C) LT TPC LT TPC LT TPC5 SUPPLY CURRENT (µa) 5 Supply Current vs Supply Voltage per Amplifier.Hz to Hz Noise Noise Spectrum 5 C 5 C 55 C ± 5 ± ±5 SUPPLY VOLTAGE (V) ± NOISE VOLTAGE nv/division V S ±V TO ± V 6 8 TIME (SECONDS) VOLTAGE NOISE DENSITY (nv/ Hz) CURRENT NOISE DENSITY (fa/ Hz) V S ± TO ±V CURRENT NOISE /f CORNER.5Hz VOLTAGE NOISE /f CORNER Hz FREQUENCY (Hz) LT TPC6 LT TPC7 LT TPC8 TOTAL NOISE DENSITY (µv/ Hz)... Total Noise vs Source Resistance V S = ±V TO ±V R R R S = R AT Hz AT khz AT Hz AT khz RESISTOR NOISE ONLY SOURCE RESISTANCE (Ω) 8 COMMON MODE REJECTION RATIO (db) 8 6 Common Mode Rejection and CMRR Match vs Frequency V S = ±5V CMRR MATCH ( CMRR) k k k M FREQUENCY (Hz) POWER SUPPLY REJECTION RATIO (db) 8 6. Power Supply Rejection vs Frequency POSITIVE SUPPLY V S = ±5V NEGATIVE SUPPLY k k k M FREQUENCY (Hz) LT TPC9 LT TPC LT TPC 5

6 LT TYPICAL PERFOR A CE CHARACTERISTICS UW CHANNEL SEPARATION (db) Channel Separation vs Frequency R S = Ω R S = k V S = ±5V R S = Ω VOLTAGE GAIN (db) 8 6 Voltage Gain vs Frequency V S = ±5V 8 k k k M FREQUENCY (Hz) LT TPC.. k k k M M FREQUENCY (Hz) LT TPC GAIN (db) Gain, Phase Shift vs Frequency GAIN PHASE MARGIN = 7 C V S = ±5V PHASE 6 8 PHASE SHIFT (DEGREES) VOLTAGE GAIN M M M k Voltage Gain vs Load Resistance V S = ±5V V = ±V 55 C 5 C 5 C.. FREQUENCY (MHz) k 5 LOAD RESISTANCE (kω) LT TPC LT TPC5 Small-Signal Transient Response Small-Signal Transient Response Large-Signal Transient Response mv/division mv/division V/DIVISION A V = C LOAD = pf 5µs/DIV A V = C LOAD = pf 5µs/DIV A V = µs/div 6

7 LT APPLICATIO S I FOR ATIO U W U U The LT may be inserted directly into OP-, OP-7 or P7 sockets with or without removal of external nulling components. The LT is specified over a wide range of power supply voltages from ±V to ±8V. Operation with lower supplies is possible down to ±.V (two NiCad batteries). Advantages of Matched Dual Op Amps In many applications, the performance of a system depends on the matching between two operational amplifiers rather than the individual characteristics of the two op amps. Two or three op amp instrumentation amplifiers, tracking voltage references, and low drift active filters are some of the circuits requiring matching between two op amps. The well-known triple op amp configuration illustrates these concepts. Output offset is a function of the difference between the offsets of the two halves of the LT. This error cancellation principle holds for a considerable number of input-referred parameters in addition to offset voltage and its drift with temperature. Input bias current will be the average of the two noninverting input currents (I B ). The difference between these two currents (I OS ) is the offset current of the instrumentation amplifier. Common mode and power supply rejections will be dependent only on the match between the two amplifiers (assuming perfect resistor matching). The concepts of common mode and power supply rejection ratio match ( CMRR and PSRR) are best demonstrated with a numerical example: Assume CMRR A =.µv/v or db and CMRR B =.5µV/V or 6dB, then CMRR =.5µV/V or 6dB if CMRR B =.5µV/V, which is still 6dB, then CMRR =.5µV/V or 6.5dB. Typical performance of the instrumentation amplifier: Input offset voltage = 5µV. Input bias current = pa. Input resistance = Ω. Input offset current = pa. Input noise =.7µV P-P. Power bandwidth (V O = ±V) = 8kHz. Clearly, the LT, by specifying and guaranteeing all of these matching parameters, can significantly improve the performance of matching dependent circuits. Three Op Amp Instrumentation Amplifier 5V INPUT A / LT 5V R k % R.k % R8 Ω R Ω % C pf R k R6 k % 5V 7 LT7 6 OUTPUT INPUT 5V 7 B / LT 5 6 R k % R5 Ω % R7 9.76k % 5V GAIN = 5V TRIM R8 FOR GAIN TRIM R9 FOR DC COMMON MODE REJECTION TRIM R FOR AC COMMON MODE REJECTION R9 5Ω LT AI 7

8 LT APPLICATIO S I FOR ATIO Achieving Picoampere/Microvolt Performance In order to realize the picoampere/microvolt level accuracy of the LT, proper care must be exercised. For example, leakage currents in circuitry external to the op amp can significantly degrade performance. High quality insulation should be used (e.g., Teflon, Kel-F); cleaning of all insulating surfaces to remove fluxes and other residues will probably be required. Surface coating may be necessary to provide a moisture barrier in high humidity environments. Board leakage can be minimized by encircling the input circuitry with a guard ring operated at a potential close to that of the inputs: in inverting configurations, the guard ring should be tied to ground; in noninverting connections, to the inverting input. Guarding both sides of the printed circuit board is required. Bulk leakage reduction depends on the guard ring width. Nanoampere level leakage into the offset trim terminals can affect offset voltage and drift with temperature. Teflon is a trademark of Dupont. U W U U Microvolt level error voltages can also be generated in the external circuitry. Thermocouple effects, caused by temperature gradients across dissimilar metals at the contacts to the input terminals, can exceed the inherent drift of the amplifier. Air currents over device leads should be minimized, package leads should be short, and the two input leads should be as close together as possible and maintained at the same temperature. Test Circuit for Offset Voltage and its Drift with Temperature R 5k* R Ω* R 5k* () () 5V (7) LT (5) 5V V (6) * RESISTORS MUST HAVE LOW THERMOELECTRIC POTENTIAL ** THIS CIRCUIT IS ALSO USED AS THE BURN-IN CONFIGURATION FOR THE LT. WITH SUPPLY VOLTAGES INCREASED TO ±V, R = R = k, R = Ω, AV = V O = V S LT AI 8

9 LT APPLICATIO S I FOR ATIO U W U U Direct Pressure Transducer to Digital Output Signal Conditioner Ω 5V LT k 5V N9 6Ω 5V 5V TRANSDUCER ZERO k µf 5V k* 5k GAIN TRIM 8k 6k* k N8.µF 5V 7 LT 5 5V 6 f CLK ~ khz.7µf OUT B k k CLK Q D 7C7 Q PRE CLR 5V k OUT A OUTPUT = f OUT A/f OUT B 5V V IN ADJ LT7A OUT k* * % METAL FILM RESISTOR GATES = 7C ** TRANSDUCER = BLH # DHF- PSI PRESSURE TRANSDUCER PSI = COUNTS FULL-SCALE AT CIRCUIT OUTPUT 5V N979 k k N9 5V k LT AI 9

10 LT SCHE ATIC DIAGRA W W / LT TRIM TRIM (8) (9) 8Ω 8Ω.k.k V (7) k k Q Q Q Q7 Q8 k Q Q9.5k Q5 Q6 pf Q Q5 Q7 Q7 Q Q Q6 Q s Q Q Q k Q.5k Ω Ω Ω OUTPUT (6) INPUT () INPUT () V s Q Q9 Q s Q Q7.k s Q5 5k.5k Q Q Q9 Q8 Q9.k.k Q.8k J Q Q 6k Q5 k.k Q8 Q8 Q6 Q6 Q Q Ω Ω Ω Q (5) LT * SD

11 LT PACKAGE DESCRIPTIO U D Package -Lead Side Brazed (Hermetic) (Reference LTC DWG # 5-8-).5 (.7) MIN.76 (9.) MAX 9 8 PIN NO. IDENT (7.66) TYP..6 (.58.5).85 (.9) MAX.65 (.9) MAX.8.5 (..8). (7.6) REF.5 (.75) MIN. (.5) BSC.5. (.8.58).5 (.7) TYP D 8 OBSOLETE PACKAGE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

12 LT PACKAGE DESCRIPTIO U N Package -Lead PDIP (Narrow. Inch) (Reference LTC DWG # 5-8-5).77* (9.558) MAX ±.5* (6.77 ±.8) ( ). ±.5 (. ±.7).5.65 (..65).8.5 (..8) ( ). (.58) MIN. (.8) MIN.5 (.5) MIN NOTE: INCHES. DIMENSIONS ARE MILLIMETERS *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED. INCH (.5mm). (.5) BSC.65 (.65) TYP.8 ±. (.57 ±.76) N RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT88 Picoamp Input, Precision Op Amp Rail-to-Rail Output Linear Technology Corporation 6 McCarthy Blvd., Milpitas, CA (8) -9 FAX: (8) LW/TP K REV A PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 988

13 This datasheet has been download from: Datasheets for electronics components.

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