MIC7300 A17. General Description. Features. Applications. Ordering Information. Pin Configurations. Functional Configuration.

Size: px

Start display at page:

Download "MIC7300 A17. General Description. Features. Applications. Ordering Information. Pin Configurations. Functional Configuration."

Amberlynn Daniels
6 years ago
Views:

1 MIC7300 High-Output Drive Rail-to-Rail Op Amp General Description The MIC7300 is a high-performance CMOS operational amplifier featuring rail-to-rail input and output with strong output drive capability. It is able to source and sink in excess of 80mA into large capacitive loads. The input common-mode range extends beyond the rails by 300mV, and the output voltage typically swings to within 50µV of both rails when driving a 00kΩ load. The amplifier operates from.v to 0V and is fully specified at.v, 3V, 5V, and 0V. Gain bandwidth and slew rate are 500kHz and 0.5V/µs, respectively. The MIC7300 is available in s IttyBitty SOT-3-5 package for space-conscious circuits and in high-power MM8 8-lead MSOP for improved heat dissipation in higher power applications. Pin Configurations IN+ 3 V A7 OUT Part Identification Features Small footprint SOT-3-5 and power MSOP-8 packages >80mA peak output sink and source with 5V supply Drives large capacitive loads (6000pF with 0V supply) Guaranteed.V, 3V, 5V, and 0V performance 500kHz gain-bandwidth product 0.0% total harmonic distortion at khz (0V, kω) ma typical power supply current at 5V Applications Battery-powered instrumentation PCMCIA, USB peripherals Portable computers and PDAs Ordering Information Part Number Standard Pb-free Temp. Range Package MIC7300BM5 MIC7300YM5 40 C to +85 C SOT-3-5 MIC7300BMM MIC7300YMM 40 C to +85 C MSOP IN SOT-3-5 (M5) Functional Configuration 8 V IN+ 3 V OUT IN 7 V Pin Description IN+ 3 6 OUT 4 5 MSOP-8 (MM) V V 4 5 IN SOT-3-5 (M5) Pin Number Pin Number Pin Name Pin Function SOT-3-5 MSOP-8 4 OUT Amplifier Output 5 8 V Negative Supply: Negative supply for split supply application or ground for single supply application. 3 3 IN+ Noninverting Input 4 IN Inverting Input 5 Positive Supply IttyBitty and MM8 are trademarks of, Inc., Inc. 80 Fortune Drive San Jose, CA 953 USA tel + (408) fax + (408) June 005 MIC7300

2 Absolute Maximum Ratings (Note ) Supply Voltage (V V V )... V Differential Input Voltage (V IN+ V IN )...±V I/O Pin Voltage (V IN, ), Note 3... V + 0.3V to V V 0.3V Junction Temperature (T J ) C Storage Temperature C to +50 C Lead Temperature (soldering, 0 sec.) C ESD, Note 6 Operating Ratings (Note ) Supply Voltage (V V V )....V to 0V Junction Temperature (T J ) C to +85 C Package Thermal Resistance, Note 5 SOT-3-5 (θ JA ) C/W MSOP-8 (θ JA ) C/W Max. Power Dissipation... Note 4 DC Electrical Characteristics (.V) V = +.V, V V = 0V, V CM = = V /; R L = MΩ; T J = 5 C, bold values indicate 40 C T J +85 C; Note 7; unless noted V OS Input Offset Voltage.0 9 mv TCV OS Input Offset Voltage Average Drift.0 µv/ C I B Input Bias Current 0.5 pa I OS Input Offset Current 0.5 pa R IN Input Resistance > TΩ CMRR Common-Mode Rejection Ratio 0V V CM.V, Note db V CM Input Common-Mode Voltage input low, CMRR 45dB V input high, CMRR 45dB..5 V ±PSRR Power Supply Rejection Ratio V = V V =.V to.5v, V CM = db C IN Common-Mode Input Capacitance 3 pf V O Output Swing output high, R L = 00k, 0.5 mv specified as V mv output low, R L = 00k 0.5 mv mv output high, R L = k 0 33 mv specified as V 50 mv output low, R L = k 0 33 mv 50 mv output high, R L = 600Ω 33 0 mv specified as V 65 mv output low, R L = 600Ω 33 0 mv 65 mv I SC Output Short Circuit Current sinking or sourcing, Note ma I S Supply Current = / ma AC Electrical Characteristics (.V) V =.V, V V = 0V, V CM = = V /; R L = MΩ; T J = 5 C, bold values indicate 40 C T J +85 C; Note 7; unless noted SR Slew Rate 0.5 V/µs GBW Gain-Bandwidth Product 0.55 MHz φ m Phase Margin C L = 0pF 80 C L = 500pF 40 G m Gain Margin 0 db MIC7300 June 005

3 DC Electrical Characteristics (3.0V) V = +3.0V, V V = 0V, V CM = = V /; R L = MΩ; T J = 5 C, bold values indicate 40 C T J +85 C; Note 7; unless noted V OS Input Offset Voltage.0 9 mv TCV OS Input Offset Voltage Average Drift.0 µv/ C I B Input Bias Current 0.5 pa I OS Input Offset Current 0.5 pa R IN Input Resistance > TΩ CMRR Common-Mode Rejection Ratio 0V V CM 3.0V, Note db V CM Input Common-Mode Voltage input low, CMRR 50dB V input high, CMRR 50dB V ±PSRR Power Supply Rejection Ratio V = V V =.5V to 5.0V, V CM = db C IN Common-Mode Input Capacitance 3 pf Output Swing output high, R L = 00k 0. mv specified as V mv output low, R L = 00k 0. mv mv output high, R L = k 0 33 mv specified as V 50 mv output low, R L = k 0 33 mv 50 mv output high, R L = 600Ω 33 0 mv specified as V 65 mv output low, R L = 600Ω 33 0 mv 65 mv I SC Output Short Circuit Current sinking or sourcing, Note ma I S Supply Current 0.8. ma AC Electrical Characteristics (3V) V = 3V, V V = 0V, V CM =.5V, = V /; R L = MΩ; T J = 5 C, bold values indicate 40 C T J +85 C; Note 7; unless noted SR Slew Rate 0.5 V/µs GBW Gain-Bandwidth Product 0.45 MHz φ m Phase Margin C L = 0pF 85 C L = 3500pF 40 G m Gain Margin 0 db June MIC7300

4 DC Electrical Characteristics (5V) V = +5.0V, V V = 0V, V CM =.5V, = V /; R L = MΩ; T J = 5 C, bold values indicate 40 C T J +85 C; Note 7; unless noted V OS Input Offset Voltage.0 9 mv TCV OS Input Offset Voltage Average Drift.0 µv/ C I B Input Bias Current 0.5 pa I OS Input Offset Current 0.5 pa R IN Input Resistance > TΩ CMRR Common-Mode Rejection Ratio 0V V CM 5V, Note db V CM Input Common-Mode Voltage input low, CMRR 55dB V input high, CMRR 55dB V ±PSRR Power Supply Rejection Ratio V = V V =.5V to 5.0V, V CM = db C IN Common-Mode Input Capacitance 3 pf Output Swing output high, R L = 00k mv specified as V.5 mv output low, R L = 00k mv.5 mv output high, R L = k 5 50 mv specified as V 75 mv output low, R L = k 5 50 mv 75 mv output high, R L = 600Ω mv specified as V 50 mv output low, R L = 600Ω mv 50 mv I SC Output Short Circuit Current sinking or sourcing, Note ma I S Supply Current = /.0.8 ma AC Electrical Characteristics (5V) V = 5V, V V = 0V, V CM =.5V, = V /; R L = MΩ; T J = 5 C, bold values indicate 40 C T J +85 C; Note 7; unless noted THD Total Harmonic Distortion f = khz, A V =, 0.05 % R L = kω, = 4.0 V PP SR Slew Rate 0.5 V/µs GBW Gain-Bandwidth Product 0.4 MHz φ m Phase Margin C L = 0pF 85 C L = 4500pF 40 G m Gain Margin 0 db MIC June 005

5 DC Electrical Characteristics (0V) V = +0V, V V = 0V, V CM =.5V, = V /; R L = MΩ; T J = 5 C, bold values indicate 40 C T J +85 C; Note 7; unless noted V OS Input Offset Voltage.0 9 mv TCV OS Input Offset Voltage Average Drift.0 µv/ C I B Input Bias Current 0.5 pa I OS Input Offset Current 0.5 pa R IN Input Resistance > TΩ CMRR Common-Mode Rejection Ratio 0V V CM 0V, Note db V CM Input Common-Mode Voltage input low, = 0V, CMRR 60dB V input high, = 0V, CMRR 60dB V ±PSRR Power Supply Rejection Ratio V = V V =.5V to 5.0V, V CM = db A V Large Signal Voltage Gain sourcing or sinking, V/mV R L = k, Note 0 sourcing or sinking, V/mV R L = 600Ω, Note 0 C IN Common-Mode Input Capacitance 3 pf Output Swing output high, R L = 00k mv specified as V.5 mv output low, R L = 00k mv.5 mv output high, R L = k 4 80 mv specified as V 0 mv output low, R L = k 4 80 mv 0 mv output high, R L = 600Ω mv specified as V 400 mv output low, R L = 600Ω mv 400 mv I SC Output Short Circuit Current sinking or sourcing, Notes ma I S Supply Current = / ma AC Electrical Characteristics (0V) V = 0V, V V = 0V, V CM =.5V, = V /; R L = MΩ; T J = 5 C, bold values indicate 40 C T J +85 C; Note 7; unless noted THD Total Harmonic Distortion f = khz, A V =, 0.0 % R L = k, = 8.5 V PP SR Slew Rate = 0V, Note 0.5 V/µs V/µs GBW Gain-Bandwidth Product 0.37 MHz φ m Phase Margin C L = 0pF 85 C L = 6000pF 40 G m Gain Margin 0 db e n Input-Referred Voltage Noise f = khz, V CM = V 37 nv/ Hz i n Input-Referred Current Noise f = khz.5 fa/ Hz June MIC7300

6 Note. Note. Note 3. Note 4. Note 5. Note 6. Note 7. Note 8. Note 9. Exceeding the absolute maximum rating may damage the device. The device is not guaranteed to function outside its operating rating. I/O Pin Voltage is any external voltage to which an input or output is referenced. The maximum allowable power dissipation is a function of the maximum junction temperature, T J(max) ; the junction-to-ambient thermal resistance, θ JA ; and the ambient temperature, T A. The maximum allowable power dissipation at any ambient temperature is calculated using: P D = (T J(max) T A ) θ JA. Exceeding the maximum allowable power dissipation will result in excessive die temperature. Thermal resistance, θ JA, applies to a part soldered on a printed-circuit board. Devices are ESD protected; however, handling precautions are recommended. All limits guaranteed by testing or statistical analysis. Continuous short circuit may exceed absolute maximum T J under some conditions. CMRR is determined as follows: The maximum V OS over the V CM range is divided by the magnitude of the V CM range. The measurement points are: V V, (V V V )/, and V. Note 0. R L connected to 5V. Sourcing: 5V 0V. Sinking:.5V 5V. Note. Device connected as a voltage follower with a 0V step input. The value is the positive or negative slew rate, whichever is slower. MIC June 005

7 Typical Characteristics 0000 Input Current vs. Junction Temperature T A = 5 C INPUT CURRENT (pa) JUNCTION TEMPERATURE ( C) CURRENT SINK / SOURCE (ma) Sink / Source Currents vs. Output Voltage T A = 5 C OUTPUT VOLTAGE (V) LOAD CAPACITANCE (pf) Capacitive Load Capability vs. Supply Voltage T A = 5 C SUPPLY VOLTAGE (V) June MIC7300

8 Application Information Input Common-Mode Voltage The MIC7300 tolerates input overdrive by at least 300mV beyond either rail without producing phase inversion. If the absolute maximum input voltage is exceeded, the input current should be limited to ±5mA maximum to prevent reducing reliability. A 0kΩ series input resistor, used as a current limiter, will protect the input structure from voltages as large as 50V above the supply or below ground. See Figure. V IN R IN 0kΩ Figure. Input Current-Limit Protection Output Voltage Swing Sink and source output resistances of the MIC7300 are equal. Maximum output voltage swing is determined by the load and the approximate output resistance. The output resistance is: R OUT = V I DROP LOAD V DROP is the voltage dropped within the amplifier output stage. V DROP and I LOAD can be determined from the V O (output swing) portion of the appropriate Electrical Characteristics table. I LOAD is equal to the typical output high voltage minus / and divided by R LOAD. For example, using the Electrical Characteristics DC (5V) table, the typical output high voltage using a kω load (connected to /) is 4.985V, which produces an I LOAD of: 4.985V.5V =.43mA. kω Voltage drop in the amplifier output stage is: V DROP = 5.0V 4.985V V DROP = 0.05V Because of output stage symmetry, the corresponding typical output low voltage (0.05V) also equals V DROP. Then: 0.05V ROUT = A = Ω Power Dissipation The MIC7300 output drive capability requires considering power dissipation. If the load impedance is low, it is possible to damage the device by exceeding the 5 C junction temperature rating. On-chip power consists of two components: supply power and output stage power. Supply power (P S ) is the product of the supply voltage (V S = V V V ) and supply current (I S ). Output stage power (P O ) is the product of the output stage voltage drop (V DROP ) and the output (load) current (I OUT ). Total on-chip power dissipation is: P D = P S + P O P D = V S I S + V DROP I OUT where: P D = total on-chip power P S = supply power dissipation P O = output power dissipation V S = V V V I S = power supply current V DROP = V (sourcing current) V DROP = V V (sinking current) The above addresses only steady state (dc) conditions. For non-dc conditions the user must estimate power dissipation based on rms value of the signal. The task is one of determining the allowable on-chip power dissipation for operation at a given ambient temperature and power supply voltage. From this determination, one may calculate the maximum allowable power dissipation and, after subtracting P S, determine the maximum allowable load current, which in turn can be used to determine the miniumum load impedance that may safely be driven. The calculation is summarized below. T = T J(max) A PD(max) θja θ JA(SOT-3-5) = 60 C/W θ JA(MSOP-8) = 85 C/W Driving Capacitive Loads Driving a capacitive load introduces phase-lag into the output signal, and this in turn reduces op-amp system phase margin. The application that is least forgiving of reduced phase margin is a unity gain amplifier. The MIC7300 can typically drive a 500pF capacitive load connected directly to the output when configured as a unity-gain amplifier and powered with a.v supply. At 0V operation the circuit typically drives 6000pF. Phase margin is typically 40. Using Large-Value Feedback Resistors A large-value feedback resistor (> 500kΩ) can reduce the phase margin of a system. This occurs when the feedback resistor acts in conjunction with input capacitance to create phase lag in the feedback signal. Input capacitance is usually a combination of input circuit components and other parasitic capacitance, such as amplifier input capacitance and stray printed circuit board capacitance. Figure illustrates a method of compensating phase lag caused by using a large-value feedback resistor. Feedback capacitor C FB introduces sufficient phase lead to overcome MIC June 005

9 the phase lag caused by feedback resistor R FB and input capacitance C IN. The value of C FB is determined by first estimating C IN and then applying the following formula: R IN C IN R FB CFB V IN 0V to 3 4.V to 0V 5 MIC7300 0V to C FB = V IN R FB R IN Figure 4. Voltage Follower/Buffer V IN C IN V S 0.5V to Q V CEO(sus) Figure. Cancelling Feedback Phase Lag Since a significant percentage of C IN may be caused by board layout, it is important to note that the correct value of C FB may change when changing from a breadboard to the final circuit layout. Typical Circuits Some single-supply, rail-to-rail applications for which the MIC7300 is well suited are shown in the circuit diagrams of Figures 3 through 7..V to 0V 3 5 V IN 0V to A V 4 R 90k R 00k MIC7300 0V to Figure 3a. Noninverting Amplifier V IN 0V to V 3 4.V to 0V 5 MIC7300 Change Q and R S for higher current and/or different gain. V IOUT = IN = RS Load I OUT Q N3904 R S 0Ω W 00mA/V as shown 0V to { V CEO = 40V I C(max) = 00mA Figure 5. Voltage-Controlled Current Sink C 0.00µF R 00k 4 3 R4 00k 5 R4 00k R3 00k MIC7300 0V 00 Figure 6. Square Wave Oscillator (V) A R V = + R 0 C IN R 33k 4 R 330k 5 MIC7300 C OUT 0 0 V 00 IN (V) 3 R L 0V Figure 3b. Noninverting Amplifier Behavior R3 330k C µf R4 330k R 330k A V = R = 33k = 0 Figure 7. AC-Coupled Inverting Amplifier June MIC7300

10 Package Information.90 (0.075) REF 0.95 (0.037) REF.75 (0.069).50 (0.059) 3.00 (0.8).60 (0.0) 3.0 (0.9).80 (0.0).30 (0.05) 0.90 (0.035) 0 0 DIMENSIONS: MM (INCH) 0.0 (0.008) 0.09 (0.004) 0.50 (0.00) 0.35 (0.04) 0.5 (0.006) 0.00 (0.000) SOT-3-5 (M5) 0.60 (0.04) 0.0 (0.004) 0. (3.0) 0. (.84) 0.99 (5.05) 0.87 (4.74) DIMENSIONS: INCH (MM) (0.90) 0.03 (0.8) 0.0 (3.05) 0.6 (.95) (.09) (0.97) 0.0 (0.30) R (0.8) (0.3) 0.0 (0.03) (0.65) TYP (0.0) (0.0) 8-Pin MSOP (MM) 5 MAX 0 MIN 0.0 (0.03) R (0.99) (0.89) 0.0 (0.53) MIC June 005

11 June 005 MIC7300

12 MICREL INC. 80 FORTUNE DRIVE SAN JOSE, CA 953 USA TEL + (408) FAX + (408) WEB This information is believed to be accurate and reliable, however no responsibility is assumed by for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Inc. 005 Incorporated MIC7300 June 005

MIC7122. General Description. Features. Applications. Ordering Information. Pin Configuration. Pin Description. Rail-to-Rail Dual Op Amp

MIC7122. General Description. Features. Applications. Ordering Information. Pin Configuration. Pin Description. Rail-to-Rail Dual Op Amp MIC722 Rail-to-Rail Dual Op Amp General Description The MIC722 is a dual high-performance CMOS operational amplifier featuring rail-to-rail inputs and outputs. The input common-mode range extends beyond