LTC3221/ LTC /LTC Micropower, Regulated Charge Pump in 2 2 DFN FEATURES

Transcription

1 LTC3/ Micropower, Regulated Charge Pump in DFN FEATURES Ultralow Power: µa Quiescent Current Regulated Output Voltages: 3.3V ±%, V ±%, ADJ V IN Range:.V to.v (LTC3-3.3).7V to.v (LTC3-) Output Current: Up to ma No Inductors Needed Very Low Shutdown Current: <µa Shutdown Disconnects Load from V IN Burst Mode Control Short-Circuit Protected Solution Profile < mm Tiny mm mm -Pin DFN Package APPLICATIO S U Low Power AA Cell to 3.3V Supply Memory Backup Supplies Tire Pressure Sensors General Purpose Low Power Li-Ion to V Supply RF Transmitters Glucose Meters DESCRIPTIO U The LTC 3 family are micropower charge pump DC/DC converters that produce a regulated output at up to ma. The input voltage range is.v to.v. Extremely low operating current (µa typical at no load) and low external parts count (one fl ying capacitor and two small bypass capacitors at V IN and ) make them ideally suited for small, battery-powered applications. The LTC3 family includes fi xed V and 3.3V output versions plus an adjustable version. All parts operate as Burst Mode switched capacitor voltage doublers to achieve ultralow quiescent current. The chips use a controlled current to supply the output and will survive a continuous short-circuit from to GND. The FB pin of the adjustable LTC3 can be used to program the desired output voltage. The LTC3 family is available in a low profi le (.7mm) mm mm -pin DFN package., LT, LTC and LTM are registered trademarks of Linear Technology Corporation. Burst Mode is a registered trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATIO V IN.µF OFF ON C V IN,7 3 µf LTC3-X GND SHDN C + U 3 TA.7µF REGULATED 3.3PUT FROM.V TO.V INPUT = 3.3V ±% I OUT = OmA TO ma; V IN >.V I OUT = OmA TO ma; V IN >V REGULATED PUT FROM.7V TO.V INPUT = V ±% I OUT = OmA TO ma; V IN >.7V I OUT = OmA TO ma; V IN >3V NO-LOAD INPUT CURRENT (µa). T A = 9 C T A = C T A = C No-Load Input Current vs Supply Voltage TAb 3f

2 LTC3/ ABSOLUTE AXI U RATI GS W W W (Note ) V IN, S H D N, FB....3V to V to GND....3V to.v Short-Circuit Duration... Indefi nite Operating Temperature Range (Note ).. C to C Storage Temperature Range... C to C Maximum Junction Temperature... C U PACKAGE/ORDER I FOR ATIO W U U TOP VIEW C + C 7 V IN SHDN/FB* 3 GND ELECTRICAL CHARACTERISTICS The denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at T A = C. V IN =.V (LTC3-3.3/LTC3) or 3V (LTC3-), S H D N = V IN, C FLY = µf, C IN =.µf, C OUT =.µf, unless otherwise specifi ed. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS LTC3-3.3 V IN Input Supply Voltage.. V Output Voltage.V V IN.V, I OUT ma V V IN <.V, I OUT ma V I CC Operating Supply Current I OUT = ma µa V R Output Ripple V IN = V, I OUT = ma, C OUT =.7µF (Note 3) 3 mv P-P η Efficiency V IN = V, I OUT = ma (Note 3) % I SC Output Short-Circuit Current = V ma LTC3- V IN Input Supply Voltage.7. V Output Voltage.7V V IN.V, I OUT < ma 3V V IN.V, I OUT < ma.. V I CC Operating Supply Current I OUT = ma µa V R Output Ripple V IN = 3V, I OUT = ma, C OUT =.7µF (Note 3) mv P-P η Efficiency V IN = 3V, I OUT = ma (Note 3) % I SC Output Short-Circuit Current = V ma LTC3 V IN Input Supply Voltage.. V V FB Feedback Voltage V R OL Open-Loop Impedance V IN =.V, = 3V (Note ) Ω I CC Operating Supply Current I OUT = ma µa I FB FB Input Current FB =.33V, V IN = V na T JMAX = C, θ JA = C/W EXPOSED PAD IS GND (PIN 7) MUST BE SOLDERED TO PCB * S H D N ON LTC3-3.3;LTC3- FB ON LTC3 ORDER PART NUMBER LTC3EDC LTC3EDC-3.3 LTC3EDC- DC PART MARKING LCCP LBQP LCCN Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: Consult LTC Marketing for parts specified with wider operating temperature ranges. 3f

3 ELECTRICAL CHARACTERISTICS LTC3/ The denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at T A = C. V IN =.V (LTC3-3.3/LTC3) or 3V (LTC3-), S H D N = V IN, C FLY = µf, C IN =.µf, C OUT =.µf, unless otherwise specifi ed. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS I S H D N Shutdown Supply Current = V, S H D N = V µa V IH S H D N Input Threshold (High).3 V V IL S H D N Input Threshold (Low). V I IH S H D N Input Current (High) S H D N = V IN µa I IL S H D N Input Current (Low) S H D N = V µa LTC3/ f OSC Switching Frequency =.V khz V UVLO UVLO Threshold V Note : Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note : The LTC3EDC-X is guaranteed to meet performance specifications from C to 7 C. Specifi caiton over the C to C operating temperature range are assured by design, characterization and correlation with statisitical process controls. Note 3: Guaranteed by design, not subject to test. Note : R OL = (V IN )/I OUT. TYPICAL PERFOR A CE CHARACTERISTICS Oscillator Frequency vs Supply Voltage U W Oscillator Frequency vs Temperature.9 S H D N Threshold Voltage vs Supply Voltage FREQUENCY (khz) 7 7 FREQUENCY (khz) 7 7 V IN =.V V IN =.V V IN =.V THRESHOLD VOLTAGE (V)..7.. LOW-TO-HIGH THRESHOLD HIGH-TO-LOW THRESHOLD G 7 TEMPERATURE ( C) 3 G G3.9 S H D N LO-to-HI Threshold vs Temperature.9 S H D N HI-to-LO Threshold vs Temperature Short-Circuit Current vs Supply Voltage SHDN LO-TO-HI THRESHOLD (V)..7.. V IN = 3.V V IN =.V V IN =.V SHDN HI-TO-LO THRESHOLD (V)..7.. V IN = 3.V V IN =.V V IN =.V SHORT-CIRCUIT CURRENT (ma) T A = C T A = C T A = 9 C. 7 TEMPERATURE ( C) 3 G. 7 TEMPERATURE ( C) 3 G G 3f 3

4 LTC3/ TYPICAL PERFOR A CE CHARACTERISTICS U W (LTC3-3.3 only) OUTPUT VOLTAGE (V) Load Regulation V IN = 3.V V IN =.V V IN =.V G7 9 7 Output Load Capability at % Below Regulation = 3.V T A = C T A = 9 C T A = C G EFFECTIVE OPEN-LOOP OUTPUT RESISTANCE (Ω) V IN =.V = 3V Effective Open-Loop Output Resistance vs Temperature 7 TEMPERATURE ( C) 3 G9 NO-LOAD INPUT CURRENT (µa) No-Load Input Current vs Supply Voltage. T A = C T A = 9 C T A = C G EXCESS INPUT CURRENT (ma).... Extra Input Current vs Load Current (I IN - I LOAD ) V IN =.V. 3 G EFFICIENCY (%) Effi ciency vs Supply Voltage 9 THEORETICAL MAX 7 I OUT = 3mA I OUT = ma G 7 Output Ripple vs Load Current Output Ripple Load Transient Response OUTPUT RIPPLE (mv P-P ) 3 C OUT =.µf C OUT =.7µF mv/div (AC-COUPLED) mv/div (AC-COUPLED) ma I OUT ma µs/div V IN = V I LOAD = ma C OUT =.7µF,.3V, SIZE 3 3 G µs/div V IN = V I LOAD = ma TO ma STEP C OUT =.7µF,.3V, SIZE 3 3 G 3 G3 3f

5 LTC3/ TYPICAL PERFOR A CE CHARACTERISTICS U W (LTC3- only) OUTPUT VOLTAGE (V) Load Regulation.. V IN =.V. V IN = 3.V.9 V IN =.7V G 9 7 Output Load Capability at % Below Regulation =.V T A = 9 C T A = C T A = C G7 EFFECTIVE OPEN-LOOP OUTPUT RESISTANCE (Ω) 7 Effective Open-Loop Output Resistance vs Temperature V IN =.7V =.V TEMPERATURE ( C) 3 G NO-LOAD INPUT CURRENT (µa) No-Load Input Current vs Supply Voltage.7 T A = C T A = 9 C T A = C G9 EXCESS INPUT CURRENT (ma).... Extra Input Current vs Load Current (I IN - I LOAD ) V IN = 3V. 3 G EFFICIENCY (%) Effi ciency vs Supply Voltage 9 THEORETICAL MAX 7 I OUT = ma I OUT = 3mA G OUTPUT RIPPLE (mv P-P ) Output Ripple vs Load Current Output Ripple Load Transient Response V IN = 3V C OUT =.µf C OUT =.7µF mv/div (AC-COUPLED) µs/div V IN = 3V I LOAD = ma C OUT =.7µF,.3V, SIZE 3 3 G3 mv/div (AC-COUPLED) ma I OUT ma µs/div V IN = 3V I LOAD = ma TO ma STEP C OUT =.7µF,.3V, SIZE 3 3 G 3 G3 3f

6 LTC3/ PI FU CTIO S U U U C+ (Pin ): Flying Capacitor Positive Terminal. C (Pin ): Flying Capacitor Negative Terminal. S H D N (Pin 3) (): Active Low Shutdown Input. A low on S H D N disables the LTC3-3.3/ LTC3-. S H D N must not be allowed to float. FB (Pin 3) (LTC3): Feedback. The voltage on this pin is compared to the internal reference voltage (.3V) by the error comparator to keep the output in regulation. An external resistor divider is required between and FB to program the output voltage. GND (Pin ): Ground. Should be tied to a ground plane for best performance. V IN (Pin ): Input Supply Voltage. V IN should be bypassed with a.µf low ESR capacitor. (Pin ): Regulated Output Voltage. For best performance, should be bypassed with a.µf or higher low ESR capacitor as close as possible to the pin. Exposed Pad (Pin 7) Ground. The exposed pad must be soldered to PCB ground to provide electrical contact and optimum thermal performance. BLOCK DIAGRA W LTC3 C + C + + CMP CONTROL I SW V IN C FB 3 + CMP CONTROL I SW V IN C SHDN 3 V REF GND V REF GND 3 BD OPERATIO U (Refer to Block Diagrams) The LTC3 family uses a switched capacitor charge pump to boost V IN to a regulated output voltage. Regulation is achieved by monitoring the output voltage, using a comparator (CMP in the Block Diagram) and keeping it within a hysteresis window. If drops below the lower trip point of CMP, is charged by the controlled current, I SW in series with the flying capacitor C FLY. Once goes above the upper trip point of CMP, or if the upper trip point is not reached after.µs, C FLY is disconnected from. The bottom plate of C FLY is then connected to GND to allow I SW to replenish the charge on C FLY for.µs. After which, I SW is turned off to keep the operating supply current low. CMP continues to monitor and turns on I SW if the lower threshold is reached again. Shutdown Mode The S H D N pin is a CMOS input with a threshold voltage of approximately.v. The LTC3-3.3/ LTC3- are in shutdown when a logic low is applied to the S H D N pin. In shutdown mode, all circuitry is turned off and the LTC3-3.3/ LTC3- draw only leakage current from the V IN supply. Furthermore, is disconnected from V IN. Since the S H D N pin is a very high impedance CMOS input, it should never be allowed to fl oat. When S H D N is asserted low, the charge pump is fi rst disabled, but the continue to draw µa of supply current. This current will drop to zero when the output voltage ( ) is fully discharged to V. 3f

7 LTC3/ OPERATIO U (Refer to Block Diagrams) The LTC3 has a FB pin in place of the S H D N pin. This allows the output voltage to be programmed using an external resistive divider. Burst Mode Operation The LTC3 family regulates the output voltage throughout the full ma load range using Burst Mode control. This keeps the quiescent current low at light load and improves the efficiency at full load by reducing the switching losses. All the internal circuitry except the comparator is kept off if the output voltage is high and the flying capacitor has been fully charged. These circuits are turned on only if drops below the comparator lower threshold. At light load, stays above this lower threshold for a long period of time, this result in a very low average input current. Soft-Start and Short-Circuit Protection The LTC3 family uses a controlled current, I SW to deliver current to the output. This helps to limit the input and output current during start-up and output short-circuit condition. During start up I SW is used to charge up the flying capacitor and output capacitor, this limits the input current to approximately ma. During short-circuit condition, the output current is delivered through I SW and this limits the output current to approximately ma. This prevents excessive self-heating that causes damage to the part. APPLICATIO S I FOR Power Efficiency The input current of a doubling charge pump like the LTC3 family is always twice that of the output current. This is true regardless of whether the output voltage is unregulated or regulated or of the regulation method used. In an ideal unregulated doubling charge pump, conservation of energy implies that the input current has to be twice that of the output current in order to obtain an output voltage twice that of the input voltage. In a regulated charge pump like the LTC3, the regulation of is similar to that of a linear regulator, with the voltage difference between V IN (Input voltage plus the voltage across a fully charged flying capacitor) and being absorbed in an internal pass transistor. In the LTC3, the controlled current I SW acts as a pass transistor. So the input current of an ideal regulated doubling charge pump is the same as an unregulated one, which is equal to twice the output current. The efficiency (n) of an ideal regulated doubler is therefore given by: POUT VOUT IOUT V η= = = P V I V IN IN OUT OUT At moderate to high output power, the switching losses and quiescent current of the LTC3 family are negligible and the expression is valid. For example, an LTC3- with V IN = 3V, I OUT = ma and regulating to V, has a measured efficiency of % which is in close agreement with IN ATIO U W U U the theoretical 3.3% calculation. The LTC3 product family continues to maintain good efficiency even at fairly light loads because of its inherently low power design. Maximum Available Output Current For the adjustable LTC3, the maximum available output current and voltage can be calculated from the effective open-loop output resistance, R OL, and effective output voltage, V IN(MIN). From Figure the available current is given by: VIN VOUT IOUT = R OL Effective Open-Loop Output Resistance (R OL ) The effective open-loop output resistance(r OL ) of a charge pump is a very important parameter which determines the strength of the charge pump. The value of this parameter R OL + + V IN I OUT 3 F Figure. Equivalent Open-Loop Circuit 3f 7

8 LTC3/ APPLICATIO S I FOR ATIO U W U U depends on many factors such as the oscillator frequency (f OSC ), value of the flying capacitor (C FLY ), the nonoverlap time, the internal switch resistances (R S ) and the ESR of the external capacitors. A first order approximation for R OL is given below: R OL RS + f C S= TO OSC FLY Typical R OL values as a function of temperature are shown in Figure. EFFECTIVE OPEN-LOOP OUTPUT RESISTANCE (Ω) V IN =.V = 3V TEMPERATURE ( C) 3 F Figure. Effective Open-Loop Output Resistance vs Temperature Output Ripple Low frequency regulation mode ripple exists due to the hysteresis in the comparator CMP and propagation delay in the charge pump control circuit. The amplitude and frequency of this ripple are heavily dependent on the load current, the input voltage and the output capacitor size. The LTC3 family uses a controlled current, I SW to deliver current to the output. This helps to keep the output ripple fairly constant over the full input voltage range. Typical combined output ripple for the LTC3-3.3 with V IN = V under maximum load is 3mV P-P using a.7µf.3v XR case size 3 output capacitor. A high frequency ripple component may also be present on the output capacitor due to the charge transfer action of the charge pump. In this case the output can display a voltage pulse during the charging phase. This pulse results from the product of the charging current and the ESR of the output capacitor. It is proportional to the input voltage, the value of the fl ying capacitor and the ESR of the output capacitor. A smaller output capacitor and/ or larger output current load will result in higher ripple due to higher output voltage slew rates. There are several ways to reduce output voltage ripple. For applications requiring lower peak-to-peak ripple, a larger C OUT capacitor (.7µF or greater) is recommended. A larger capacitor will reduce both the low and high frequency ripple due to the lower charging and discharging slew rates, as well as the lower ESR typically found with higher value (larger case size) capacitors. A low ESR ceramic output capacitor will minimize the high frequency ripple, but will not reduce the low frequency ripple unless a high capacitance value is used. V IN, Capacitor Selection The style and value of capacitors used with the LTC3 family determine several important parameters such as output ripple, charge pump strength and minimum startup time. To reduce noise and ripple, it is recommended that low ESR (<.Ω) capacitors be used for both C IN and C OUT. These capacitors should be either ceramic or tantalum and should be.µf or greater. Aluminum capacitors are not recommended because of their high ESR. Flying Capacitor Selection Warning: A polarized capacitor such as tantalum or aluminum should never be used for the fl ying capacitor since its voltage can reverse upon start-up of the LTC3. Low ESR ceramic capacitors should always be used for the fl ying capacitor. The fl ying capacitor controls the strength of the charge pump. In order to achieve the rated output current, it is necessary to have at least.µf of capacitance for the fl ying capacitor. For very light load applications, the fl ying capacitor may be reduced to save space or cost.from the fi rst order approximation of R OL in the section Effective Open-Loop Output Resistance, the theoretical minimum output resistance of a voltage doubling charge pump can 3f

9 LTC3/ APPLICATIO S I FOR be expressed by the following equation: R OL( MIN) VIN VOUT I f C OUT OSC FLY where f OSC is the switching frequency (khz) and C FLY is the value of the flying capacitor. The charge pump will typically be weaker than the theoretical limit due to additional switch resistance. However, for very light load applications, the above expression can be used as a guideline in determining a starting capacitor value. Ceramic Capacitors Capacitors of different materials lose their capacitance with higher temperature and voltage at different rates. For example, a ceramic capacitor made of X7R material will retain most of its capacitance from C to C, whereas, a ZU or YV style capacitor will lose considerable capacitance over that range. ZU and YV capacitors may also have a very strong voltage coefficient causing them to lose % or more of their capacitance when the rated voltage is applied. Therefore when comparing different capacitors, it is often more appropriate to compare the amount of achievable capacitance for a given case size rather than discussing the specified capacitance value. For example, over rated voltage and temperature conditions, a µf V YV ceramic capacitor in a 3 case may not provide any more capacitance than a.µf V X7R capacitor available in the same 3 case. In fact, for most /LTC3 applications, these capacitors can be considered roughly equivalent. The capacitor manufacturer s data sheet should be consulted to determine what value of capacitor is needed to ensure.µf at all temperatures and voltages. Table shows a list of ceramic capacitor manufacturers and how to contact them. Table. Ceramic Capacitor Manufacturers AVX Kemet Murata Taiyo Yuden Vishay ATIO U W U U Programming the LTC3 Output Voltage (FB Pin) While the versions have internal resistive dividers to program the output voltage, the programmable LTC3 may be set to an arbitrary voltage via an external resistive divider. Figure 3 shows the required voltage divider connection. LTC3 FB GND 3 R R 3 F3 =.3V ( + R ) R C OUT Figure 3. Programming the Adjustable LTC3 The voltage divider ratio is given by the expression: R VOUT = R. 3V Since the LTC3 employs a voltage doubling charge pump, it is not possible to achieve output voltages greater than twice the available input voltage. The V IN supply range required for regulation is given by the following expression: Maximum V IN < +. ( VOUT + IOUT ROL ) Minimum VIN = or. V; whichever is higher Where R OL is the effective open-loop output resistance and I OUT is the maximum load current. V IN cannot be higher than by more than.v, or else the line regulation is poor. Also, V IN has to be higher than the minimum operating voltage of.v. The sum of the voltage divider resistors can be made large to keep the quiescent current to a minimum. Any standing current in the output divider (given by.3/r) will be refl ected by a factor of in the input current. A reasonable resistance value should be such that the standing current is in the range of µa to µa when is regulated. C 3f 9

10 LTC3/ APPLICATIO S I FOR ATIO U W U U If the standing current is too low, the FB pin becomes very sensitive to the switching noise and will result in errors in the programmed. The compensation capacitor (C) helps to improve the response time of the comparator and to keep the output ripple within an acceptable range. For best results, C should be between pf to pf. Layout Considerations Due to high switching frequency and high transient currents produced by the LTC3 product family, careful board layout is necessary. A true ground plane and short R µf R 3 (LTC3) PIN 7 Figure. Recommended Layout.µF.µF 3 F V IN GND connections to all capacitors will improve performance and ensure proper regulation under all conditions. Figure shows the recommended layout configuration. The flying capacitor pins C + and C will have very high edge rate waveforms. The large dv/dt on these pins can couple energy capacitively to adjacent printed circuit board runs. Magnetic fields can also be generated if the fl ying capacitors are not close to the LTC3 (i.e. the loop area is large). To decouple capacitive energy transfer, a Faraday shield may be used. This is a grounded PC trace between the sensitive node and the LTC3 pins. For a high quality AC ground it should be returned to a solid ground plane that extends all the way to the LTC3. To reduce the maximum junction temperature due to power dissipation in the chip, a good thermal connection to the PC board is recommended. Connecting the GND pin (Pin and Pin 7 on the DFN package) to a ground plane, and maintaining a solid ground plane under the device can reduce the thermal resistance of the package and PC board considerably. Derating Power at High Temperatures To prevent an overtemperature condition in high power applications, Figure should be used to determine the maximum combination of ambient temperature and power dissipation. The power dissipated in the LTC3 family should always fall under the line shown for a given ambient temperature. The power dissipation is given by the expression: P = ( V V ) I D IN OUT OUT This derating curve assumes a maximum thermal resistance, θ JA, of C/W for mm mm DFN package. This can be achieved from a printed circuit board layout with a solid ground plane and a good connection to the ground pins of the LTC3 and the Exposed Pad of the DFN package. Operation out of this curve will cause the junction temperature to exceed C which is the maximum junction temperature allowed. POWER DISSIPATION (W) θ JA = C/W T J = C 7 AMBIENT TEMPERATURE ( C) 3 F Figure. Maximum Power Dissipation vs Ambient Temperature 3f

11 PACKAGE DESCRIPTIO U LTC3/ DC Package -Lead Plastic DFN (mm mm) (Reference LTC DWG # --73).7 ±. R =. TYP. ±. ( SIDES).3 ±.. ±.. ±.. ±. ( SIDES) PACKAGE PIN BAR OUTLINE TOP MARK (SEE NOTE ). ±.. BSC. ±. ( SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS. REF. ±. ( SIDES).7 ±... PIN CHAMFER OF EXPOSED PAD (DC) DFN 3 3. ±.. BSC.37 ±. ( SIDES) BOTTOM VIEW EXPOSED PAD NOTE:. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M-9 VARIATION OF (WCCD-). DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED.mm ON ANY SIDE. EXPOSED PAD SHALL BE SOLDER PLATED. SHADED AREA IS ONLY A REFERENCE FOR PIN LOCATION ON THE TOP AND BOTTOM OF PACKAGE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 3f

12 LTC3/ RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC V, 3mA Flash Memory Program Supply Regulated V ±% Output, I Q = µa LTC/LTC Buck/Boost Charge Pumps with I Q = µa ma Output at 3.3V or V; V to V Input LTC Micropower V Charge Pump I Q = µa, Up to ma Output, V IN = V to V LTC7-/LTC7-3.3 Micropower V/3.3V Doubler Charge Pumps I Q = µa, Up to ma Output LTC Micropower V Doubler Charge Pump I Q = µa, Up to ma Output LTC/LTC SIM Card Interface Step-Up/Step-Down Charge Pump, V IN =.7V to V LTC Low Noise Doubler Charge Pump Output Noise = µv RMS,.V to.v Output LTC7-3.3/LTC7- Micropower V/3.3V Doubler Charge Pumps I Q = µa, Up to ma Output, SOT-3 Package LTC7-3.3/LTC7- Micropower V/3.3V Doubler Charge Pumps I Q = 3µA, Up to ma Output, SOT-3 Package LTC7 Smart Card Interface Buck/Boost Charge Pump, I Q = µa, V IN =.7V to V LTC3 Constant Frequency Doubler Charge Pump Low Noise, V Output or Adjustable LTC33/LTC33B/ ma Low Noise High Effi ciency Dual Mode V IN :.7V to.v, 3mm 3mm DFN- Package LTC33B-/LTC33- Step Up Charge Pumps LTC3/LTC3B-3.3/ Low Noise Regulated Charge Pumps Up to ma (LTC3-), Up to ma (LTC3-3.3) LTC3- LTC3-3.3/LTC3-. Step-Up/Step-Down Regulated Charge Pumps Up to ma Output LT PRINTED IN USA Linear Technology Corporation 3 McCarthy Blvd., Milpitas, CA () 3-9 FAX: () LINEAR TECHNOLOGY CORPORATION 3f