1.8 V, Micropower, Zero-Drift, Rail-to-Rail Input/Output Op Amp ADA4051-1/ADA4051-2

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1 .8 V, Micropower, Zero-Drift, Rail-to-Rail Input/Output Op Amp ADA-/ADA-2 FEATURES Very low supply current: 3 μa typical Low offset voltage: μv maximum Offset voltage drift: 2 nv/ C Single-supply operation:.8 V to. V High PSRR: db minimum High CMRR: db minimum Rail-to-rail input/output Unity-gain stable Extended industrial temperature range APPLICATIONS Pressure and position sensors Temperature measurements Electronic scales Medical instrumentation Battery-powered equipment Handheld test equipment PIN CONFIGURATION OUT V 2 +IN 3 ADA- TOP VIEW (Not to Scale) V+ IN Figure. -Lead SOT-23 (RJ-) +IN V 2 IN 3 ADA- TOP VIEW (Not to Scale) V+ OUT Figure 2. -Lead SC-7 (KS-) OUT A IN A 2 +IN A 3 V ADA-2 TOP VIEW (Not to Scale) V+ 7 OUT B 6 IN B +IN B Figure 3. 8-Lead MSOP (RM-8) 86- OUT A IN A +IN A V 2 3 PIN INDICATOR ADA-2 TOP VIEW (Not to Scale) 8 V+ 7 OUT B 6 IN B +IN B NOTES. IT IS RECOMMENDED THAT THE EXPOSED PAD BE CONNECTED TO V. Figure. 8-Lead LFCSP (CP-8-2) 86-6 GENERAL DESCRIPTION The ADA-/ADA-2 are CMOS, micropower, zerodrift operational amplifiers utilizing an innovative chopping technique. These amplifiers feature rail-to-rail input/output swing and extremely low offset voltage while operating from a.8 V to. V power supply. In addition, these amplifiers offer high power supply rejection ratio (PSRR) and common-mode rejection ratio (CMRR) while operating with a typical supply current of 3 μa per amplifier. This combination of features makes the ADA-/ADA-2 amplifiers ideal choices for battery-powered applications where high precision and low power consumption are important. The ADA-/ADA-2 are specified for the extended industrial temperature range of C to +2 C. The ADA- amplifier is available in -lead SOT-23 and -lead SC-7 packages. The ADA-2 amplifier is available in 8-lead MSOP and 8-lead LFCSP packages. The ADA-/ADA-2 are members of a growing series of zero-drift op amps offered by Analog Devices, Inc. Refer to Table for a list of these devices. Table. Op Amps Supply Low Power, V V 6 V Single AD838 AD8628 AD8638 Dual AD839 AD8629 AD8639 Quad AD863 Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 96, Norwood, MA , U.S.A. Tel: Fax: Analog Devices, Inc. All rights reserved.

2 ADA-/ADA-2 TABLE OF CONTENTS Features... Applications... Pin Configuration... General Description... Revision History... 2 Specifications... 3 Electrical Characteristics.8 V Operation... 3 Electrical Characteristics V Operation... Absolute Maximum Ratings... Thermal Resistance... Power Sequencing... ESD Caution... Typical Performance Characteristics...6 Theory of Operation... Input Voltage Range... 6 Output Phase Reversal... 6 Outline Dimensions... 7 Ordering Guide... 8 REVISION HISTORY / Rev. A to Rev. B Added ADA-, -Lead SC-7 Package... Universal Added Figure 2; Renumbered Sequentially... Changes to Figure and General Description Section... Changes to Electrical Characteristics.8 V Operation Section and Table Changes to Electrical Characteristics V Operation Section and Table 3... Changes to Table... Updated Outline Dimensions... 7 Changes to Ordering Guide... 8 /9 Rev. to Rev. A Added ADA-, -Lead SOT-23 Package... Universal Added ADA-2, 8-Lead LFCSP Package... Universal Changes to the Features and General Description Section, Added Figure and Figure 3... Moved Electrical Characteristics.8 V Operation Section... 3 Changes to Offset Voltage Parameter and Supply Current per Amplifier Parameter, Table Moved Electrical Characteristics V Operation Section... Changes to Offset Voltage Parameter and Supply Current per Amplifier Parameter, Table 2... Changes to Thermal Resistance Section and Table... Changes to Figure 22 and Figure Changes to Theory of Operation Section... Updated Outline Dimensions... 7 Changes to Ordering Guide /9 Revision : Initial Version Rev. B Page 2 of 2

3 ADA-/ADA-2 SPECIFICATIONS ELECTRICAL CHARACTERISTICS.8 V OPERATION VSY =.8 V, VCM = VSY/2 V, TA = 2 C, RL = kω to GND, unless otherwise noted. Table 2. Parameter Symbol Test Conditions/Comments Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage VOS ADA-2 V VCM.8 V 2 μv ADA- V VCM.8 V 2 7 μv Offset Voltage Drift VOS/ T C TA +2 C.2. μv/ C Input Bias Current IB pa C TA +2 C 2 pa Input Offset Current IOS pa C TA +2 C pa Input Voltage Range C TA +2 C.8 V Common-Mode Rejection Ratio CMRR V VCM.8 V 2 db C TA +2 C db Large-Signal Voltage Gain AVO RL = kω to VCM, 6 3 db. V VOUT VSY. V C TA +2 C db Input Resistance RIN 8 MΩ Input Capacitance, Differential Mode CINDM 2 pf Input Capacitance, Common Mode CINCM pf OUTPUT CHARACTERISTICS Output Voltage High VOH RL = kω to VCM V C TA +2 C.79 V RL = kω to VCM V C TA +2 C.7 V Output Voltage Low VOL RL = kω to VCM 3 mv C TA +2 C 9 mv RL = kω to VCM 3 2 mv C TA +2 C mv Short-Circuit Current ISC VOUT = VSY or GND 3 ma Closed-Loop Output Impedance ZOUT f = khz, G = Ω POWER SUPPLY Power Supply Rejection Ratio PSRR.8 V VSY. V 3 db C TA +2 C 6 db Supply Current per Amplifier ISY ADA-2 VOUT = VSY/2 3 7 μa ADA- VOUT = VSY/2 8 μa C TA +2 C 2 μa DYNAMIC PERFORMANCE Slew Rate SR+ RL = kω, CL = pf, G =. V/μs SR RL = kω, CL = pf, G =.3 V/μs Settling Time ts To.%, VIN = V p-p, 2 μs RL = kω, CL = pf Gain Bandwidth Product GBP CL = pf, G = khz Phase Margin ΦM CL = pf, G = Degrees Channel Separation CS VIN =.7 V, f = Hz db NOISE PERFORMANCE Voltage Noise en p-p f =. Hz to Hz.96 μv p-p Voltage Noise Density en f = khz 9 nv/ Hz Current Noise Density in f = khz fa/ Hz Rev. B Page 3 of 2

4 ADA-/ADA-2 ELECTRICAL CHARACTERISTICS V OPERATION VSY =. V, VCM = VSY/2 V, TA = 2 C, RL = kω to GND, unless otherwise noted. Table 3. Parameter Symbol Test Conditions/Comments Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage VOS ADA-2 V VCM V 2 μv ADA- V VCM V 2 7 μv Offset Voltage Drift VOS/ T C TA +2 C.2. μv/ C Input Bias Current IB 2 7 pa C TA +2 C 2 pa Input Offset Current IOS pa C TA +2 C pa Input Voltage Range C TA +2 C V Common-Mode Rejection Ratio CMRR V VCM V 3 db C TA +2 C 6 db Large-Signal Voltage Gain AVO RL = kω to VCM, 3 db. V VOUT VSY. V C TA +2 C 6 db Input Resistance RIN 8 MΩ Input Capacitance, Differential Mode CINDM 2 pf Input Capacitance, Common Mode CINCM pf OUTPUT CHARACTERISTICS Output Voltage High VOH RL = kω to VCM V C TA +2 C.98 V RL = kω to VCM V C TA +2 C.9 V Output Voltage Low VOL RL = kω to VCM mv C TA +2 C 3 mv RL = kω to VCM 9 3 mv C TA +2 C 9 mv Short-Circuit Current ISC VOUT = VSY or GND ma Closed-Loop Output Impedance ZOUT f = khz, G = Ω POWER SUPPLY Power Supply Rejection Ratio PSRR.8 V VSY. V 3 db C TA +2 C 6 db Supply Current per Amplifier ISY ADA-2 VOUT = VSY/2 3 7 μa ADA- VOUT = VSY/2 8 μa C TA +2 C 2 μa DYNAMIC PERFORMANCE Slew Rate SR+ RL = kω, CL = pf, G =.6 V/μs SR RL = kω, CL = pf, G =. V/μs Settling Time ts To.%, VIN = V p-p, μs RL = kω, CL = pf Gain Bandwidth Product GBP CL = pf, G = 2 khz Phase Margin ΦM CL = pf, G = Degrees Channel Separation CS VIN =.99 V, f = Hz db NOISE PERFORMANCE Voltage Noise en p-p f =. Hz to Hz.96 μv p-p Voltage Noise Density en f = khz 9 nv/ Hz Current Noise Density in f = khz fa/ Hz Rev. B Page of 2

5 ADA-/ADA-2 ABSOLUTE MAXIMUM RATINGS Table. Parameter Rating Supply Voltage 6 V Input Voltage ±VSY ±.3 V Input Current ± ma Differential Input Voltage 2 ±VSY Output Short-Circuit Duration to GND Indefinite Storage Temperature Range 6 C to + C Operating Temperature Range C to +2 C Junction Temperature Range 6 C to + C Lead Temperature (Soldering, 6 sec) 3 C The input pins have clamp diodes to the power supply pins. Limit the input current to ma or less whenever input signals exceed the power supply rail by.3 V. 2 Inputs are protected against high differential voltages by internal series.33 kω resistors and back-to-back diode-connected N-MOSFETs (with a typical VT of.7 V for VCM of V). Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL RESISTANCE θja is specified for the worst-case conditions, that is, a device soldered on a circuit board for surface-mount packages with its exposed paddle soldered to a pad, if applicable. Table shows simulated thermal values for a -layer (2S2P) JEDEC standard thermal test board, unless otherwise specified. Table. Thermal Resistance Package Type θja θjc Unit -Lead SOT-23 (RJ-) 9 92 C/W -Lead SC-7 (KS-) 3 73 C/W 8-Lead MSOP (RM-8) 2 C/W 8-Lead LFCSP (CP-8-2) 77 C/W POWER SEQUENCING The op amp supplies must be established simultaneously with or before any input signals are applied. If this is not possible, the input current must be limited to ma. ESD CAUTION Rev. B Page of 2

6 ADA-/ADA-2 TYPICAL PERFORMANCE CHARACTERISTICS TA = 2 C, unless otherwise noted. 3 2 V CM = V SY /2 3 2 V CM = V SY /2 NUMBER OF AMPLIFIERS 2 NUMBER OF AMPLIFIERS V OS (µv) Figure. Input Offset Voltage Distribution V OS (µv) Figure 8. Input Offset Voltage Distribution 86- C T A +2 C 8 C T A 2 C NUMBER OF AMPLIFIERS NUMBER OF AMPLIFIERS TCV OS (µv/ C) Figure 6. Input Offset Voltage Drift Distribution with Temperature TCV OS (µv/ C) Figure 9. Input Offset Voltage Drift Distribution with Temperature 86-6 V OS (µv) DEVICE DEVICE 2 DEVICE 3 DEVICE DEVICE DEVICE 6 DEVICE 7 DEVICE 8 DEVICE 9 DEVICE V CM (V) Figure 7. Input Offset Voltage vs. Input Common-Mode Voltage 86- V OS (µv) DEVICE DEVICE 2 DEVICE 3 DEVICE DEVICE DEVICE 6 DEVICE 7 DEVICE 8 DEVICE 9 DEVICE 2 3 V CM (V) Figure. Input Offset Voltage vs. Input Common-Mode Voltage Rev. B Page 6 of 2

7 ADA-/ADA-2 TA = 2 C, unless otherwise noted. 8 I B+ I B 8 I B+ I B 6 6 I B (pa) I B (pa) TEMPERATURE ( C) Figure. Input Bias Current vs. Temperature TEMPERATURE ( C) Figure. Input Bias Current vs. Temperature I B (pa) I B (pa) V CM (V) I B+, 2 C I B, 2 C I B+, 8 C I B, 8 C I B+, 2 C I B, 2 C Figure 2. Input Bias Current vs. Common-Mode Voltage and Temperature I B+, 2 C I B, 2 C I B+, 8 C 3 I B, 8 C I B+, 2 C I B, 2 C V CM (V) Figure. Input Bias Current vs. Common-Mode Voltage and Temperature OUTPUT VOLTAGE (V OH ) TO SUPPLY RAIL (mv), LOAD CURRENT (ma) C +2 C +8 C +2 C Figure 3. Output Voltage (VOH) to Supply Rail vs. Load Current and Temperature 86- OUTPUT VOLTAGE (V OH ) TO SUPPLY RAIL (mv),. C +2 C +8 C +2 C.... LOAD CURRENT (ma) Figure 6. Output Voltage (VOH) to Supply Rail vs. Load Current and Temperature 86-3 Rev. B Page 7 of 2

8 ADA-/ADA-2 TA = 2 C, unless otherwise noted. OU. TPUT VOLTAGE (V OL ) TO SUPPLY RAIL (mv), C +2 C +8 C +2 C.... LOAD CURRENT (ma) Figure 7. Output Voltage (VOL) to Supply Rail vs. Load Current and Temperature 86- OUTPUT VOLTAGE (V OL ) TO SUPPLY RAIL (mv),. C +2 C +8 C +2 C.... LOAD CURRENT (ma) Figure 2. Output Voltage (VOL) to Supply Rail vs. Load Current and Temperature 86-7 OUTPUT VOLTAGE [V OH ] (mv) 8 R L = kω R L = kω V CM = V SY / TEMPERATURE ( C) Figure 8. Output Voltage (VOH) vs. Temperature 86- OUTPUT VOLTAGE [V OH ] (mv) R L = kω R L = kω 98 V CM = V SY / TEMPERATURE ( C) Figure 2. Output Voltage (VOH) vs. Temperature 86-8 VSY =.8V V CM = V SY /2 2 2 V CM = V SY /2 OUTPUT VOLTAGE [V OL ] (mv) 8 6 R L = kω OUTPUT VOLTAGE [V OL ] (mv) 8 6 R L = kω 2 R L = kω TEMPERATURE ( C) Figure 9. Output Voltage (VOL) vs. Temperature R L = kω TEMPERATURE ( C) Figure 22. Output Voltage (VOL) vs. Temperature Rev. B Page 8 of 2

9 ADA-/ADA-2 TA = 2 C, unless otherwise noted. 3 2 ADA-2 ADA- 3 2 V CM = V SY /2 TOTAL SUPPLY CURRENT (µa) 2 V CM = V SY /2 TOTAL SUPPLY CURRENT (µa) 2 ADA-2,.8V ADA-2, V ADA-,.8V ADA-, V SUPPLY VOLTAGE (V) Figure 23. Total Supply Current vs. Supply Voltage TEMPERATURE ( C) Figure 26. Total Supply Current vs. Temperature C L = pf C L = pf 8 3 OPEN-LOOP GAIN (db) 2 2 GAIN PHASE 9 PHASE (Degrees) OPEN-LOOP GAIN (db) 2 2 GAIN PHASE 9 PHASE (Degrees) k k k M Figure 2. Open-Loop Gain and Phase vs. Frequency k k k M Figure 27. Open-Loop Gain and Phase vs. Frequency R L = kω C L = pf 3 R L = kω C L = pf CLOSED-LOOP GAIN (db) CLOSED-LOOP GAIN (db) G = G = G = k k k M Figure 2. Closed-Loop Gain vs. Frequency 86-6 G = G = G = k k k M Figure 28. Closed-Loop Gain vs. Frequency Rev. B Page 9 of 2

10 ADA-/ADA-2 TA = 2 C, unless otherwise noted. k k k k Z OUT (Ω) Z OUT (Ω). k k k M Figure 29. Output Impedance vs. Frequency G = G = G = G = G = G =. k k k M Figure 32. Output Impedance vs. Frequency CMRR (db) 8 7 CMRR (db) k k k M Figure 3. CMRR vs. Frequency k k k M Figure 33. CMRR vs. Frequency PSRR (db) 6 PSRR+ PSRR (db) 6 PSRR+ 2 2 PSRR PSRR k k k M Figure 3. PSRR vs. Frequency k k k M Figure 3. PSRR vs. Frequency 86-3 Rev. B Page of 2

11 ADA-/ADA-2 TA = 2 C, unless otherwise noted. 6 V SY = ±.9V V IN = mv p-p R L = kω C L = pf 6 V SY = ±2.V V IN = mv p-p R L = kω C L = pf OVERSHOOT (%) 3 2 OVERSHOOT +OVERSHOOT OVERSHOOT (%) 3 2 OVERSHOOT +OVERSHOOT LOAD CAPACITANCE (pf) Figure 3. Small-Signal Overshoot vs. Load Capacitance LOAD CAPACITANCE (pf) Figure 38. Small-Signal Overshoot vs. Load Capacitance 86-3 R L = kω C L = pf G = V IN =.V p-p R L = kω C L = pf G = V IN = V p-p VOLTAGE (mv/div) VOLTAGE (V/DIV) TIME (µs/div) Figure 36. Large-Signal Transient Response TIME (µs/div) Figure 39. Large-Signal Transient Response R L = kω C L = pf G = V IN = mv p-p R L = kω C L = pf G = V IN = mv p-p VOLTAGE (mv/div) VOLTAGE (mv/div) TIME (µs/div) Figure 37. Small-Signal Transient Response TIME (µs/div) Figure. Small-Signal Transient Response Rev. B Page of 2

12 ADA-/ADA-2 TA = 2 C, unless otherwise noted. INPUT VOLTAGE NOISE (.µv/div).9µv p-p INPUT VOLTAGE NOISE (.µv/div).96µv p-p TIME (s/div) Figure. Input Voltage Noise,. Hz to Hz TIME (s/div) Figure. Input Voltage Noise,. Hz to Hz 86- k k VOLTAGE NOISE DENSITY (nv/ Hz) VOLTAGE NOISE DENSITY (nv/ Hz) k k Figure 2. Voltage Noise Density vs. Frequency k k Figure. Voltage Noise Density vs. Frequency 86-2 INPUT VOLTAGE (mv/div).... V SY = ±.9V G = INPUT VOLTAGE OUTPUT VOLTAGE.. OUTPUT VOLTAGE (mv/div) INPUT VOLTAGE (mv/div) V SY = ±2.V G = INPUT VOLTAGE OUTPUT VOLTAGE OUTPUT VOLTAGE (V/DIV). 2 TIME (µs/div) Figure 3. Positive Overload Recovery. 86- TIME (µs/div) Figure 6. Positive Overload Recovery Rev. B Page 2 of 2

13 ADA-/ADA-2 TA = 2 C, unless otherwise noted... INPUT VOLTAGE (mv/div)... V SY = ±.9V G = INPUT VOLTAGE OUTPUT VOLTAGE TIME (µs/div) Figure 7. Negative Overload Recovery.... OUTPUT VOLTAGE (mv/div) 86- INPUT VOLTAGE (mv/div) INPUT VOLTAGE OUTPUT VOLTAGE V SY = ±2.V G = TIME (µs/div) Figure. Negative Overload Recovery 3 2 OUTPUT VOLTAGE (V/DIV) 86-7 INPUT VOLTAGE INPUT VOLTAGE INPUT VOLTAGE (mv/div) ERROR BAND OUTPUT VOLTAGE V SY = ±.9V V IN = V p-p R L = kω C L = pf TIME (µs/div) Figure 8. Positive Settling Time to.% OUTPUT VOLTAGE (mv/div) 86- INPUT VOLTAGE (mv/div) ERROR BAND OUTPUT VOLTAGE V SY = ±2.V V IN = V p-p R L = kω C L = pf TIME (µs/div) Figure. Positive Settling Time to.% OUTPUT VOLTAGE (mv/div) 86-8 INPUT VOLTAGE (mv/div) ERROR BAND INPUT VOLTAGE OUTPUT VOLTAGE V SY = ±.9V V IN = V p-p R L = kω C L = pf TIME (µs/div) Figure 9. Negative Settling Time to.% OUTPUT VOLTAGE (mv/div) 86-6 INPUT VOLTAGE (mv/div) ERROR BAND TIME (µs/div) INPUT VOLTAGE OUTPUT VOLTAGE V SY = ±2.V V IN = V p-p R L = kω C L = pf Figure 2. Negative Settling Time to.% OUTPUT VOLTAGE (mv/div) 86-9 Rev. B Page 3 of 2

14 ADA-/ADA-2 TA = 2 C, unless otherwise noted. RATION (db) CHANNEL SEPA 2 3 kω kω G = R L = kω C L = pf 2 2 2k 2k Figure 3. Channel Separation vs. Frequency V IN =.V V IN = V V IN =.7V 86- RATION (db) CHANNEL SEPA 2 3 kω kω G = R L = kω C L = pf 2 2 2k 2k Figure 6. Channel Separation vs. Frequency V IN = V V IN = 3V V IN =.99V OUTPUT SWING (V) OUTPUT SWING (V) V IN =.7V G = R L = kω C L = pf k k k Figure. Output Swing vs. Frequency 86- V IN =.9V G = R L = kω C L = pf k k k Figure 7. Output Swing vs. Frequency 86- V SY = ±.9V G = R L = NO LOAD C L = NO LOAD V SY = ±2.V G = R L = NO LOAD C L = NO LOAD VOLTAGE (mv/div) V OUT VOLTAGE (V/DIV) V IN V OUT V IN TIME (2µs/DIV) Figure. No Phase Reversal 86-2 TIME (2µs/DIV) Figure 8. No Phase Reversal 86- Rev. B Page of 2

15 ADA-/ADA-2 THEORY OF OPERATION The ADA-/ADA-2 micropower chopper operational amplifiers feature a novel, patent-pending technique that suppresses offset-related ripple in a chopper amplifier. Instead of filtering the ripple in the ac domain, this technique nulls the amplifier s initial offset in the dc domain, thus preventing ripple at the overall output. Auto-zeroing and chopping are two techniques widely used in high precision CMOS amplifiers to achieve low offset, low offset drift, and no /f noise. Each of these techniques has pros and cons. Auto-zeroing results in more in-band noise due to aliasing introduced by sampling. On the other hand, chopping produces offset-related ripple because it modulates the initial offset associated with the amplifier up to its chopping frequency. To accomplish the best noise vs. power trade-off, the chopping technique is the better approach when designing a low offset amplifier because there is no increased in-band noise. It is preferable to suppress the offset-related ripple inside a chopper amplifier because the offset-related ripple would otherwise need to be eliminated by an extra off-chip postfilter. Figure 9 shows the block diagram design of the ADA-/ ADA-2 chopper amplifiers employing a local feedback loop called autocorrection feedback (ACFB). The main signal path contains an input chopping switch network (CHOP), a first transconductance amplifier (Gm), an output chopping switch network (CHOP2), a second transconductance amplifier (Gm2), and a third transconductance amplifier (Gm3). CHOP and CHOP2 operate at khz of chopping frequency to modulate the initial offset and /f noise from Gm up to the chopping frequency. A fourth transconductance amplifier (Gm) in the ACFB senses the modulated ripple at the output of CHOP2, caused by the initial offset voltage of Gm. Then, the ripple is demodulated down to a dc domain through a third chopping switch network (CHOP3), operating with the same chopping clock as CHOP and CHOP2. Finally, a null transconductance amplifier (Gm) tries to null any dc component at the output of Gm that would otherwise appear in the overall output as ripple. A switched-capacitor notch filter (NF) functions to selectively suppress the undesired offset-related ripple without disturbing the desired input signal from the overall input. The desired input dc signal appears as a dc signal at the output of CHOP2. Then, the initial offset is modulated up to the chopping frequency by CHOP3 and filtered out by the NF. Therefore, initial offset does not create any feedback and does not disturb the desired input signal. The NF is synchronized with the chopping clock to filter out the modulated component. In the same manner, the offset of Gm is filtered out by the combination of CHOP3 and the NF, enabling accurate ripple sensing at the output of CHOP2. In parallel with the high dc gain path, a feedforward transconductance amplifier (Gm6) is added to bypass the phase shift introduced by the ACFB at the chopping frequency. Gm6 is designed to have the same transconductance as Gm to avoid pole-zero doublets. This design prevents any instability introduced by the ACFB in the overall feedback loop. +IN IN CHOP Gm Gm Gm6 (= Gm) NF CHOP2 CHOP3 Gm C3 C2 Gm2 Gm3 Figure 9. ADA-/ADA-2 Chopper Amplifiers Block Diagram The voltage noise density, which is equal to the thermal noise floor dominated by the Gm, is essentially flat from dc to the chopping frequency because CHOP and CHOP2 eliminate the /f noise generated in Gm and the ACFB does not contribute any additional noise. Although the ACFB suppresses the ripple related to the chopping, there is a remaining voltage ripple. To further suppress the remaining ripple down to a desired level, it is recommended to have a postfilter at the output of the amplifier. The remaining voltage ripple originates from two sources. The first type of ripple is due to the residual ripple associated with the initial offset of the Gm. It is proportional to the magnitude of the initial offset and creates a spectrum at the chopping frequency (fchop). When the amplifier is configured as a unitygain buffer, this ripple has a typical value of.9 μv rms and a maximum of 3.7 μv rms. The second type of ripple is due to the intermodulation between the high frequency input signal and the chopping frequency. This ripple depends on the input frequency (fin) and creates a spectrum at frequencies equal to the difference between the chopping frequency and the input frequency (fchop fin), as well as at frequencies equal to the summation of the chopping frequency and the input frequency (fchop + fin). The magnitude of the ripple for different input frequencies is shown in Figure 6. MODULATED OUTPUT RIPPLE (µv rms) INPUT FREQUENCY (khz) Figure 6. ADA-/ADA-2 Modulated Output Ripple vs. Input Frequency C OUT Rev. B Page of 2

16 ADA-/ADA-2 The design architecture of the ADA-/ADA-2 specifically targets precision signal conditioning applications requiring accurate and stable performance from dc to Hz bandwidth. In summary, the main features of the ADA-/ ADA-2 chopper amplifiers are Considerable suppression of the offset-related ripple No affect on the desired input signal as long as its frequency is much lower than the chopping frequency shown in Figure 6 Achievement of low offset similar to a conventional chopper amplifier No introduction of excess noise The ADA-/ADA-2 chopper amplifiers provide a railto-rail input range with a.8 V to. V supply voltage range and 2 μa supply current consumption over the C to +2 C extended industrial temperature range. The gain bandwidth is 2 khz as a unity-gain stable amplifier up to pf load capacitance. INPUT VOLTAGE RANGE The ADA-/ADA-2 have internal ESD protection diodes. These diodes are connected between the inputs and each supply rail to protect the input MOSFETs from an electrical discharge event and are reversed-biased during normal operation. This protection scheme allows voltages as high as approximately.3 V beyond the supplies (±VSY ±.3 V) to be applied at the input of either terminal without causing permanent damage. If either input exceeds one of the supply rails by more than.3 V, these ESD diodes become forward-biased and large amounts of current begin to flow through them. Without current limiting, this excessive current would cause permanent damage to the device. If the inputs are expected to be subject to overvoltage conditions, install a resistor in series with each input to limit the input current to ma maximum. The ADA-/ADA-2 also have internal circuitry that protects the input stage from high differential voltages. This circuitry is composed of internal.33 kω resistors in series with each input and back-to-back diode-connected N-MOSFET (with a typical VT of.7 V for a VCM of V) after these series resistors. With normal negative feedback operating conditions, the ADA-/ ADA-2 amplifiers correct their output to ensure that the two inputs are at the same voltage. However, if the device is configured as a comparator or there are unusual operating conditions, the input voltages can be forced to different potentials, which may cause excessive current to flow through the internal diodeconnected N-MOSFETs. Although the ADA-/ADA-2 are rail-to-rail input amplifiers, take care to ensure that the potential difference between the inputs does not exceed ±VSY to avert permanent damage to the device. OUTPUT PHASE REVERSAL Although output phase reversal can occur with other amplifiers when the input common-mode voltage range is exceeded, the ADA-/ADA-2 amplifiers are designed to prevent any output phase reversal, provided both inputs are maintained approximately within.3 V above and below the supply voltages (±VSY ±.3 V). With other amplifiers, the outputs may jump in the opposite direction to the supply rail when a common-mode voltage moves outside the common-mode range. This usually occurs when one of the internal stages of the amplifier no longer has sufficient bias voltage across it and subsequently turns off. However, with the ADA-/ADA-2 amplifiers, if one or both inputs exceed the input voltage range but remain within the ±VSY ±.3 V range, an internal loop opens and the output remains in saturation mode, without phase reversal, until the input voltage is brought back to within the input voltage range limits as shown in Figure and Figure 8. Rev. B Page 6 of 2

17 ADA-/ADA-2 OUTLINE DIMENSIONS BSC.9 BSC MAX.9 MIN.2 MAX.8 MIN. MAX. MIN. MAX.3 MIN SEATING PLANE.2 BSC...3 COMPLIANT TO JEDEC STANDARDS MO-78-AA Figure 6. -Lead Small Outline Transistor Package [SOT-23] (RJ-) Dimensions shown in millimeters 268-A BSC MAX COPLANARITY..3. SEATING PLANE.22.8 COMPLIANT TO JEDEC STANDARDS MO-23-AA Figure 62. -Lead Thin Shrink Small Outline Transistor Package [SC-7] (KS-) Dimensions shown in millimeters A Rev. B Page 7 of 2

18 ADA-/ADA PIN IDENTIFIER.6 BSC COPLANARITY...2. MAX MAX COMPLIANT TO JEDEC STANDARDS MO-87-AA Figure Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters 79-B SQ MAX.6 MAX. BSC PIN INDICATOR TOP VIEW SQ 2. 8 EXPOSED PAD (BOTTOM VIEW) MAX.7 MAX MAX.6 TYP.8 NOM. MAX. NOM SEATING PLANE REF PIN INDICATOR FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. Figure 6. 8-Lead Lead Frame Chip Scale Package [LFCSP_VD] 3 mm 3 mm Body, Very Thin, Dual Lead (CP-8-2) Dimensions shown in millimeters 938-B ORDERING GUIDE Model Temperature Range Package Description Package Option Branding ADA-ARJZ-R2 C to +2 C -Lead SOT-23 RJ- AU ADA-ARJZ-R7 C to +2 C -Lead SOT-23 RJ- AU ADA-ARJZ-RL C to +2 C -Lead SOT-23 RJ- AU ADA-AKSZ-R2 C to +2 C -Lead SC-7 KS- AU ADA-AKSZ-R7 C to +2 C -Lead SC-7 KS- AU ADA-AKSZ-RL C to +2 C -Lead SC-7 KS- AU ADA-2ACPZ-R2 C to +2 C 8-Lead LFCSP_VD CP-8-2 A2M ADA-2ACPZ-R7 C to +2 C 8-Lead LFCSP_VD CP-8-2 A2M ADA-2ACPZ-RL C to +2 C 8-Lead LFCSP_VD CP-8-2 A2M ADA-2ARMZ C to +2 C 8-Lead MSOP RM-8 A2M ADA-2ARMZ-R7 C to +2 C 8-Lead MSOP RM-8 A2M ADA-2ARMZ-RL C to +2 C 8-Lead MSOP RM-8 A2M Z = RoHS Compliant Part. Rev. B Page 8 of 2

19 ADA-/ADA-2 NOTES Rev. B Page 9 of 2

20 ADA-/ADA-2 NOTES 29 2 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D86--/(B) Rev. B Page 2 of 2

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