V DSS R DS(on) max Qg 30V GS = 10V 9.3nC

Transcription

1 IRFH792PbF Appications High Frequency Point-of-Load Synchronous Buck Converter for Appications in Neworking & Computing Systems Optimized for Contro FET Appications HEXFET Power MOSFET V DSS R DS(on) max Qg 30V 8.5mΩ@V GS = V 9.3nC Benefits Very ow R DS(ON) at 4.5V V GS Low Gate Charge Fuy Characterized Avaanche Votage and Current % Tested for R G Lead-Free (Quaified up to 260 C Refow) RoHS compiant (Haogen Free) Low Therma Resistance Large Source Lead for more reiabe Sodering PQFN 5X6 mm Absoute Maximum Ratings Parameter Max. Units V DS Drain-to-Source Votage 30 V V GS Gate-to-Source Votage ± 20 I T A = 25 C Continuous Drain Current, V V 5 I T A = 70 C Continuous Drain Current, V V 2 I T C = 25 C Continuous Drain Current, V V 34 A I DM Pused Drain Current c 20 P A = 25 C Power Dissipation g 3. W P A = 70 C Power Dissipation g 2.0 Linear Derating Factor g W/ C T J Operating Junction and -55 to 50 C T STG Storage Temperature Range Therma Resistance Parameter Typ. Max. Units R θjc Junction-to-Case f 7.9 C/W R θja Junction-to-Ambient g 40 Notes through are on page Internationa Rectifier August 6, 203

2 IRFH792PbF T J = 25 C (uness otherwise specified) Parameter Min. Typ. Max. Units Conditions BV DSS Drain-to-Source Breakdown Votage 30 V V GS = 0V, I D = 250µA ΒV DSS / T J Breakdown Votage Temp. Coefficient 0.02 V/ C Reference to 25 C, I D = ma R DS(on) Static Drain-to-Source On-Resistance V GS = V, I D = 5A e mω V GS = 4.5V, I D = 2A e V GS(th) Gate Threshod Votage V V DS = V GS, I D = 25µA V GS(th) Gate Threshod Votage Coefficient -6.2 mv/ C I DSS Drain-to-Source Leakage Current.0 V DS = 24V, V GS = 0V µa 50 V DS = 24V, V GS = 0V, T J = 25 C I GSS Gate-to-Source Forward Leakage V GS = 20V na Gate-to-Source Reverse Leakage - V GS = -20V gfs Forward Transconductance 27 S V DS = 5V, I D = 2A Q g Tota Gate Charge Q gs Pre-Vth Gate-to-Source Charge 2.2 V DS = 5V Q gs2 Post-Vth Gate-to-Source Charge.2 V GS = 4.5V nc Q gd Gate-to-Drain Charge 3.2 I D = 2A Q godr Gate Charge Overdrive 2.7 See Fig.7 & 8 Q sw Switch Charge (Q gs2 Q gd ) 4.4 Q oss Output Charge 5.0 nc V DS = 6V, V GS = 0V R G Gate Resistance Ω t d(on) Turn-On Deay Time 2 V DD = 5V, V GS = 4.5V t r Rise Time 7.6 I D = 2A ns t d(off) Turn-Off Deay Time 4 R G =.8Ω t f Fa Time 4.7 See Fig.5 C iss Input Capacitance 2 V GS = 0V C oss Output Capacitance 240 pf V DS = 5V C rss Reverse Transfer Capacitance 20 ƒ =.0MHz Avaanche Characteristics Parameter Typ. Max. Units E AS Singe Puse Avaanche Energy d 29 mj I AR Avaanche Current c 2 A Diode Characteristics Parameter Min. Typ. Max. Units Conditions I S Continuous Source Current 3.9 MOSFET symbo D I SM (Body Diode) showing the A Pused Source Current integra reverse G 20 S (Body Diode)c p-n junction diode. V SD Diode Forward Votage.0 V T J = 25 C, I S = 2A, V GS = 0V e t rr Reverse Recovery Time 2 8 ns T J = 25 C, I F = 2A, V DD = 5V Q rr Reverse Recovery Charge 7 nc di/dt = 300A/µs e t on Forward Turn-On Time Intrinsic turn-on time is negigibe (turn-on is dominated by LSLD) Internationa Rectifier August 6, 203

3 I D, Drain-to-Source Current (A) R DS(on), Drain-to-Source On Resistance (Normaized) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) IRFH792PbF 0 60µs PULSE WIDTH Tj = 25 C VGS TOP V 5.0V 4.5V 3.5V 3.0V 2.7V 2.5V BOTTOM 2.3V 0 60µs PULSE WIDTH Tj = 50 C VGS TOP V 5.0V 4.5V 3.5V 3.0V 2.7V 2.5V BOTTOM 2.3V 2.3V 2.3V 0.0 V DS, Drain-to-Source Votage (V) V DS, Drain-to-Source Votage (V) Fig. Typica Output Characteristics Fig 2. Typica Output Characteristics I D = 5A V GS = V.2 T J = 50 C T J = 25 C V DS = 5V 60µs PULSE WIDTH V GS, Gate-to-Source Votage (V) T J, Junction Temperature ( C) Fig 3. Typica Transfer Characteristics Fig 4. Normaized On-Resistance vs. Temperature Internationa Rectifier August 6, 203

4 I SD, Reverse Drain Current (A) I D, Drain-to-Source Current (A) C, Capacitance (pf) V GS, Gate-to-Source Votage (V) IRFH792PbF 00 V GS = 0V, f = MHZ C iss = C gs C gd, C ds SHORTED C rss = C gd C oss = C ds C gd I D = 2A V DS = 24V V DS = 5V C iss C oss.0 C rss V DS, Drain-to-Source Votage (V) Q G, Tota Gate Charge (nc) Fig 5. Typica Capacitance vs. Drain-to-Source Votage Fig 6. Typica Gate Charge vs. Gate-to-Source Votage 0 0 OPERATION IN THIS AREA LIMITED BY R DS (on) T J = 50 C T J = 25 C µsec msec DC msec V GS = 0V V SD, Source-to-Drain Votage (V) T A = 25 C Tj = 50 C Singe Puse 0 V DS, Drain-to-Source Votage (V) Fig 7. Typica Source-Drain Diode Forward Votage Fig 8. Maximum Safe Operating Area Internationa Rectifier August 6, 203

5 I D, Drain Current (A) V GS(th), Gate Threshod Votage (V) IRFH792PbF I D = 25µA T J, Junction Temperature ( C) T J, Temperature ( C ) Fig 9. Maximum Drain Current vs. Ambient Temperature Fig. Threshod Votage vs. Temperature Therma Response ( Z thja ) C/W 0.0 D = SINGLE PULSE ( THERMAL RESPONSE ) R R R 2 R 2 R 3 R 3 τ J τ J τ τ τ 2 τ 2 τ 3 τ 3 Ci= τi/ri Ci= τi/ri Ri ( C/W) τi (sec) Notes:. Duty Factor D = t/t2 2. Peak Tj = P dm x Zthja T A 0.00 E-006 E t, Rectanguar Puse Duration (sec) R 4 R 4 τ 4 τ 4 τ A τ A Fig. Maximum Effective Transient Therma Impedance, Junction-to-Ambient Internationa Rectifier August 6, 203

6 R DS(on), Drain-to -Source On Resistance (m Ω) E AS, Singe Puse Avaanche Energy (mj) IRFH792PbF I D = 5A I D TOP 2.2A 3.A BOTTOM 2A 2 8 T J = 25 C T J = 25 C V GS, Gate -to -Source Votage (V) Fig 2. On-Resistance vs. Gate Votage Starting T J, Junction Temperature ( C) Fig 3. Maximum Avaanche Energy vs. Drain Current 5V V DS R D V DS L DRIVER R G V GS D.U.T. - V DD R G 20V tp D.U.T IAS 0.0Ω - V DD A VV GS Puse Width µs Duty Factor Fig 4a. Uncamped Inductive Test Circuit Fig 5a. Switching Time Test Circuit tp V (BR)DSS V DS 90% % V GS I AS Fig 4b. Uncamped Inductive Waveforms t d(on) t r t d(off) t f Fig 5b. Switching Time Waveforms Internationa Rectifier August 6, 203

7 IRFH792PbF - D.U.T ƒ - Circuit Layout Considerations Low Stray Inductance Ground Pane Low Leakage Inductance Current Transformer - Reverse Recovery Current Driver Gate Drive Period P.W. D.U.T. I SD Waveform Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt D = P.W. Period V GS =V V DD * R G dv/dt controed by RG Driver same type as D.U.T. I SD controed by Duty Factor "D" D.U.T. - Device Under Test V DD - Re-Appied Votage Inductor Curent Body Diode Forward Drop Rippe 5% I SD * V GS = 5V for Logic Leve Devices Fig 6. Peak Diode Recovery dv/dt Test Circuit for N-Channe HEXFET Power MOSFETs Current Reguator Same Type as D.U.T. Vds Id 50KΩ Vgs 2V.2µF.3µF D.U.T. V - DS Vgs(th) V GS 3mA I G I D Current Samping Resistors Qgs Qgs2 Qgd Qgodr Fig 7. Gate Charge Test Circuit Fig 8. Gate Charge Waveform Internationa Rectifier August 6, 203

8 IRFH792PbF PQFN 5x6 Option "E" Package Detais PQFN Part Marking INTERNATIONAL RECTIFIER LOGO 6 DATE CODE ASSEMBLY SITE CODE (Per SCOP ) PIN IDENTIFIER XXXX XYWWX XXXXX PART NUMBER MARKING CODE (Per Marking Spec.) LOT CODE (Eng Mode - Min. ast 4 digits of EATI #) (Prod Mode - 4 digits SPN code) TOP MARKING (LASER) Note: For the most current drawing pease refer to IR website at Internationa Rectifier August 6, 203

9 IRFH792PbF PQFN Tape and Ree Note: For the most current drawing pease refer to IR website at Notes: Repetitive rating; puse width imited by max. junction temperature. Starting T J = 25 C, L = 0.39mH, R G = 25Ω, I AS = 2A. ƒ Puse width 400µs; duty cyce 2%. Rthjc is guaranteed by design When mounted on inch square 2 oz copper pad on.5x.5 in. board of FR-4 materia. Revision History Date Comments 08/05/203 ÃUpdated the package drawing, on page. ÃUpdated the package outine drawing, on page 8. ÃThis drawing change is reated to PCN "Hana-GTBF-GEM 5x6 PQFN Pubic." IR WORLD HEADQUARTERS: N. Sepuveda Bvd., E Segundo, Caifornia 90245, USA To contact Internationa Rectifier, pease visit Internationa Rectifier August 6, 203

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