IRFBA90N20DPbF HEXFET Power MOSFET

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1 SMPS MOSFET PD IRFBA90N20DPbF HEXFET Power MOSFET Appications High frequency DC-DC converters Lead-Free V DSS R DS(on) max I D 200V 0.023Ω 98A Benefits Low Gate-to-Drain Charge to Reduce Switching Losses Fuy Characterized Capacitance Incuding Effective C OSS to Simpify Design, (See App. Note AN1) Fuy Characterized Avaanche Votage and Current Super-220 Absoute Maximum Ratings Parameter Max. Units I T C = 25 C Continuous Drain Current, V 10V 98 I T C = C Continuous Drain Current, V 10V 71 A I DM Pused Drain Current 390 P C = 25 C Power Dissipation 650 W Linear Derating Factor 4.3 W/ C V GS Gate-to-Source Votage ± 30 V dv/dt Peak Diode Recovery dv/dt ƒ 6.3 V/ns T J Operating Junction and -55 to 175 T STG Storage Temperature Range C Sodering Temperature, for 10 seconds 300 (1.6mm from case ) Recommended Cip Force 20 N Therma Resistance Parameter Typ. Max. Units R θjc Junction-to-Case 0.23 R θcs Case-to-Sink, Fat, Greased Surface 0.50 C/W R θja Junction-to-Ambient 58 Notes through are on page /15/04

2 T J = 25 C (uness otherwise specified) Parameter Min. Typ. Max. Units Conditions V (BR)DSS Drain-to-Source Breakdown Votage 200 V V GS = 0V, I D = 250µA V (BR)DSS/ T J Breakdown Votage Temp. Coefficient 0.22 V/ C Reference to 25 C, I D = 1mA R DS(on) Static Drain-to-Source On-Resistance Ω V GS = 10V, I D = 59A V GS(th) Gate Threshod Votage V V DS = V GS, I D = 250µA 25 V µa DS = 200V, V GS = 0V I DSS Drain-to-Source Leakage Current 250 V DS = 160V, V GS = 0V, T J = 150 C Gate-to-Source Forward Leakage V GS = 30V I GSS na Gate-to-Source Reverse Leakage - V GS = -30V T J = 25 C (uness otherwise specified) Parameter Min. Typ. Max. Units Conditions g fs Forward Transconductance 41 S V DS = 50V, I D = 59A Q g Tota Gate Charge I D = 59A Q gs Gate-to-Source Charge nc V DS = 160V Q gd Gate-to-Drain ("Mier") Charge V GS = 10V t d(on) Turn-On Deay Time 23 V DD = V t r Rise Time 160 ns I D = 59A t d(off) Turn-Off Deay Time 39 R G = 1.2Ω t f Fa Time 77 V GS = 10V C iss Input Capacitance 6080 V GS = 0V C oss Output Capacitance 1040 V DS = 25V C rss Reverse Transfer Capacitance 150 pf ƒ = 1.0MHz C oss Output Capacitance 7500 V GS = 0V, V DS = 1.0V, ƒ = 1.0MHz C oss Output Capacitance 410 V GS = 0V, V DS = 160V, ƒ = 1.0MHz C oss eff. Effective Output Capacitance 790 V GS = 0V, V DS = 0V to 160V Avaanche Characteristics Parameter Typ. Max. Units E AS Singe Puse Avaanche Energy 960 mj I AR Avaanche Current 59 A E AR Repetitive Avaanche Energy 65 mj Diode Characteristics Parameter Min. Typ. Max. Units Conditions D I S Continuous Source Current MOSFET symbo 98 (Body Diode) showing the A G I SM Pused Source Current integra reverse 390 (Body Diode) p-n junction diode. S V SD Diode Forward Votage 1.5 V T J = 25 C, I S = 59A, V GS = 0V t rr Reverse Recovery Time ns T J = 25 C, I F = 59A Q rr Reverse RecoveryCharge µc di/dt = A/µs t on Forward Turn-On Time Intrinsic turn-on time is negigibe (turn-on is dominated by L S L D ) 2

3 I D, Drain-to-Source Current (Α) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) IRFBA90N20DPbF 0 10 VGS TOP 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V 0 VGS TOP 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V 1 5.0V V µs PULSE WIDTH Tj = 25 C V DS, Drain-to-Source Votage (V) 1 20µs PULSE WIDTH Tj = 175 C V DS, Drain-to-Source Votage (V) Fig 1. Typica Output Characteristics Fig 2. Typica Output Characteristics I D = 98A T J = 175 C T J = 25 C 1.00 V DS = 15V 20µs PULSE WIDTH V GS, Gate-to-Source Votage (V) R DS(on), Drain-to-Source On Resistance (Normaized) V GS = 10V T J, Junction Temperature ( C) Fig 3. Typica Transfer Characteristics Fig 4. Normaized On-Resistance Vs. Temperature 3

4 C, Capacitance(pF) I SD, Reverse Drain Current (A) I D, Drain-to-Source Current (A) V GS, Gate-to-Source Votage (V) IRFBA90N20DPbF V GS = 0V, f = 1 MHZ C iss = C gs C gd, C ds SHORTED C rss = C gd C oss = C ds C gd Ciss I D = 59A V DS = 160V V DS = V V DS = 40V 0 Coss 6.0 Crss V DS, Drain-to-Source Votage (V) Q G Tota Gate Charge (nc) Fig 5. Typica Capacitance Vs. Drain-to-Source Votage Fig 6. Typica Gate Charge Vs. Gate-to-Source Votage T J = 175 C 0 OPERATION IN THIS AREA LIMITED BY R DS (on) T J = 25 C µsec 10 1msec 1.00 V GS = 0V V SD, Source-toDrain Votage (V) Tc = 25 C Tj = 175 C Singe Puse 10msec V DS, Drain-toSource Votage (V) Fig 7. Typica Source-Drain Diode Forward Votage Fig 8. Maximum Safe Operating Area 4

5 LIMITED BY PACKAGE V DS R D 80 R G V GS D.U.T. - V DD I D, Drain Current (A) V Puse Width 1 µs Duty Factor 0.1 % Fig 10a. Switching Time Test Circuit 20 V DS 90% T, Case Temperature ( C C) Fig 9. Maximum Drain Current Vs. Case Temperature 10% V GS t d(on) t r t d(off) t f Fig 10b. Switching Time Waveforms 1 Therma Response (Z thjc ) D = SINGLE PULSE (THERMAL RESPONSE) P DM t 1 t 2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thjc T C t 1, Rectanguar Puse Duration (sec) Fig 11. Maximum Effective Transient Therma Impedance, Junction-to-Case 5

6 15V 2000 I D V DS L DRIVER 1600 TOP BOTTOM 24A 42A 59A R G D.U.T I AS - V DD A 20V tp 0.01Ω Fig 12a. Uncamped Inductive Test Circuit V (BR)DSS tp E AS, Singe Puse Avaanche Energy (mj) Starting T, Junction Temperature ( J C) I AS Fig 12c. Maximum Avaanche Energy Vs. Drain Current Fig 12b. Uncamped Inductive Waveforms Current Reguator Same Type as D.U.T. 10 V Q GS Q G Q GD 12V.2µF 50KΩ.3µF D.U.T. V - DS V G V GS 3mA Charge Fig 13a. Basic Gate Charge Waveform I G I D Current Samping Resistors Fig 13b. Gate Charge Test Circuit 6

7 Peak Diode Recovery dv/dt Test Circuit D.U.T ƒ - Circuit Layout Considerations Low Stray Inductance Ground Pane Low Leakage Inductance Current Transformer - - R G dv/dt controed by R G Driver same type as D.U.T. I SD controed by Duty Factor "D" D.U.T. - Device Under Test - V DD Driver Gate Drive Period P.W. D = P.W. Period V GS =10V * D.U.T. I SD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt V DD Re-Appied Votage Inductor Curent Body Diode Forward Drop Rippe 5% I SD * V GS = 5V for Logic Leve Devices Fig 14. For N-Channe HEXFET Power MOSFETs 7

8 Super-220 ( TO-273AA ) Package Outine A [.433] [.394] 5.00 [.196] 4.00 [.158] B 9.00 [ [ [ 1.50 [.059] 0.50 [.020] [.590] [.552] [ [ [.157] 3.50 [.138] [.570] [.512] 2.55 [.] 2X 1.30 [.051] 3X 0.90 [.036] 0.25 [.010] B A 1.00 [.039] 4X 0.70 [.028] 3.00 [.118] 2.50 [.099] MOSFET IGBT Notes: Repetitive rating; puse width imited by max. junction temperature. Starting T J = 25 C, L = 0.55mH R G = 25Ω, I AS = 59A. ƒ I SD 59A, di/dt 170A/µs, V DD V (BR)DSS, T J 175 C Puse width 300µs; duty cyce 2%. C oss eff. is a fixed capacitance that gives the same charging time as C oss whie V DS is rising from 0 to 80% V DSS Cacuated continuous current based on maximum aowabe junction temperature. Package imitation current is 95A. 8

9 Super-220 (TO-273AA) Part Marking Information EXAMPLE: THIS IS AN IRFBA22N50A WITH ASSEMBLY LOT CODE 1789 ASSEMBLED ON WW 19, 1997 IN THE ASSEMBLY LINE "C" PART NUMBER INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE IRFBA22N50A 719C DATE CODE YEAR 7 = 1997 WEEK 19 LINE C Note: "P" in assemby ine position indicates "Lead-Free" TOP Super-220 not recommended for surface mount appication. Data and specifications subject to change without notice. This product has been designed and quaified for the Industria market. Quaification Standards can be found on IR s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., E Segundo, Caifornia 90245, USA Te: (310) TAC Fax: (310) Visit us at for saes contact information.09/04 9

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