V DS 200 V V DS (Avalanche) min. 260 V R DS(ON) 10V 54 m: T J max 175 C TO-220AB. IRFB38N20DPbF

Transcription

1 Appications High frequency DC-DC converters Pasma Dispay Pane Benefits Low Gate-to-Drain Charge to Reduce Switching Losses Fuy Characterized Capacitance Incuding Effective C OSS to Simpify Design, (See App. Note AN01) Fuy Characterized Avaanche Votage and Current Lead-Free TO-220AB IRFB38N20DPbF IRFB38N20DPbF IRFS38N20DPbF IRFSL38N20DPbF HEXFET Power MOSFET Key Parameters D 2 Pak IRFS38N20DPbF TO-262 IRFSL38N20DPbF Absoute Maximum Ratings Parameter Max. Units I T C = 25 C Continuous Drain Current, V V 43* I T C = 0 C Continuous Drain Current, V V 30* A I DM Pused Drain Current 180 P A = 25 C Power Dissipation 3.8 W P C = 25 C Power Dissipation 300* Linear Derating Factor 2.0* W/ C V GS Gate-to-Source Votage ± 30 V dv/dt Peak Diode Recovery dv/dt ƒ 9.5 V/ns T J Operating Junction and -55 to 175 T STG Storage Temperature Range C Sodering Temperature, for seconds 300 (1.6mm from case ) Mounting torqe, 6-32 or M3 screw bf in (1.1N m) Therma Resistance PD C V DS 200 V V DS (Avaanche) min. 260 V R DS(ON) V 54 m: T J max 175 C Parameter Typ. Max. Units R θjc Junction-to-Case 0.47* R θcs Case-to-Sink, Fat, Greased Surface 0.50 C/W R θja Junction-to-Ambient 62 R θja Junction-to-Ambient 40 * R θjc (end of ife) for D 2 Pak and TO-262 = 0.50 C/W. This is the maximum measured vaue after 00 temperature cyces from -55 to 150 C and is accounted for by the physica wearout of the die attach medium. Notes through are on page /22/

2 T J = 25 C (uness otherwise specified) Parameter Min. Typ. Max. Units Conditions V (BR)DSS Drain-to-Source Breakdown Votage 200 V V GS = 0V, I D = 250µA V (BR)DSS/ T J Breakdown Votage Temp. Coefficient 0.22 V/ C Reference to 25 C, I D = 1mA R DS(on) Static Drain-to-Source On-Resistance Ω V GS = V, I D = 26A V GS(th) Gate Threshod Votage V V DS = V GS, I D = 250µA I DSS Drain-to-Source Leakage Current 25 V µa DS = 200V, V GS = 0V 250 V DS = 160V, V GS = 0V, T J = 150 C I GSS Gate-to-Source Forward Leakage 0 V GS = 30V na Gate-to-Source Reverse Leakage -0 V GS = -30V T J = 25 C (uness otherwise specified) Parameter Min. Typ. Max. Units Conditions g fs Forward Transconductance 17 S V DS = 50V, I D = 26A Q g Tota Gate Charge I D = 26A Q gs Gate-to-Source Charge nc V DS = 0V Q gd Gate-to-Drain ("Mier") Charge V GS = V, t d(on) Turn-On Deay Time 16 V DD = 0V t r Rise Time 95 ns I D = 26A t d(off) Turn-Off Deay Time 29 R G = 2.5Ω t f Fa Time 47 V GS = V C iss Input Capacitance 2900 V GS = 0V C oss Output Capacitance 450 V DS = 25V C rss Reverse Transfer Capacitance 73 pf ƒ = 1.0MHz C oss Output Capacitance 3550 V GS = 0V, V DS = 1.0V, ƒ = 1.0MHz C oss Output Capacitance 180 V GS = 0V, V DS = 160V, ƒ = 1.0MHz C oss eff. Effective Output Capacitance 380 V GS = 0V, V DS = 0V to 160V Avaanche Characteristics Parameter Min. Typ. Max. Units E AS Singe Puse Avaanche Energydh 460 mj I AR Avaanche Currentc 26 A E AR Repetitive Avaanche Energy c 390 mj V DS (Avaanche) Repetitive Avaanche Votage c 260 V Diode Characteristics Parameter Min. Typ. Max. Units Conditions D I S Continuous Source Current MOSFET symbo 44 (Body Diode) showing the A G I SM Pused Source Current integra reverse 180 (Body Diode) p-n junction diode. S V SD Diode Forward Votage 1.5 V T J = 25 C, I S = 26A, V GS = 0V t rr Reverse Recovery Time ns T J = 25 C, I F = 26A Q rr Reverse RecoveryCharge µc di/dt = 0A/µs t on Forward Turn-On Time Intrinsic turn-on time is negigibe (turn-on is dominated by L S L D ) 2

3 I D, Drain-to-Source Current (Α) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) IRFB/S/SL38N20DPbF 00 0 VGS TOP 15V 12V V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V 0 VGS TOP 15V 12V V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V 5.0V V µs PULSE WIDTH Tj = 25 C V DS, Drain-to-Source Votage (V) µs PULSE WIDTH Tj = 175 C V DS, Drain-to-Source Votage (V) Fig 1. Typica Output Characteristics Fig 2. Typica Output Characteristics I D = 44A 3.0 T J = 25 C 0.00 T J = 175 C.00 V DS = 15V 300µs PULSE WIDTH V GS, Gate-to-Source Votage (V) R DS(on), Drain-to-Source On Resistance (Normaized) V GS = V T J, Junction Temperature ( C) Fig 3. Typica Transfer Characteristics Fig 4. Normaized On-Resistance Vs. Temperature 3

4 C, Capacitance(pF) I SD, Reverse Drain Current (A) I D, Drain-to-Source Current (A) V GS, Gate-to-Source Votage (V) IRFB/S/SL38N20DPbF V GS = 0V, f = 1 MHZ C iss = C gs C gd, C ds SHORTED C rss = C gd C oss = C ds C gd Ciss 12 8 I D = 26A V DS = 160V V DS = 0V 00 6 Coss 4 0 Crss V DS, Drain-to-Source Votage (V) Q G Tota Gate Charge (nc) Fig 5. Typica Capacitance Vs. Drain-to-Source Votage Fig 6. Typica Gate Charge Vs. Gate-to-Source Votage OPERATION IN THIS AREA LIMITED BY R DS (on) 0.00 T J = 175 C µsec T J = 25 C 1msec 1.00 V GS = 0V V SD, Source-toDrain Votage (V) Tc = 25 C Tj = 175 C Singe Puse msec V DS, Drain-toSource Votage (V) Fig 7. Typica Source-Drain Diode Forward Votage Fig 8. Maximum Safe Operating Area 4

5 I D, Drain Current (A) IRFB/S/SL38N20DPbF 45 V DS R D R G V GS D.U.T V Puse Width 1 µs Duty Factor 0.1 % - V DD T C, Case Temperature ( C) Fig 9. Maximum Drain Current Vs. Case Temperature Fig a. Switching Time Test Circuit V DS 90% % V GS t d(on) t r t d(off) t f Fig b. Switching Time Waveforms 1 Therma Response (Z thjc ) D = SINGLE PULSE (THERMAL RESPONSE) P DM t 1 t 2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thjc T C t 1, Rectanguar Puse Duration (sec) Fig 11. Maximum Effective Transient Therma Impedance, Junction-to-Case 5

6 15V V DS L DRIVER R G D.U.T I AS - V DD A 20V tp 0.01Ω Fig 12a. Uncamped Inductive Test Circuit V (BR)DSS tp E AS, Singe Puse Avaanche Energy (mj) TOP BOTTOM Starting Tj, Junction Temperature ( C) I D 11A 19A 26A I AS Fig 12c. Maximum Avaanche Energy Vs. Drain Current Fig 12b. Uncamped Inductive Waveforms Current Reguator Same Type as D.U.T. V Q GS Q G Q GD 12V.2µF 50KΩ.3µF D.U.T. V - DS V G V GS 3mA Charge Fig 13a. Basic Gate Charge Waveform I G I D Current Samping Resistors Fig 13b. Gate Charge Test Circuit 6

7 Peak Diode Recovery dv/dt Test Circuit D.U.T ƒ - Circuit Layout Considerations Low Stray Inductance Ground Pane Low Leakage Inductance Current Transformer - - R G dv/dt controed by R G Driver same type as D.U.T. I SD controed by Duty Factor "D" D.U.T. - Device Under Test - V DD Driver Gate Drive Period P.W. D = P.W. Period V GS =V * D.U.T. I SD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt V DD Re-Appied Votage Inductor Curent Body Diode Forward Drop Rippe 5% I SD * V GS = 5V for Logic Leve Devices Fig 14. For N-Channe HEXFET Power MOSFETs 7

8 TO-220AB Package Outine Dimensions are shown in miimeters (inches) TO-220AB Part Marking Information EXAMPLE: T HIS IS AN IRF LOT CODE 1789 ASSEMBLED ON WW 19, 1997 IN THE ASSEMBLY LINE "C" Note: "P" inassemby ine position indicates "Lead - Free" INTERNAT IONAL RECTIFIER LOGO ASSEMBLY LOT CODE PART NUMBER DATE CODE YEAR 7 = 1997 WEEK 19 LINE C TO-220AB packages are not recommended for Surface Mount Appication. Notes: 1. For an Automotive Quaified version of this part pease seehttp:// 2. For the most current drawing pease refer to IR website at 8

9 D 2 Pak Package Outine Dimensions are shown in miimeters (inches) D 2 Pak Part Marking Information THIS IS AN IRF530S WITH LOT CODE 8024 ASSEMBLED ON WW 02, 2000 IN THE ASSEMBLY LINE "L" INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE F 530S PART NUMBER DATE CODE YEAR 0 = 2000 WEEK 02 LINE L OR INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE F530S PART NUMBER DATE CODE P = DESIGNATES LEAD - FREE PRODUCT (OPTIONAL) YEAR 0 = 2000 WEEK 02 A = ASSEMBLY SITE CODE Notes: 1. For an Automotive Quaified version of this part pease seehttp:// 2. For the most current drawing pease refer to IR website at 9

10 TO-262 Package Outine Dimensions are shown in miimeters (inches) TO-262 Part Marking Information EXAMPLE: THIS IS AN IRL33L LOT CODE 1789 ASSEMBLED ON WW 19, 1997 IN THE ASS EMBLY LINE "C" INTERNATIONAL RECTIFIER LOGO AS S E MB LY LOT CODE PART NUMBER DATE CODE YEAR 7 = 1997 WEEK 19 LINE C OR INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE PART NUMBER DATE CODE P = DESIGNATES LEAD-FREE PRODUCT (OPTIONAL) YEAR 7 = 1997 WEEK 19 A = ASSEMBLY SITE CODE Notes: 1. For an Automotive Quaified version of this part pease seehttp:// 2. For the most current drawing pease refer to IR website at

11 D 2 Pak Tape & Ree Information TRR 1.60 (.063) 1.50 (.059) 4. (.161) 3.90 (.153) 1.60 (.063) 1.50 (.059) (.0145) (.0135) FEED DIRECTION TRL 1.85 (.073) 1.65 (.065).90 (.429).70 (.421) (.457) (.449) 16. (.634) (.626) 1.75 (.069) 1.25 (.049) (.609) (.601) (.957) (.941) 4.72 (.136) 4.52 (.178) FEED DIRECTION (.532) (.504) (1.079) (.941) (14.173) MAX (2.362) MIN. Notes: Repetitive rating; puse width imited by max. junction temperature. Starting T J = 25 C, L = 1.3mH R G = 25Ω, I AS = 26A. ƒ I SD 26A, di/dt 390A/µs, V DD V (BR)DSS, T J 175 C. Puse width 300µs; duty cyce 2%. NOTES : 1. COMFORMS TO EIA CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION HUB. 4. INCLUDES FLANGE OUTER EDGE (1.039) (.961) (1.197) MAX. 4 C oss eff. is a fixed capacitance that gives the same charging time as C oss whie V DS is rising from 0 to 80% V DSS. This is ony appied to TO-220AB package. This is appied to D 2 Pak, when mounted on 1" square PCB (FR-4 or G- Materia ). For recommended footprint and sodering techniques refer to appication note #AN-994. Data and specifications subject to change without notice. This product has been designed and quaified for the Industria market. Quaification Standards can be found on IR s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., E Segundo, Caifornia 90245, USA Te: (3) TAC Fax: (3) Visit us at for saes contact information.09/