SMPS MOSFET. V DSS R DS(on) max I D

Transcription

1 PD SMPS MOSFET IRFB260N HEXFET Power MOSFET Applications l High frequency DCDC converters V DSS R DS(on) max I D 200V 0.040Ω 56A Benefits Low GatetoDrain Charge to Reduce Switching Losses Fully Characterized Capacitance Including Effective C OSS to Simplify Design, (See App. Note AN01) Fully Characterized Avalanche Voltage and Current l l l TO220AB Absolute Maximum Ratings Parameter Max. Units I T C = 25 C Continuous Drain Current, V V 56 I T C = 0 C Continuous Drain Current, V V 40 A I DM Pulsed Drain Current 220 P C = 25 C Power Dissipation 380 W Linear Derating Factor 2.5 W/ C V GS GatetoSource Voltage ± 20 V dv/dt Peak Diode Recovery dv/dt ƒ V/ns T J Operating Junction and 55 to 175 T STG Storage Temperature Range C Soldering Temperature, for seconds 300 (1.6mm from case ) Mounting torqe, 632 or M3 screw lbf in (1.1N m) Thermal Resistance Parameter Typ. Max. Units R θjc JunctiontoCase 0.40 R θcs CasetoSink, Flat, Greased Surface 0.50 C/W R θja JunctiontoAmbient 62 Notes through are on page /29/01

2 T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions V (BR)DSS DraintoSource Breakdown Voltage 200 V V GS = 0V, I D = 250µA V (BR)DSS/ T J Breakdown Voltage Temp. Coefficient 0.26 V/ C Reference to 25 C, I D = 1mA R DS(on) Static DraintoSource OnResistance Ω V GS = V, I D = 34A V GS(th) Gate Threshold Voltage V V DS = V GS, I D = 250µA 25 V µa DS = 200V, V GS = 0V I DSS DraintoSource Leakage Current 250 V DS = 160V, V GS = 0V, T J = 150 C GatetoSource Forward Leakage 0 V GS = 20V I GSS na GatetoSource Reverse Leakage 0 V GS = 20V T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions g fs Forward Transconductance 29 S V DS = 50V, I D = 34A Q g Total Gate Charge I D = 34A Q gs GatetoSource Charge nc V DS = 160V Q gd GatetoDrain ("Miller") Charge 67 0 V GS = V t d(on) TurnOn Delay Time 17 V DD = 0V t r Rise Time 64 ns I D = 34A t d(off) TurnOff Delay Time 52 R G = 1.8Ω t f Fall Time 50 V GS = V C iss Input Capacitance 4220 V GS = 0V C oss Output Capacitance 580 V DS = 25V C rss Reverse Transfer Capacitance 140 pf ƒ = 1.0MHz C oss Output Capacitance 5080 V GS = 0V, V DS = 1.0V, ƒ = 1.0MHz C oss Output Capacitance 230 V GS = 0V, V DS = 160V, ƒ = 1.0MHz C oss eff. Effective Output Capacitance 500 V GS = 0V, V DS = 0V to 160V Avalanche Characteristics Parameter Typ. Max. Units E AS Single Pulse Avalanche Energy 450 mj I AR Avalanche Current 34 A E AR Repetitive Avalanche Energy 38 mj Diode Characteristics Parameter Min. Typ. Max. Units Conditions D I S Continuous Source Current MOSFET symbol 56 (Body Diode) showing the A G I SM Pulsed Source Current integral reverse 220 (Body Diode) pn junction diode. S V SD Diode Forward Voltage 1.3 V T J = 25 C, I S = 34A, V GS = 0V t rr Reverse Recovery Time ns T J = 25 C, I F = 34A Q rr Reverse RecoveryCharge µc di/dt = 0A/µs t on Forward TurnOn Time Intrinsic turnon time is negligible (turnon is dominated by L S L D ) 2

3 I D, DraintoSource Current (Α) I D, DraintoSource Current (A) I D, DraintoSource Current (A) IRFB260N 00 0 VGS TOP 15V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 00 0 VGS TOP 15V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 4.5V 4.5V µs PULSE WIDTH Tj = 25 C V DS, DraintoSource Voltage (V) µs PULSE WIDTH Tj = 175 C V DS, DraintoSource Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics I D = 56A T J = 175 C T J = 25 C.00 V DS = 15V 20µs PULSE WIDTH V GS, GatetoSource Voltage (V) R DS(on), DraintoSource On Resistance (Normalized) V GS = V T J, Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized OnResistance Vs. Temperature 3

4 I SD, Reverse Drain Current (A) I D, DraintoSource Current (A) C, Capacitance(pF) IRFB260N V GS = 0V, f = 1 MHZ C iss = C gs C gd, C ds SHORTED C rss = C gd C oss = C ds C gd 12 I D = 34A V DS V DS V DS = 160V = 0V = 40V 00 0 Ciss Coss Crss V GS, GatetoSource Voltage (V) V DS, DraintoSource Voltage (V) Q G, Total Gate Charge (nc) Fig 5. Typical Capacitance Vs. DraintoSource Voltage Fig 6. Typical Gate Charge Vs. GatetoSource Voltage OPERATION IN THIS AREA LIMITED BY R DS (on) 0.00 T J = 175 C 0.00 T 1.00 J = 25 C V GS = 0V V SD, SourcetoDrain Voltage (V) 1 Tc = 25 C Tj = 175 C Single Pulse 0µsec 1msec msec V DS, DraintoSource Voltage (V) Fig 7. Typical SourceDrain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4

5 60 V DS R D 50 V GS D.U.T. R G V DD I D, Drain Current (A) V Pulse Width 1 µs Duty Factor 0.1 % Fig a. Switching Time Test Circuit V DS 90% T, Case Temperature ( C C) Fig 9. Maximum Drain Current Vs. Case Temperature % V GS t d(on) t r t d(off) t f Fig b. Switching Time Waveforms 1 Thermal Response (Z thjc ) D = SINGLE PULSE (THERMAL RESPONSE) P DM t 1 t 2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thjc T C t 1, Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, JunctiontoCase 5

6 15V 850 I D V DS L DRIVER 680 TOP BOTTOM 14A 24A 34A Fig 12a. Unclamped Inductive Test Circuit I AS R G 20V tp tp D.U.T I AS 0.01Ω V (BR)DSS V DD A E AS, Single Pulse Avalanche Energy (mj) Starting T, Junction Temperature ( J C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. V Q GS Q G Q GD 12V.2µF 50KΩ.3µF D.U.T. V DS V G V GS 3mA Charge Fig 13a. Basic Gate Charge Waveform I G I D Current Sampling Resistors Fig 13b. Gate Charge Test Circuit 6

7 Peak Diode Recovery dv/dt Test Circuit D.U.T ƒ Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer R G dv/dt controlled by R G Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. Device Under Test V DD Driver Gate Drive Period P.W. D = P.W. Period V GS =V * D.U.T. I SD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt V DD ReApplied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% I SD * V GS = 5V for Logic Level Devices Fig 14. For NChannel HEXFET Power MOSFETs 7

8 TO220AB Package Outline Dimensions are shown in millimeters (inches) 2.87 (.1 13 ) 2.62 (.1 03 ).54 (.4 15 ).29 (.4 05 ) 3.78 (.149) 3.54 (.139) A 4.69 (.1 85 ) 4.20 (.1 65 ) B 1.32 (.052) 1.22 (.048) (.6 00 ) (.5 84 ) (.255) 6. (.240) 1.15 (.045) M IN LEAD ASSIGNMENTS 1 GATE 2 D R A IN 3 SOURCE 4 D R A IN (.5 55 ) (.5 30 ) 4.06 (.160) 3.55 (.140) 3X 1.40 (.055) 1.15 (.045) 2.54 (.1 00) 3X 0.93 (.0 37 ) 0.69 (.0 27 ) 0.36 (.014) M B A M 3X 2.92 (.115) 2.64 (.4) 0.55 (.022) 0.46 (.018) 2X NOTES: 1 D IME N S IO N IN G & TO L E R A N C IN G P E R A NS I Y 14.5 M, O U TL IN E C O N F O R M S TO J E D E C O U T LIN E T O 22 0 A B. 2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS. TO220AB Part Marking Information EXAMPLE : T HIS IS AN IRF LOT CODE 1789 ASS EMBLED ON WW 19, 1997 IN THE ASSEMBLY LINE "C" INTERNAT IONAL RECT IFIER LOGO AS S EMB LY LOT CODE PART NUMBER DATE CODE YEAR 7 = 1997 WEEK 19 LINE C Notes: Repetitive rating; pulse width limited by max. junction temperature. Starting T J = 25 C, L = 0.78mH R G = 25Ω, I AS = 34A. ƒ I SD 34, di/dt 480A/µs, V DD V (BR)DSS, T J 175 C Pulse width 300µs; duty cycle 2%. C oss eff. is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (3) TAC Fax: (3) Visit us at for sales contact information.08/01 8

9 Note: For the most current drawings please refer to the IR website at: