Impact of MOSFET s structure parameters on its overall performance depending to the mode operation

Transcription

1 NTERNTONL JOURNL O CRCUTS, SYSTEMS ND SGNL PROCESSNG Volume 10, 2016 mpact of MOSET s structure parameters o its overall performace depedig to the mode operatio Milaim Zabeli, Nebi Caka, Myzafere Limai, Qamil Kabashi bstract - The goal of this paper is to determie the ifluece of the mai electrical ad physical parameters that characterize MOSET (the NMOS trasistor), which cotrol the device behaviour that depeds o the selected parameter values. urthermore, the paper provides directives that eed to be followed durig the desig phase of MOSET, which shall eable the desirable performace of the device depedig o operatio coditios, by cotrollig the fabricatio process techology. Desigig the MOSET with appropriate parameters eables the desig of itegrated digital circuits with the best possible performace, depedig o the selected MOSET logic ad the operatio coditios. Keywords - body-effect, chael legth modulatio coefficiet, chael resistace, dopig cocetratio, ermi potetial, gate ide thickess, MOSET, overdrive voltage, process trascoductace parameter, threshold voltage.. THE ROLE O PHYSCS ND ELECTRCL PRMETERS O THE MOSET ON TS ELECTRCL BEHVOUR The MOSET is characterized with several of the physical ad electrical parameters which determie the electrical behaviour of MOSET device. These parameters are amed the MOSET parameters ad will have impact o MOSET operatio ad to its parasitic effects depedig of the MOSET dimesios [7]-[9]. or explorig the MOSET characteristic parameters, will explore the -chael ehacemet-type MOSET (or shortly NMOS trasistor). ig.1 is show the physical structure of the -chael ehacemet-type MOSET uder exteral bias voltages.. NTRODUCTON The MOSET (Metal Oxide Semicoductor ield Effect Trasistor) is the fudametal buildig block of digital itegrated circuits based o MOS trasistors. Based o the structure, the techological advatages, as well the relative simplicity of MOSET operatio, have make the MOSET the most widely used switchig device i the desigig of digital itegrated circuits [1]-[6]. The MOSET occupies a relativity smaller silico area ad has lower dissipatio power compared to bipolar juctio trasistor. ll of these properties have made it possible to pack large umber of MOSETs o a sigle itegrated circuit, resultig i the highest desity packig of the digital itegrated circuits. The ehacemettype MOSET is the most widely used field-effect trasistor i the desigig of the CMOS logic circuits. The MOSETs are characterized by several electrical ad physical parameters, which have sigificat effects o the MOSET operatio as i static ad dyamic (trasiet) mode of operatio. f the MOSET parameters are cotrolled durig the fabricatio process of the MOSET device, the the device behaviour ca be cotrolled depedig by operatio coditios. The desigig of the MOSET digital itegrated circuits (CMOS digital itegrated circuits) with cotrolled MOSET parameters will result o higher overall performace of the digital circuits or systems. ig.1 The structure of the -chael ehacemet-type MOSET uder exteral bias voltage. The ermi potetial is a MOSET electrical parameter, ad for p-type substrate ca be apprimated by expressio: kt l φ i p = (1) q N φ the ermi potetial for p-type substrate, p q the electro charge, the dopig cocetratio, N SSN:

2 NTERNTONL JOURNL O CRCUTS, SYSTEMS ND SGNL PROCESSNG Volume 10, 2016 k the Boltzma s costat, i itrisic carrier cocetratio of silico (S i ). or small positive gate-to-source bias V GS (whe source-tosubstrate V SB = 0V, i.e. source ad substrate termials are coected together or to groud), thus a depletio regio is created ear the surface of semicoductor-ide iterface (chael regio). The thickess (the depth) of this depletio regio o the surface ear semicoductor-ide iterface ad the depletio regio charge desity (the fixed acceptor ios) ca be expressed: x ε φ φ Si S p = 2 (2) d qn Q B = q N x = 2 qε N φ φ (3) φ the surface potetial, S ε the dielectric costat of silico (S Si i ) d or the certai positive voltage gate-to-source electrode V GS, a -type regio is created ear surface of the semicoductoride iterface ad this created regio is called the iversio layer. This coditio requires that the surface potetial to be equal by magitude (but the reverse polarity), as the bulk ermi potetial. Thus, the maximum depletio regio depth ear semicoductor-ide iterface ad the maximum depletio regio charge desity ca be expressed (the depth of depletio regio ad the depletio regio charge achieved at the oset of surface iversio remai costat for higher values of gate-to-source voltage V GS ): x Q 2ε 2φ si Si dm = (4) qn B = q N x = 2qε N 2φ (5) d The MOSET threshold voltage is a electrical parameter, which depeds from physical parameters of MOSET structure (whe V SB = 0V) ad ca be calculated by expressio [10], [11]: Q Q qn V ± si B0 t0 = ΦGC 2φ (6) Whereas, if the substrate (body) is biased by differet voltage level to the source (V SB > 0V), the device threshold voltage is expressed as follows: Q Q qn V = Φ φ ± t GC or i geeral expressio as: t B 2 (7) ( 2φ + VSB φ ) V = V γ 2 (8) t0 + S γ C 2qN ε Si = (9) ε = (10) t where: Φ GC - the work fuctio differece betwee the gate ad the chael, t the gate ide thickess (SiO 2 ), γ the body-effect coefficiet ε the dielectric costat of ide, Q the fixed charges desity i the gate ide ad i silicoide iterface, C the ide capacitace per uit gate area, Q desity of implated impurities ito chael regio. The excess of gate-to-source bias V GS over the MOSET threshold voltage V t is called the effective voltage (or the overdrive voltage). V OV = V GS V t (11) The magitude of the electro charge i the chael depeds by the overdrive voltage ad dimesios of chael regio ad ca be expressed as: Q = COXVOV (WL) (12) V OV the MOSET overdrive voltage, W the MOSET chael width, L the MOSET chael legth. The value of drai curret whe betwee drai-to-source is applied a small voltage V (the MOSET device operate i liear regio or liear mode) ca be expressed as: D C x) VOVV (13) 0 L whe: µ the mobility of the electros at the surface of the chael. the MOSET device, very importat parameters, fabricatio-process depedet, are [12]: k = µ C (14) k W = k (15) L k the process trascoductace parameter, or processdepedet costat, k the MOSET trascoductace parameter. By icreasig the drai-to-source voltage V the chael depth is o loger uiform (as result of icreasig the voltage V ) ad the MOSET chael will take the tapered shape, with the deepest at the source ad with shallowest at the drai ed. Now, the MOSET chael resistace will icrease, as well the drai curret ca be expressed as follows: SSN:

3 NTERNTONL JOURNL O CRCUTS, SYSTEMS ND SGNL PROCESSNG Volume 10, D C0x) ( VOV V ) V (16) L 2 or i alterative expressio: 1 D C0x) ( V GS Vt V ) V (17) L 2 Whe the drai-to-source voltage V excess the overdrive voltage V OV (or the gate-to-drai voltage V GD is smaller or equal to MOSET threshold voltage V t ) the MOSET chael depth at the drai reduces to zero (pich-off), ad MOSET device will operate i saturatio mode. or idealized case, the drai curret ca be expressed by expressio: 1 2 C0 x) V (18) OV 2 L ig. 2 Variatio of the ermi potetial φ p cocetratio N. o the dopig But, i reality, icreasig drai-to-source voltage V beyod the overdrive voltage V OV the chael pich-off poit is moved slightly away from the drai toward the source (a eve larger portio of the chael becomes piched-off). Cosequetly, the MOSET effective chael legth is reduced from L to L- L, ad this pheomeo is called as chael-legth modulatio. Now, apprimately the chael legth shorteig L is proportioal to the square root of (V - V OV ), ad this effect ca be accouted i saturatio drai curret expressio as: 1 2 C0x) VOV (1 + λv ) (19) 2 L or i alterative expressio: 1 ) ( ) 2 C0x VGS Vt (1 + λv ) (20) 2 L Here λ is a empirical MOSET parameter (electrical model parameter), which is called the chael legth modulatio coefficiet, ad its value depeds o the process techology used to fabricate as well as o the chael legth of the MOSET device [13]. Because the ewer techologies have very short chael, ad the chael modulatio costat of MOSET will have more impact o the MOSET operatio characteristics compared to the older techologies. The value of the chael legth modulatio coefficiet λ is iversely proportioal to the MOSET chael legth L.. RESULTS ND CUSSON The depedece of the ermi potetial φ p o the dopig cocetratio N i p-type substrate is show i ig. 2. The achieved results idicate that for higher values of the dopig cocetratio N, the ermi potetial will be more egative, i.e. the ermi level i p-type semicoductor will have more egative value. The ifluece of the dopig cocetratio level N o the maximum depletio regio depth at the oset of surface iversio is show i ig. 3, ad for higher level of the dopig cocetratio N the maximum depletio regio depth x dm will be shallower, i. e. the maximum depletio regio depth ear ide-substrate iterface will be smaller. ig. 3 Variatio of the maximum depletio regio depth x dm as a fuctio of the dopig cocetratio N i p-type semicoductor (substrate). The depedece of the depletio regio charge desity (which is due to the fixed acceptor ios located i depletio regio) for surface iversio coditios related to dopig cocetratio N ito p-type substrate, is show i ig. 4. rom results preseted, we ote that the depletio regio charge desity Q B will be higher for higher values of the dopig cocetratio N, but polarity of this charge is egative, as a result of solely fixed acceptors ios i this regio. SSN:

4 NTERNTONL JOURNL O CRCUTS, SYSTEMS ND SGNL PROCESSNG Volume 10, 2016 ig. 4 Variatio of the depletio regio charge desity Q B at surface iversio as a fuctio of the dopig cocetratio i p-type semicoductor (substrate) N. liear mode of the MOSET operatios the device behaves as a liear resistace, because chael resistace r value is cotrolled by overdrive voltage V OV. The depedece of the MOSET chael resistace o overdrive voltage is preseted i ig. 5. Based o achieved results, it could be cocluded that for higher value of the MOSET overdrive voltage, the chael resistace of device will be lower, but with a sigificat impact for lower values of the overdrive voltage. ig. 6 The depedece of the MOSET chael resistace r as a fuctio of device chael width W, whe V OV = 2V, L = 0.18 μm, k = μ/v 2 ad i liear mode operatio. The ig. 7 ad ig. 8 idicate the ifluece of gate ide thickess t (device physical parameter) of the MOSET o chael resistace r ad o process trascoductace parameter k that characterize the MOSET device. or larger value of the gate ide thickess t, the chael resistace r will icrease, but the value of process trascoductace parameter will decrease. The gate ide thickess is a sigificat parameter of the MOSET device which has to cotrol durig desig phase depedig o coditios ad role of MOSET device i differet applicatios. ig. 5 The depedece of MOSET chael resistace as a fuctio of the MOSET overdrive voltage, whe device operate i liear mode ad the MOSET trascoductace parameter is k = μ/v 2. The chael width W of the MOSET device is the most sigificat parameter which ca be cotrolled durig desig phase, besides the chael legth L of the MOSET device which is fixed parameter determied by process techology (the lithography process) used to fabricate it. The impact of the chael width W of MOSET o the device chael resistace (NMOS device) is idicated i ig. 6. orm achieved results, the chael resistace of the MOSET will be smaller for higher values of device chael width W. But, the parasitic capacitace of the MOSET device depeds by its dimesios [14]-[17]. ig. 7 The depedece of MOSET chael resistace r as e fuctio of the gate ide thickess t, whe V OV = 2V, L = 0.18μm, W = 1μm, μ = 450 cm 2 /Vs ad V t = 0.7V. ig. 8 The depedece of process trascoductace parameter k as a fuctio of the gate ide thickess t, whe V OV = 2V, L = 0.18μm, W = 1μm, μ = 450 cm 2 /Vs ad V t = 0.7V. SSN:

5 NTERNTONL JOURNL O CRCUTS, SYSTEMS ND SGNL PROCESSNG Volume 10, 2016 ig. 9 is show the curret-voltage characteristic of MOSET whe it operates i liear mode ad the drai-tosource voltage is kept small, by set of graphs whe the overdrive V OV voltage is used as parameter. or higher value of overdrive voltage the slope of the curret-voltage characteristic will be higher, ad the chael resistace will be smaller, whereas the drai curret will icrease. this operatio regio the MOSET device behaves as a voltagecotrolled resistace. The MOSET curret-voltage characteristic whe the draito-source voltage is icreasig but do t excess the overdrive voltage, is idicted i ig.10. The described relatioship by set of graphs show that the depedece of the curret-voltage characteristic will decrease compared to lower value of draito-source voltage (the curret-voltage characteristic will take the parabolic shape), with sigificat impact whe the draito-source voltage is closer to the overdrive voltage. The MOSET curret-voltage characteristic whe the draito-source voltage is icreased ad it excesses the overdrive voltage (the MOSET operates i saturatio mode) for several differet parametric values of overdrive voltage is show i ig. 11. rom this characteristic, it could be idicated that whe the drai-to-source voltage excesses the overdrive voltage the drai curret is cotrolled oly by overdrive voltage. ig. 11 The MOSET curret-voltage characteristic for several differet overdrive voltage V OV, whe MOSET device operate i liear ad saturatio mode. ig. 9 The curret-voltage characteristic of the MOSET whe the drai-to-source voltage V is kept small. The behaves of the MOSET curret-voltage characteristic whe the chael legth effect is icluded ad whe the device operate i saturatio mode, ad the overdrive voltage has four differet values are idicated i ig.12. rom the set of graphs whe the MOSET device operates i saturatio mode, it could be idicated that curret-voltage characteristic i this regio will have e slightly slope with sigificat impact for higher value of overdrive voltage, as result of drai-to-source voltage V. ig. 10 The MOSET curret-voltage characteristic whe MOSET device operate i liear mode for some parametric values of the overdrive voltage V OV ad for higher values of V. Therefore, whe durig MOSET operatio which operates i liear mode is selected the larger value of the overdrive voltage, the slope of the MOSET curret-voltage characteristic will icrease, ad results o larger values of drai curret for selected drai-to-source voltage. But, the MOSET curret-voltage characteristic will chage the relatioship to the drai-to-source voltage whe this value is icreasig ad it reaches the overdrive voltage, compared to smaller values of the drai-to-source voltage. ig. 12 The curret-voltage characteristic of the MOSET device whe the chael legth modulatio coefficiet has value λ = 0.05V -1, for several differet values of overdrive voltage V OV. Whe the MOSET device operates i saturatio mode the device chael resistace has a fiite values which depeds o the chael legth modulatio coefficiet ad the overdrive voltage. The ifluece of chael legth modulatio coefficiet o MOSET chael resistace is idicated i ig.13, ad device chael resistace r will be larger whe the modulatio coefficiet λ will be smaller. SSN:

6 NTERNTONL JOURNL O CRCUTS, SYSTEMS ND SGNL PROCESSNG Volume 10, 2016 ig. 13 The variatio of the MOSET chael resistace o chael legth modulatio coefficiet λ, whe the MOSET device operates o saturatio mode. The impact of chael legth modulatio coefficiet λ, the threshold voltage V t0 ad the gate ide thickess t o MOSET curret-voltage characteristic are show i ig. 14, ig. 15 ad ig. 16. Based from the set of graphs, for larger values of chael legth modulatio coefficiet, the slope of the curret-voltage characteristic will has slightly icrease, likewise depedece will has for smaller values of the MOSET threshold voltage ad for smaller value of the gateide thickess. ig. 16 The depedece of the MOSET curret-voltage characteristic o two differet values of the gate ide thickess t. The ifluece of the body effect reflected by V SB (substrate effect) ad the MOSET aspect ratio (W/L) o its curretvoltage characteristic are show i ig. 17 ad ig. 18. or smaller value of the source-to-substrate voltage V SB ad larger values of the MOSET aspect ratio W/L, the drai curret will be larger. ig. 17 The depedece of the MOSET curret-voltage characteristic for two differet values of the source-tosubstrate voltage V SB. ig. 14 The depedece of the MOSET curret-voltage characteristic for differet values of the chael legth modulatio coefficiet λ. ig. 18 The depedece of the MOSET curret-voltage characteristic for three differet values of the MOSET aspect ratio r=w/l. ig. 15 The depedece of the MOSET curret-voltage characteristic for three differet values of the MOSET threshold voltage V t0. Whe durig desig phase of MOSET is selected the larger value of device aspect ratio (r = W/L), the MOSET curretvoltage characteristic will shift to larger values of drai curret compared to smaller values of the device aspect ratio for same coditio of source-to-drai bias. SSN:

7 NTERNTONL JOURNL O CRCUTS, SYSTEMS ND SGNL PROCESSNG Volume 10, 2016 V. CONCLUSON f durig the desig phase of the MOSET device, the electrical ad physical parameters which characterize the MOSET device as: the substrate dopig cocetratio (N ), the threshold voltage (V t ), the body body-effect coefficiet (γ), the process trascoductace parameter (k ), the chael width (W), the chael legth (L), the gate-ide thickess (t ) ad the chael legth modulatio coefficiet (λ) are cotrolled ad implemeted by the selected techology process, the MOSET device ca be desiged by requested performace by the device desiger, depedig to the operatio coditios. or larger values of dopig cocetratio i p-type substrate (N ), the ermi potetial φ p ad the depletio regio charge desity (Q B ) will be larger by absolute value, but the maximum depletio regio depth (x dm ) will be lower (or shallower). The MOSET chael resistace (r ) i the iduced iversio layer will be smaller for larger value of the overdrive voltage (V OV ), but with sigificat impact whe i device is applied smaller value of the overdrive voltage (V OV ). lso, the device chael resistace (r ) will be smaller if durig desiged phase is selected the larger values of the MOSET chael legth (W). Whe the gate ide thickess (t ) of MOSET device is selected to be smaller, the iduced chael resistace (r ) will be larger, but the value of the process trascoductace parameter (k ) will be larger. or larger value of the chael legth modulatio coefficiet (λ) whe the MOSET device operates i saturatio mode, the slope of the MOSET curret-voltage characteristic will has a slightly icrease which is directly proportioal to the chael legth modulatio coefficiet, which reflects i a icrease of the drai curret. But, the MOSET chael resistace r whe the device operates i saturatio mode will be smaller if the chael legth modulatio coefficiet has larger value. Whe the threshold voltage (V t0 ) ad the gate ide thickess (t ) of the MOSET are smaller, the curret-voltage characteristic will shift to larger values of drai curret, as result of icreasig of the characteristic slope compared to larger values, for same drai-to-source voltage. Whereas, whe the source-to-substrate (V SB ) voltage have larger value ad device aspect ratio (r) has lower, the MOSET curret-voltage characteristic will shift to smaller values of drai curret. [7] S. Kag, Y. Leblebici, CMOS Digital tegrated Circuits, 3rd editio, McGraw-Hill, [8]. Sedra ad K. C. Smith, Microelectroic Circuits, Oxford Uiversity Press, [9] J. E. yers, Digital tegrated Circuits aalysis ad desig, CRC Press LLC, [10] Milaim Zabeli, Nebi Caka, Myzafere Limai, Qamil Kabashi, mpact of MOSET s performace o its threshold voltage ad its ifluece o desig of MOS ivertors, WSES trasactios o SYSTEMS ad CONTROL, vol. 3, pp , [11] M. J. Va Dort, P.H Woerlee,. J. Walker, C.. H. Juffermaes, ad H. Lifka, fluece of high substrate dopig levels o the threshold voltage ad mobility of deep submicrometer MOS-ETs, EEE Trasactios o Electro Devices, vol. Ed-39, pp , [12] James D. Plummer, Micheal D. Deal, Peter B. Griffi, Silico VLS Techology:, udametals, Practice ad Modelig, Pretice Hall, [13] Rechard C. Jaeger, troductio to Microelectroic abricatio, Pretice Hall, [14] Nebi Caka, Milaim Zabeli, Myzafere Limai, Qamil Kabashi, mpact of MOSET parameters o its parasitic capacitaces ad their impact i digital circuits, WSES trasactios o CRCUTS ad SYSTEMS, vol. 6, pp , [15] [ Yua, J. ad Svesso, C., High-speed CMOS circuit techique, EEE Trasactios o Circuits ad Systems, vol. 38, o. 7, pp , July [16] Sakurai, T. ad Newto,. R., Delay aalysis of series-coected MOSET circuits, EEE Joural of Solid-State Circuits, vol. 26, o. 2, pp , ebruary [17]. J. G. Ruiz,. M. Tieda-Lua,. Gotoy, L. Doetti,. Gamiz, model of the gate capacitace of surroudig gate trasistors: compariso with double-gate MOSETs, EEE trasactios o Electro device, 57(10): , Oct REERENCES [1] Neil H. E. Weste, David Moey Harris, CMOS VLS Desig: Circuits ad System Perspective, ddiso-wesley, [2] Muhammad H. Rashid, Microelectroics Circuits alysis ad Desig, Cegage Learig, [3] David. Hodges, Horace G. Jacko, Resve. Saleh, alysis ad Desig of Digital tegrated Circuits, Mc Graw Hill, [4]. K. Maii, Digital electroics: Priciples, Devices ad pplicatios, Jo Wiley, [5] J. M. Rabaey,. Chadrakasa, ad B. Nikolic, Digital tegrated Circuits: Desig Perspective, Upper Saddle River, NJ:Pearso Educatio, [6] R Jacob Baker, CMOS Circuit Desig, Layou, ad Simulatio, EEE Press, SSN: