High-Order CCII-Based Mixed-Mode Universal Filter

Size: px
Start display at page:

Download "High-Order CCII-Based Mixed-Mode Universal Filter"

Transcription

1 High-Order CCII-Based Mixed-Mode Uiversal Filter Che-Nog Lee Departmet of Computer ad Commuicatio Egieerig, Taipei Chegshih Uiversity of Sciece ad Techology, Taipei, Taiwa, R. O. C. Abstract This paper presets a ew high-order mixedmode (icludig voltage, curret, trasadmittace, ad trasimpedace modes) uiversal filter structure usig +1 secod-geeratio curret coveyors (CCIIs), grouded capacitors ad +2 resistors, which are the miimum umber of active compoet couts for realizig a th-order mixedmode uiversal filterig resposes (low-pass, high-pass, badpass, bad-reject, ad all-pass) from the same topology. May importat advatages are simultaeously achieved which are (i) usig oly CCIIs (with simpler implemetatio cofiguratio tha the differetial differece curret coveyors (DDCCs) ad fully differetial curret coveyors (FDCCIIs)), (ii) all grouded capacitors (attractive for itegratio), (iii) high output impedace for curret output (good for cascadability), (iv) o eed to impose compoet choice except the voltage ad trasadmittace all-pass respose, (v) o eed of ivertig-type iput sigals or double-type iput sigals for the use of special iput sigals, ad (vi) low sesitivity performace. H-Spice simulatio results cofirm the theory. Keywords Active filters, secod-geeratio curret coveyors, mixed-mode, high-order filter, uiversal filter. I. INTRODUCTION Over the last decade, may high-order voltage-mode or curret-mode filters have bee preseted i the literature [1-17]. From historical progress poit of view, we might ited to replace the traditioal voltage-mode circuits with the more precise curret-mode circuits. There might be a trasferrig period from voltage-mode to curret-mode world. The, the trasadmittace (i.e. iput as voltage ad output as curret) ad trasimpedace (i.e. iput as curret ad output as voltage) modes will be ivolved i that betwee voltage ad curret modes, ad therefore, play a very importat role i the special filterig applicatios where we eed to coect a voltage-mode circuit with a curret-mode circuit ad vice versa. Hece, i aalog sigal processig applicatios, we may be desirable to have active filter with iput currets or voltages ad output currets ad voltages, defied as mixed-mode filter. Therefore, the mixed-mode (icludig voltage, curret, trasadmittace, ad trasimpedace modes) circuits are worthy of researches ad preseted for the use of ay filterig requiremet which is compatible with moder microelectroic systems applicatios, such as cotrols ad voice ad data commuicatios, where cosideratio of size ad weight make the use of iductors prohibitive. Although may mixed-mode biquad filters have bee proposed, few high-order mixed-mode filters have bee preseted i the literature [15, 18-20]. I 2009, a th-order mixed-mode filter was proposed [19]. The filter structure [19] employs +2 operatioal trascoductace amplifiers (OTAs) ad grouded capacitors, which ca realize thorder mixed-mode (icludig voltage, curret, trasadmittace, ad trasimpedace modes) uiversal filterig resposes (low-pass, high-pass, bad-pass, badreject, ad all-pass) from the same topology. However, the structure [19] offers three followig disadvatages: (i) eed of extra ivertig amplifiers for realizig voltage ad trasadmittace modes allpass sigals, (ii) eed of the two same th iput curret (I ) for costructig curret output ad voltage output, ad (iii) icoveiet iput currets settigs for realizig curret ad trasimpedace modes highpass, badreject, ad allpass sigals. Therefore, i 2012, a ew th-order mixed-mode filter was proposed [20]. The structure, reported i [20], ca overcome the above three disadvatages but it eed to use +3 active elemets (i.e. OTAs) i additio to grouded capacitors. Although the th-order mixed-mode structure reported i [18] uses oly +1 active elemets (i.e. DDCCs) i additio to grouded capacitors ad +2 resistors, the DDCCs are more complex active elemets tha CCIIs. I 2009, a good high-order curret-mode ad trasimpedace-mode uiversal filter was proposed i [15]. The filter [15] employs oly +1 active elemets (i.e. multiple outputs CCIIs (MOCCIIs)) i additio to grouded capacitors ad +1 resistors but it ca ot be used i voltage ad trasadmittace modes. 32

2 Therefore, this leads to prospective research work: ivestigatig ad developig a high-order mixed-mode (icludig voltage, curret, trasadmittace, ad trasimpedace modes) uiversal filter structure usig reduced umber (o more tha +1) of active compoets which have the simpler structure tha DDCC. I this paper, the proposed high-order mixed-mode uiversal filter uses oly +1 CCIIs (with the simpler structure tha DDCC), i additio to grouded capacitors ad +2 resistors, which ca realize th-order voltage, curret, trasadmittace, ad trasimpedace modes uiversal filterig resposes (lowpass, high-pass, bad-pass, bad-reject, ad all-pass) from the same topology. It should be oted that up util ow, o previous papers have reported a high-order CCII-based mixed-mode uiversal filter. Moreover, the proposed highorder mixed-mode circuit does ot eed the two same th iput curret (I ) for costructig curret output ad voltage output ad also does ot eed extra ivertig-type or double-type amplifiers for special iput sigals. Furthermore, the ew proposed structure provides more coveiet iput curret settigs tha [19] for realizig curret ad trasimpedace modes highpass, badreject, ad allpass sigals. For example, the ew structure uses a sigle curret iput sigal istead of same curret iput sigals [19] for realizig the th-order high-pass filter respose. Therefore, the proposed circuit also ca overcome the above three disadvatages. With respect to the refereces [19, 20], the proposed structure uses less umber of active compoets. With respect to the referece [18], the proposed circuit uses the active compoets with simpler structure. With respect to the referece [15], the proposed circuit ot oly realizes high-order curret-mode ad trasimpedace-mode uiversal filterig resposes but also achieves high-order voltage ad trasadmittace modes uiversal filterig resposes. II. HIGH-ORDER CCII-BASED MIXED-MODE FILTER Figure 1 shows the proposed mixed-mode th-order uiversal filter structure where I, I -1, I -2,, I 2, I 1, I 0 are the filter iput currets ad V, V -1, V -2,, V 2, V 1, V 0 are the filter iput voltages whose settig determie the filter fuctios as show later, I out ad V out are the filter curret output ad voltage output, respectively. The choice of the subscript +/- of the output termial Z +/- i the CCII() depeds o a eve/odd order of the high-order filter, respectively. Usig stadard otatio, the port relatios of a CCII ca be characterized by I Y = 0, V X = V Y ad I Z ± = ± I X. The multiple curret outputs of CCII() ca be simply recostructed usig curret mirrors. Moreover, all curret outputs have very high output impedace. 33 Routie circuit aalysis for Figure 1 yields the followig trasfer fuctios: V Figure 1. Proposed mixed-mode th-order uiversal filter structure. out ad I out i which Nv( s) N ( s) i (1) G D( ) 1 s Nv( s) N ( s) i (2) D( s) i i 1 aigiv is Nv( s) (3) i0

3 i i 1 aiiis N ( s) (4) i i0 i D( s) 1 ais (5) i0 where a C i i1 (6) k a k Ci G j for k 1,2,3,..., 1 (7) i1 jk1 a0 G j (8) j1 From equatio (1)-(8), the high-order mixed-mode uiversal filter trasfer fuctios are obtaied accordig to iput voltage or curret coditios as follows. Part I: If I = I -1 = I -2 = = I 2 = I 1 = I 0 = 0, the followig th-order voltage-mode ad trasadmittacemode filter resposes ca be obtaied as below. (i) Highpass: V = V i, ad all the other iput voltages are zero (grouded). (ii) Lowpass: V 0 = V i, ad all the other iput voltages are zero (grouded). (iii) badpass: If is eve, the V (/2) = V i, whilst all the other iput voltages are zero (grouded). If is odd, the the iput curret V i is applied to either V (-1)/2 or V (+1)/2, whilst all the other iput voltages are zero (grouded). (iv) Bad-reject: V = V 0 = V i, ad all the other iput voltages are zero (grouded). (v) All-pass: V = V -1 = V -2 = = V 2 = V 1 = V 0 = V i ad G = G -1 = = G 1 = G 0 Part II: If V = V -1 = V -2 = = V 2 = V 1 = V 0 = 0, the followig th-order curret-mode ad trasimpedacemode filter resposes ca be obtaied as below. (i) Highpass: I = I i, ad all the other iput currets are zero. (ii) Lowpass: I 0 = I i, ad all the other iput currets are zero. (iii) badpass: If is eve, the I (/2) = I i, whilst all the other iput currets are zero. If is odd, the the iput curret I i is applied to either I (-1)/2 or I (+1)/2, whilst all the other iput currets are zero. (iv) Bad-reject: I = I 0 = I i, ad all the other iput currets are zero. (v) All-pass: I = I -1 = I -2 = = I 2 = I 1 = I 0 = I i. Note that there are o critical compoet-matchig coditios or cacellatio costraits i the desig except the trascoductace/voltage allpass respose. Moreover, the structure does ot eed ivertig-type iput curret sigals or double-type amplifier for realizig ay filter trasfer fuctios ad also does ot eed to chage the etwork topology. Observig all of the coefficiets i D(s) (i.e., a i,), because a cosists of the product of all capacitaces,, a -i cosists of the product of -i capacitaces ad i coductaces, ad a 0 cosists of the product of all coductaces, all filterig parameters produced from the coefficiet i the deomiator are orthogoally cotrollable. I additio to this advatage, the coefficiet sesitivity to each capacitace or each coductace is easily calculated ad equal to 0 or 1, both of which are low. To illustrate the proposed mixed-mode high-order filter structure, Figure 2 shows a sixth-order trasadmittace-mode ad voltage-mode highpass filter. Figure 3 shows a sixth-order curret-mode ad trasimpedace-mode badpass filter. Figure 4 shows a sixth-order trasadmittace-mode ad voltage-mode lowpass filter. 34

4 Figure 2. Proposed sixth-order trasadmittace-mode ad voltagemode high-pass filter structure. Figure 3. Proposed sixth-order curret-mode ad trasimpedacemode bad-pass filter structure. 35

5 III. H-SPICE SIMULATIONS A CMOS implemetatio of the CCII± is show i Figure 5 [21] with the NMOS trasistor aspect ratios (W/L=5μm/1μm) ad PMOS trasistor aspect ratios (W/L=10μm/1μm). Note that the multiple curret outputs of CCII applyig the realizatio of curret replicas are very simple. To verify the theoretical aalysis of the high-order mixed-mode uiversal filters, the H-SPICE simulatios, usig the TSMC 0.25μm process for the proposed circuits of Figure 1, were performed with the compoet values: (i) R 0 = R 1 = = R 6 = R 7 = 10kΩ, ad C 1 = C 2 = = C 5 = C 6 = 5pF for the sixth-order high-pass, low-pass, bad-pass, ad bad-reject filters of the Figure 1, leadig to a ceter frequecy of f 0 = 3.183MHz, ad (ii) C 1 = C 2 = C 3 = 5pF, R 1 = 20kΩ, R 2 = 10kΩ, ad R 3 = 5kΩ for the third-order allpass filter of the Figure 1, leadig to a ceter frequecy of f 0 = 3.183MHz. Their supply voltages are V DD =-Vss = 1.25V, V b1 = -0.3V, ad V b2 = -0.6V. Figure 6 presets the simulated sixth-order lowpass, badpass, highpass, ad bad-reject amplitude-frequecy resposes of the proposed voltage-mode (VM) ad trasadmittace-mode (TAM) filters with the ormalized trasadmittace magitude = 20 log 10000I out / V i db due to R 7 =10 kω. Figure 7 presets the simulated third-order all-pass phase ad amplitudefrequecy resposes of the proposed curret-mode (CM) ad trasimpedace-mode (TIM) filters with the ormalized trasimpedaces magitude = 20 log V out / I i db due to R 7 =10 kω. Although ot icluded i this paper, it ca be show that the other simulated results are very similar to the above simulated results. As ca be see, there is a close agreemet betwee theory ad simulatio. Figure 4. Proposed sixth-order trasadmittace-mode ad voltagemode low-pass filter structure. 36

6 phase(degree) magitude(db) magitude(db) Iteratioal Joural of Emergig Techology ad Advaced Egieerig Figure 5. CMOS implemetatio of the CCII± frequecy(hz) Figure 6. Amplitude-frequecy resposes of the proposed ormalized TAM ad VM sixth-order filterig sigals (, simulated highpass; *, simulated lowpass; Δ, simulated badpass;, simulated badreject; ad,theoretical curve ) frequecy(hz) Figure 7. Phase ad amplitude frequecy resposes of the proposed ormalized TIM ad CM third-order all-pass sigals (*, simulated phase;, simulated amplitude; ad,theoretical curve) IV. CONCLUSIONS Usig oly +1 CCIIs, grouded capacitors, ad +2 resistors, a mixed-mode uiversal high-order filter is preseted which ca realize th-order lowpass, highpass, badpass, bad-reject, ad allpass resposes. Moreover, the proposed high-order circuit offers the followig advatages: the miimum active compoets, usig grouded capacitors attractive for itegratio, high output impedace good for cascadability, o eed to chage the filter topology, o compoet-value costraits except the trasadmittace/voltage allpass respose, o eed of ivertig or double-type amplifiers for special iput sigals, ad low active ad passive sesitivities. As far as active compoets is cocered, the proposed th-order mixedmode uiversal filter usig +1 CCIIs is the miimum active compoets. H-Spice simulatios cofirm the theoretical predictios. Ackowledgemets The author would like to thak the Miistry of Sciece ad Techology (formerly Natioal Sciece Coucil) of Taiwa, R. O. C. The Miistry of Sciece ad Techology, Taiwa, R. O. C. supported this work uder grat umber NSC E REFERENCES [1] C. M. Chag, ad B. M. Al-Hashimi, Aalytical sythesis of curret-mode high-order OTA-C filters, IEEE Tras. Circuits Syst. I: Fudam. Theory Appl., vol. 50, o. 9, pp , [2] C. M. Chag, B. M. Al-Hashimi, Y. Su, ad J. N. Ross, New highorder filter structures usig sigle-eded-iput OTAs ad grouded capacitors, IEEE Tras. Circuits Syst. II: Exp. Briefs, vol. 51, o. 9, pp , 2004 [3] C. M. Chag, C. L. Hou, W. Y. Chug, J. W. Horg, ad C. K. Tu, Aalytical sythesis of high-order sigle-iput OTA-grouded C all-pass ad bad-reject filter structures, IEEE Tras. Circuits Syst. I: Regular Papers, vol. 53, o. 3, pp , [4] C. M. Chag, Aalytical sythesis of the digitally programmable voltage-mode OTA-C uiversal biquad, IEEE Tras. Circuits Syst. II: Exp. Briefs, vol. 53, o. 8, pp , 2006 [5] S. H. Tu, C. M. Chag, N. J. Ross, ad M. N. S. Swamy, Aalytical sythesis of curret-mode high-order sigle-eded-iput OTA ad equal-capacitor elliptic filter structures with the miimum umber of compoets, IEEE Trasactios o Circuits ad Systems-Part I: Regular Papers, vol. 54, o. 10, pp , [6] C. M. Chag, A. M. Solima, ad M.N.S. Swamy, Aalytical sythesis of low-sesitivity high-order voltage-mode DDCC ad FDCCII-grouded R ad C all-pass filter structures, IEEE Trasactios o Circuits ad Systems-Part I: Regular Papers, vol. 54, o. 7, pp , [7] C. M. Chag, ad M. N. S. Swamy, Aalytical sythesis ad compariso of voltage-mode th-order OTA-C uiversal filter structures, Iteratioal Joural of Circuit Theory ad Applicatios, vol. 40, o. 5, pp ,

7 [8] C. M. Chag, ad M. N. S. Swamy, Aalytical sythesis of odd/eve-th-order elliptic Cauer filter structures usig OTRAs, Iteratioal Joural of Circuit Theory ad Applicatios, vol. 41, o. 12, pp , [9] J. W. Horg, Aalytical sythesis of geeral high-order voltage/curret trasfer fuctios usig CCIIs, Microelectroics Joural, vol. 43, o. 8, pp , [10] C. Acar, Nth-order allpass voltage trasfer fuctio sythesis usig CCII+s: Sigal-flow graph, Electroics Letters, vol. 32, o. 8, pp , [11] C.Acar, Nth-order lowpass voltage trasfer fuctio sythesis usig CCII+s: sigal-flow graph approach, Electroics Letters, vol. 32, o. 3, pp , [12] C. Acar ad S. Özoğuz, High-order voltage trasfer fuctio sythesis usig CCII+ based uity gai curret amplifiers, Electroics Letters, vol. 32, o. 22, pp , [13] E. Yuce ad S. Miaei, ICCII-based uiversal curret-mode aalog filter employig oly grouded passive compoets, Aalog Itegrated Circuits ad Sigal Processig, vol. 58, o. 2, pp , [14] E. Yuce ad S. Miaei, O the realizatio of high-order curretmode filter employig curret cotrolled coveyors, Computers & Electrical Egieerig, vol. 34, o. 3, pp , [15] J. W. Horg, High-order curret-mode ad trasimpedace-mode uiversal filters with multiple-iputs ad two-outputs usig MOCCIIs, Radioegieerig, vol. 18, o. 4, pp , [16] H. A. Alzaher, N. A. Tasadduq, ad O. Al-Ees, Digitally programmable high-order curret-mode uiversal filters, Aalog Itegrated Circuits ad Sigal Processig, vol. 67, o. 2, pp , [17] C. N. Lee, High-order curret-mode uiversal filter usig CCIIs ad grouded passive compoets, Iteratioal Joural of Emergig Techology ad Advaced Egieerig, vol. 3, o. 8, pp , [18] C. M. Chag, C. N. Lee, C. L. Hou, J. W. Horg, ad C. K. Tu, High-order DDCC-based geeral mixed-mode uiversal filter, IEE Proceedigs Circuits, Devices ad Systems, vol. 153, o. 5, pp , [19] C. N. Lee ad C. M. Chag, High-order mixed-mode OTA-C uiversal filter AEU-Iteratioal Joural of Electroics ad Commuicatios, vol. 63, o. 6, pp , [20] C. N. Lee, High-order multiple-mode ad trasadmittace-mode OTA-C uiversal filters, Joural of Circuits Systems ad Computers, vol. 21, o. 5, (21 pages), [21] C. Acar, ad H. Kutma Limitatios o iput sigal level i voltage mode active-rc filters usig curret coveyors, Microelectroics Joural, Vol. 30, No. 1, 1999, pp

A 5th order video band elliptic filter topology using OTRA based Fleischer Tow Biquad with MOS-C Realization

A 5th order video band elliptic filter topology using OTRA based Fleischer Tow Biquad with MOS-C Realization Natural ad Egieerig Scieces 44 olume 1, No. 2, 44-52, 2016 A 5th order video bad elliptic filter topology usig OTA based Fleischer Tow Biquad with MOS-C ealiatio Ahmet Gökçe 1*, Uğur Çam 2 1 Faculty of

More information

DIGITALLY TUNED SINUSOIDAL OSCILLATOR USING MULTIPLE- OUTPUT CURRENT OPERATIONAL AMPLIFIER FOR APPLICATIONS IN HIGH STABLE ACOUSTICAL GENERATORS

DIGITALLY TUNED SINUSOIDAL OSCILLATOR USING MULTIPLE- OUTPUT CURRENT OPERATIONAL AMPLIFIER FOR APPLICATIONS IN HIGH STABLE ACOUSTICAL GENERATORS Molecular ad Quatum Acoustics vol. 7, (6) 95 DGTALL TUNED SNUSODAL OSCLLATOR USNG MULTPLE- OUTPUT CURRENT OPERATONAL AMPLFER FOR APPLCATONS N HGH STABLE ACOUSTCAL GENERATORS Lesław TOPÓR-KAMŃSK Faculty

More information

A SIMPLE METHOD OF GOAL DIRECTED LOSSY SYNTHESIS AND NETWORK OPTIMIZATION

A SIMPLE METHOD OF GOAL DIRECTED LOSSY SYNTHESIS AND NETWORK OPTIMIZATION 49 A SIMPL MOD OF GOAL DIRCD LOSSY SYNSIS AND NWORK OPIMIZAION K. ájek a),. Michal b), J. Sedláek b), M. Steibauer b) a) Uiversity of Defece, Kouicova 65,63 00 ro,czech Republic, b) ro Uiversity of echology,

More information

Design of FPGA- Based SPWM Single Phase Full-Bridge Inverter

Design of FPGA- Based SPWM Single Phase Full-Bridge Inverter Desig of FPGA- Based SPWM Sigle Phase Full-Bridge Iverter Afarulrazi Abu Bakar 1, *,Md Zarafi Ahmad 1 ad Farrah Salwai Abdullah 1 1 Faculty of Electrical ad Electroic Egieerig, UTHM *Email:afarul@uthm.edu.my

More information

PRACTICAL FILTER DESIGN & IMPLEMENTATION LAB

PRACTICAL FILTER DESIGN & IMPLEMENTATION LAB 1 of 7 PRACTICAL FILTER DESIGN & IMPLEMENTATION LAB BEFORE YOU BEGIN PREREQUISITE LABS Itroductio to Oscilloscope Itroductio to Arbitrary/Fuctio Geerator EXPECTED KNOWLEDGE Uderstadig of LTI systems. Laplace

More information

A SIMPLE METHOD OF GOAL DIRECTED LOSSY SYNTHESIS AND NETWORK OPTIMIZATION

A SIMPLE METHOD OF GOAL DIRECTED LOSSY SYNTHESIS AND NETWORK OPTIMIZATION A SIMPL MOD OF GOAL DIRCD LOSSY SYNSIS AND NWORK OPIMIZAION Karel ájek a), ratislav Michal, Jiří Sedláček a) Uiversity of Defece, Kouicova 65,63 00 Bro,Czech Republic, Bro Uiversity of echology, Kolejí

More information

SEVEN-LEVEL THREE PHASE CASCADED H-BRIDGE INVERTER WITH A SINGLE DC SOURCE

SEVEN-LEVEL THREE PHASE CASCADED H-BRIDGE INVERTER WITH A SINGLE DC SOURCE SEVEN-LEVEL THREE PHASE CASCADED H-BRIDGE INVERTER WITH A SINGLE DC SOURCE T. Porselvi 1 ad Ragaath Muthu 1 Sri Sairam Egieerig College, Cheai, Idia SSN College of Egieerig, Cheai, Idia E-Mail: tporselvi@yahoo.com

More information

Massachusetts Institute of Technology Dept. of Electrical Engineering and Computer Science Fall Semester, Introduction to EECS 2.

Massachusetts Institute of Technology Dept. of Electrical Engineering and Computer Science Fall Semester, Introduction to EECS 2. Massachusetts Istitute of Techology Dept. of Electrical Egieerig ad Computer Sciece Fall Semester, 006 6.08 Itroductio to EECS Prelab Exercises Pre-Lab#3 Modulatio, demodulatio, ad filterig are itegral

More information

Department of Electrical and Computer Engineering, Cornell University. ECE 3150: Microelectronics. Spring Due on April 26, 2018 at 7:00 PM

Department of Electrical and Computer Engineering, Cornell University. ECE 3150: Microelectronics. Spring Due on April 26, 2018 at 7:00 PM Departmet of Electrical ad omputer Egieerig, orell Uiersity EE 350: Microelectroics Sprig 08 Homework 0 Due o April 6, 08 at 7:00 PM Suggested Readigs: a) Lecture otes Importat Notes: ) MAKE SURE THAT

More information

(2) The MOSFET. Review of. Learning Outcome. (Metal-Oxide-Semiconductor Field Effect Transistor) 2.0) Field Effect Transistor (FET)

(2) The MOSFET. Review of. Learning Outcome. (Metal-Oxide-Semiconductor Field Effect Transistor) 2.0) Field Effect Transistor (FET) EEEB73 Electroics Aalysis & esig II () Review of The MOSFET (Metal-Oxide-Semicoductor Field Effect Trasistor) Referece: Neame, Chapter 3 ad Chapter 4 Learig Outcome Able to describe ad use the followig:

More information

Research Article New Topologies of Lossless Grounded Inductor Using OTRA

Research Article New Topologies of Lossless Grounded Inductor Using OTRA Joural of Electrical ad omuter Egieerig Volume 2, Article ID 753, 6 ages doi:.55/2/753 Research Article New Toologies of Lossless Grouded Iductor Usig OTRA Rajeshwari Padey, Neeta Padey, Sajal K. Paul,

More information

ICM7213. One Second/One Minute Timebase Generator. Features. Description. Ordering Information. Pinout. August 1997

ICM7213. One Second/One Minute Timebase Generator. Features. Description. Ordering Information. Pinout. August 1997 August 997 Features Guarateed V Operatio Very Low Curret Cosumptio (Typ).... µa at V All Outputs TTL Compatible O Chip Oscillator Feedback Resistor Oscillator Requires Oly Exteral compoets: Fixed Capacitor,

More information

A New 3-Bit Integrating Time to Digital Converter Using Time to Voltage Conversion Technique

A New 3-Bit Integrating Time to Digital Converter Using Time to Voltage Conversion Technique Bulleti of Eviromet, Pharmacology ad Life Scieces Bull. Ev. Pharmacol. Life Sci., ol 3 [11] October 2014:115-122 2014 Academy for Eviromet ad Life Scieces, dia Olie SSN 2277-1808 Joural s URL:http://www.bepls.com

More information

Design of FPGA Based SPWM Single Phase Inverter

Design of FPGA Based SPWM Single Phase Inverter Proceedigs of MUCEET2009 Malaysia Techical Uiversities Coferece o Egieerig ad Techology Jue 20-22, 2009, MS Garde,Kuata, Pahag, Malaysia MUCEET2009 Desig of FPGA Based SPWM Sigle Phase Iverter Afarulrazi

More information

COMPRESSION OF TRANSMULTIPLEXED ACOUSTIC SIGNALS

COMPRESSION OF TRANSMULTIPLEXED ACOUSTIC SIGNALS COMPRESSION OF TRANSMULTIPLEXED ACOUSTIC SIGNALS Mariusz Ziółko, Przemysław Sypka ad Bartosz Ziółko Departmet of Electroics, AGH Uiversity of Sciece ad Techology, al. Mickiewicza 3, 3-59 Kraków, Polad,

More information

Measurement of Equivalent Input Distortion AN 20

Measurement of Equivalent Input Distortion AN 20 Measuremet of Equivalet Iput Distortio AN 2 Applicatio Note to the R&D SYSTEM Traditioal measuremets of harmoic distortio performed o loudspeakers reveal ot oly the symptoms of the oliearities but also

More information

A Bipolar Cockcroft-Walton Voltage Multiplier for Gas Lasers

A Bipolar Cockcroft-Walton Voltage Multiplier for Gas Lasers America Joural of Applied cieces 4 (10): 79-799, 007 N 1546-99 007 ciece Publicatios orrespodig Author: A Bipolar ockcroft-walto Voltage Multiplier for Gas Lasers hahid qbal ad Rosli Besar Faculty of Egieerig

More information

EE 508 Lecture 6. Filter Concepts/Terminology Approximation Problem

EE 508 Lecture 6. Filter Concepts/Terminology Approximation Problem EE 508 Lecture 6 Filter Cocepts/Termiology Approximatio Problem Root characterizatio i s-plae (for complex-cojugate roots) s ω Q 2 0 2 + s + ω0 o - relatioship betwee agle θ ad Q of root For low Q, θ is

More information

A New Design of Log-Periodic Dipole Array (LPDA) Antenna

A New Design of Log-Periodic Dipole Array (LPDA) Antenna Joural of Commuicatio Egieerig, Vol., No., Ja.-Jue 0 67 A New Desig of Log-Periodic Dipole Array (LPDA) Atea Javad Ghalibafa, Seyed Mohammad Hashemi, ad Seyed Hassa Sedighy Departmet of Electrical Egieerig,

More information

AME50461 SERIES EMI FILTER HYBRID-HIGH RELIABILITY

AME50461 SERIES EMI FILTER HYBRID-HIGH RELIABILITY PD-94595A AME5046 SERIES EMI FILTER HYBRID-HIGH RELIABILITY Descriptio The AME Series of EMI filters have bee desiged to provide full compliace with the iput lie reflected ripple curret requiremet specified

More information

Tehrani N Journal of Scientific and Engineering Research, 2018, 5(7):1-7

Tehrani N Journal of Scientific and Engineering Research, 2018, 5(7):1-7 Available olie www.jsaer.com, 2018, 5(7):1-7 Research Article ISSN: 2394-2630 CODEN(USA): JSERBR 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38

More information

Cascaded Feedforward Sigma-delta Modulator for Wide Bandwidth Applications

Cascaded Feedforward Sigma-delta Modulator for Wide Bandwidth Applications Tamkag Joural of Sciece ad Egieerig, Vol. 4, No., pp. 55-64 () 55 Cascaded Feedforward Sigma-delta Modulator for Wide Badwidth Applicatios Je-Shiu Chiag, Teg-Hug Chag ad Pou-Chu Chou Departmet of Electrical

More information

A Dual-Band Through-the-Wall Imaging Radar Receiver Using a Reconfigurable High-Pass Filter

A Dual-Band Through-the-Wall Imaging Radar Receiver Using a Reconfigurable High-Pass Filter JOURNAL OF ELECTROMAGNETIC ENGINEERING AND SCIENCE, VOL. 16, NO. 3, 164~168, JUL. 2016 http://dx.doi.org/10.5515/jkiees.2016.16.3.164 ISSN 2234-8395 (Olie) ISSN 2234-8409 (Prit) A Dual-Bad Through-the-Wall

More information

A New Space-Repetition Code Based on One Bit Feedback Compared to Alamouti Space-Time Code

A New Space-Repetition Code Based on One Bit Feedback Compared to Alamouti Space-Time Code Proceedigs of the 4th WSEAS It. Coferece o Electromagetics, Wireless ad Optical Commuicatios, Veice, Italy, November 0-, 006 107 A New Space-Repetitio Code Based o Oe Bit Feedback Compared to Alamouti

More information

Delta- Sigma Modulator based Discrete Data Multiplier with Digital Output

Delta- Sigma Modulator based Discrete Data Multiplier with Digital Output K.Diwakar et al. / Iteratioal Joural of Egieerig ad echology (IJE Delta- Sigma Mulator based Discrete Data Multiplier with Digital Output K.Diwakar #,.ioth Kumar *2, B.Aitha #3, K.Kalaiarasa #4 # Departmet

More information

Delta- Sigma Modulator with Signal Dependant Feedback Gain

Delta- Sigma Modulator with Signal Dependant Feedback Gain Delta- Sigma Modulator with Sigal Depedat Feedback Gai K.Diwakar #1 ad V.Vioth Kumar *2 # Departmet of Electroics ad Commuicatio Egieerig * Departmet of Electroics ad Istrumetatio Egieerig Vel Tech Uiversity,Cheai,

More information

A GHz Constant KVCO Low Phase Noise LC-VCO and an Optimized Automatic Frequency Calibrator Applied in PLL Frequency Synthesizer

A GHz Constant KVCO Low Phase Noise LC-VCO and an Optimized Automatic Frequency Calibrator Applied in PLL Frequency Synthesizer A 4.6-5.6 GHz Costat KVCO Low Phase Noise LC-VCO ad a Optimized Automatic Frequecy Calibrator Applied i PLL Frequecy Sythesizer Hogguag Zhag, Pa Xue, Zhiliag Hog State Key Laboratory of ASIC & System Fuda

More information

A New Basic Unit for Cascaded Multilevel Inverters with the Capability of Reducing the Number of Switches

A New Basic Unit for Cascaded Multilevel Inverters with the Capability of Reducing the Number of Switches Joural of Power Electroics, ol, o, pp 67-677, July 67 JPE --6 http://dxdoiorg/6/jpe67 I(Prit: 98-9 / I(Olie: 9-78 A ew Basic Uit for Cascaded Multi Iverters with the Capability of Reducig the umber of

More information

Outline. Motivation. Analog Functional Testing in Mixed-Signal Systems. Motivation and Background. Built-In Self-Test Architecture

Outline. Motivation. Analog Functional Testing in Mixed-Signal Systems. Motivation and Background. Built-In Self-Test Architecture Aalog Fuctioal Testig i Mixed-Sigal s Jie Qi Dept. of Electrical & Computer Egieerig Aubur Uiversity Co-Advisors: Charles Stroud ad Foster Dai Outlie Motivatio ad Backgroud Built-I Self-Test Architecture

More information

AME28461 SERIES EMI FILTER HYBRID-HIGH RELIABILITY

AME28461 SERIES EMI FILTER HYBRID-HIGH RELIABILITY PD-94597A AME28461 SERIES EMI FILTER HYBRID-HIGH RELIABILITY Descriptio The AME Series of EMI filters have bee desiged to provide full compliace with the iput lie reflected ripple curret requiremet specified

More information

A SELECTIVE POINTER FORWARDING STRATEGY FOR LOCATION TRACKING IN PERSONAL COMMUNICATION SYSTEMS

A SELECTIVE POINTER FORWARDING STRATEGY FOR LOCATION TRACKING IN PERSONAL COMMUNICATION SYSTEMS A SELETIVE POINTE FOWADING STATEGY FO LOATION TAKING IN PESONAL OUNIATION SYSTES Seo G. hag ad hae Y. Lee Departmet of Idustrial Egieerig, KAIST 373-, Kusug-Dog, Taejo, Korea, 305-70 cylee@heuristic.kaist.ac.kr

More information

Radar emitter recognition method based on AdaBoost and decision tree Tang Xiaojing1, a, Chen Weigao1 and Zhu Weigang1 1

Radar emitter recognition method based on AdaBoost and decision tree Tang Xiaojing1, a, Chen Weigao1 and Zhu Weigang1 1 Advaces i Egieerig Research, volume 8 d Iteratioal Coferece o Automatio, Mechaical Cotrol ad Computatioal Egieerig (AMCCE 7) Radar emitter recogitio method based o AdaBoost ad decisio tree Tag Xiaojig,

More information

Lab 2: Common Source Amplifier.

Lab 2: Common Source Amplifier. epartet of Electrical ad Coputer Egieerig Fall 1 Lab : Coo Source plifier. 1. OBJECTIVES Study ad characterize Coo Source aplifier: Bias CS ap usig MOSFET curret irror; Measure gai of CS ap with resistive

More information

Application of Improved Genetic Algorithm to Two-side Assembly Line Balancing

Application of Improved Genetic Algorithm to Two-side Assembly Line Balancing 206 3 rd Iteratioal Coferece o Mechaical, Idustrial, ad Maufacturig Egieerig (MIME 206) ISBN: 978--60595-33-7 Applicatio of Improved Geetic Algorithm to Two-side Assembly Lie Balacig Ximi Zhag, Qia Wag,

More information

ELEC 350 Electronics I Fall 2014

ELEC 350 Electronics I Fall 2014 ELEC 350 Electroics I Fall 04 Fial Exam Geeral Iformatio Rough breakdow of topic coverage: 0-5% JT fudametals ad regios of operatio 0-40% MOSFET fudametals biasig ad small-sigal modelig 0-5% iodes (p-juctio

More information

Lecture 29: Diode connected devices, mirrors, cascode connections. Context

Lecture 29: Diode connected devices, mirrors, cascode connections. Context Lecture 9: Diode coected devices, mirrors, cascode coectios Prof J. S. Smith Cotext Today we will be lookig at more sigle trasistor active circuits ad example problems, ad the startig multi-stage amplifiers

More information

Data Acquisition System for Electric Vehicle s Driving Motor Test Bench Based on VC++ *

Data Acquisition System for Electric Vehicle s Driving Motor Test Bench Based on VC++ * Available olie at www.sciecedirect.com Physics Procedia 33 (0 ) 75 73 0 Iteratioal Coferece o Medical Physics ad Biomedical Egieerig Data Acquisitio System for Electric Vehicle s Drivig Motor Test Bech

More information

MEASUREMENT AND CONTORL OF TOTAL HARMONIC DISTORTION IN FREQUENCY RANGE 0,02-10KHZ.

MEASUREMENT AND CONTORL OF TOTAL HARMONIC DISTORTION IN FREQUENCY RANGE 0,02-10KHZ. ELECTRONICS 00 September, Sozopol, BLGARIA MEASREMENT AND CONTORL OF TOTAL HARMONIC DISTORTION IN FREQENCY RANGE 0,0-0KHZ. Plame Agelov Agelov Faculty for Computer Sciece, Egieerig ad Natural Studies,

More information

Performance analysis of NAND and NOR logic using 14nm technology node

Performance analysis of NAND and NOR logic using 14nm technology node Iteratioal Joural of Pure ad Applied Mathematics Volume 118 No. 18 2018, 4053-4060 ISSN: 1311-8080 (prited versio); ISSN: 1314-3395 (o-lie versio) url: http://www.ijpam.eu ijpam.eu Performace aalysis of

More information

Single Bit DACs in a Nutshell. Part I DAC Basics

Single Bit DACs in a Nutshell. Part I DAC Basics Sigle Bit DACs i a Nutshell Part I DAC Basics By Dave Va Ess, Pricipal Applicatio Egieer, Cypress Semicoductor May embedded applicatios require geeratig aalog outputs uder digital cotrol. It may be a DC

More information

Analysis and Optimization Design of Snubber Cricuit for Isolated DC-DC Converters in DC Power Grid

Analysis and Optimization Design of Snubber Cricuit for Isolated DC-DC Converters in DC Power Grid Aalysis ad Optimizatio Desig of Subber Cricuit for Isolated DC-DC Coverters i DC Power Grid Koji Orikawa Nagaoka Uiversity of Techology Nagaoka, Japa orikawa@st.agaokaut.ac.jp Ju-ichi Itoh Nagaoka Uiversity

More information

Independently tunable high-input impedance voltage-mode universal biquadratic filter using grounded passive components

Independently tunable high-input impedance voltage-mode universal biquadratic filter using grounded passive components Indian Journal of Pure & Applied Physics ol. 5, September 015, pp. 65-64 Independently tunable high-input impedance voltage-mode universal biquadratic filter using grounded passive components Chen-Nong

More information

AN ESTIMATION OF MULTILEVEL INVERTER FED INDUCTION MOTOR DRIVE

AN ESTIMATION OF MULTILEVEL INVERTER FED INDUCTION MOTOR DRIVE 9 IJRIC. All rights reserved. IJRIC www.ijric.org E-ISSN: 76-3336 AN ESTIMATION OF MULTILEVEL INVERTER FED INDUCTION MOTOR DRIVE K.RAMANI AND DR.A. KRISHNAN SMIEEE Seior Lecturer i the Departmet of EEE

More information

R. W. Erickson. Department of Electrical, Computer, and Energy Engineering University of Colorado, Boulder

R. W. Erickson. Department of Electrical, Computer, and Energy Engineering University of Colorado, Boulder R. W. Erickso Departmet of Electrical, Computer, ad Eergy Egieerig Uiversity of Colorado, Boulder 4.2.2. The Power MOSFET Gate Source Gate legths approachig oe micro p - p Cosists of may small ehacemetmode

More information

Lecture 28: MOSFET as an Amplifier. Small-Signal Equivalent Circuit Models.

Lecture 28: MOSFET as an Amplifier. Small-Signal Equivalent Circuit Models. hites, EE 320 ecture 28 Page 1 of 7 ecture 28: MOSFET as a Amplifier. Small-Sigal Equivalet Circuit Models. As with the BJT, we ca use MOSFETs as AC small-sigal amplifiers. A example is the so-called coceptual

More information

Survey of Low Power Techniques for ROMs

Survey of Low Power Techniques for ROMs Survey of Low Power Techiques for ROMs Edwi de Agel Crystal Semicoductor Corporatio P.O Box 17847 Austi, TX 78744 Earl E. Swartzlader, Jr. Departmet of Electrical ad Computer Egieerig Uiversity of Texas

More information

High Speed Area Efficient Modulo 2 1

High Speed Area Efficient Modulo 2 1 High Speed Area Efficiet Modulo 2 1 1-Soali Sigh (PG Scholar VLSI, RKDF Ist Bhopal M.P) 2- Mr. Maish Trivedi (HOD EC Departmet, RKDF Ist Bhopal M.P) Adder Abstract Modular adder is oe of the key compoets

More information

10GBASE-T. length of precoding response, and PMA training

10GBASE-T. length of precoding response, and PMA training 1GBASE-T TxFE solutios, dpsnr vs legth of precodig respose, ad PMA traiig IEEE P82.3a Task Force Austi, May 18-2, 25 Gottfried Ugerboeck 1 Cotets Study of trasmit frot-ed solutios Simple : o digital filterig,

More information

Effective Size Reduction Technique for Microstrip Filters

Effective Size Reduction Technique for Microstrip Filters Joural of Electromagetic Aalysis ad Applicatios, 13, 5, 166-174 http://dx.doi.org/1.436/jemaa.13.547 Published Olie April 13 (http://www.scirp.org/joural/jemaa) Effective Size Reductio Techique for Microstrip

More information

A Simplified Method for Phase Noise Calculation

A Simplified Method for Phase Noise Calculation Poster: T-18 Simplified Method for Phase Noise Calculatio Massoud Tohidia, li Fotowat hmady* ad Mahmoud Kamarei Uiversity of Tehra, *Sharif Uiversity of Techology, Tehra, Ira Outlie Itroductio Prelimiary

More information

LINEAR-PHASE FIR FILTERS: THE WINDOWING METHOD

LINEAR-PHASE FIR FILTERS: THE WINDOWING METHOD LINEAR-PHASE FIR FILTERS: THE WINDOWING ETHOD Prof. Siripog Potisuk FIR Filter Characteristics Completely specified by iput-output relatio: y[ ] b k0 x[ k] b k = filter coefficiets ad +1 = filter legth

More information

Sensors & Transducers 2015 by IFSA Publishing, S. L.

Sensors & Transducers 2015 by IFSA Publishing, S. L. Sesors & Trasducers 215 by IFSA Publishig, S. L. http://www.sesorsportal.com Uiversal Sesors ad Trasducers Iterface for Mobile Devices: Metrological Characteristics * Sergey Y. YURISH ad Javier CAÑETE

More information

INCREASE OF STRAIN GAGE OUTPUT VOLTAGE SIGNALS ACCURACY USING VIRTUAL INSTRUMENT WITH HARMONIC EXCITATION

INCREASE OF STRAIN GAGE OUTPUT VOLTAGE SIGNALS ACCURACY USING VIRTUAL INSTRUMENT WITH HARMONIC EXCITATION XIX IMEKO World Cogress Fudametal ad Applied Metrology September 6, 9, Lisbo, Portugal INCREASE OF STRAIN GAGE OUTPUT VOLTAGE SIGNALS ACCURACY USING VIRTUAL INSTRUMENT WITH HARMONIC EXCITATION Dalibor

More information

Analysis of SDR GNSS Using MATLAB

Analysis of SDR GNSS Using MATLAB Iteratioal Joural of Computer Techology ad Electroics Egieerig (IJCTEE) Volume 5, Issue 3, Jue 2015 Aalysis of SDR GNSS Usig MATLAB Abstract This paper explais a software defied radio global avigatio satellite

More information

WAVE-BASED TRANSIENT ANALYSIS USING BLOCK NEWTON-JACOBI

WAVE-BASED TRANSIENT ANALYSIS USING BLOCK NEWTON-JACOBI WAVE-BASED TRANSIENT ANALYSIS USING BLOCK NEWTON-JACOBI Muhammad Kabir McGill Uiversity Departmet of Electrical ad Computer Egieerig Motreal, QC H3A 2A7 Email: muhammad.kabir@mail.mcgill.ca Carlos Christofferse

More information

Reducing Power Dissipation in Complex Digital Filters by using the Quadratic Residue Number System Λ

Reducing Power Dissipation in Complex Digital Filters by using the Quadratic Residue Number System Λ Reducig Power Dissipatio i Complex Digital Filters by usig the Quadratic Residue Number System Λ Agelo D Amora, Alberto Naarelli, Marco Re ad Gia Carlo Cardarilli Departmet of Electrical Egieerig Uiversity

More information

APPLICATION NOTE UNDERSTANDING EFFECTIVE BITS

APPLICATION NOTE UNDERSTANDING EFFECTIVE BITS APPLICATION NOTE AN95091 INTRODUCTION UNDERSTANDING EFFECTIVE BITS Toy Girard, Sigatec, Desig ad Applicatios Egieer Oe criteria ofte used to evaluate a Aalog to Digital Coverter (ADC) or data acquisitio

More information

R. W. Erickson. Department of Electrical, Computer, and Energy Engineering University of Colorado, Boulder

R. W. Erickson. Department of Electrical, Computer, and Energy Engineering University of Colorado, Boulder R. W. Erickso Departmet of Electrical, Computer, ad Eergy Egieerig Uiversity of Colorado, Boulder Specific o-resistace R o as a fuctio of breakdow voltage V B Majority-carrier device: AARR #$ = kk μμ $

More information

SETTLING-TIME-ORIENTED DESIGN PROCEDURE FOR TWO-STAGE AMPLIFIERS WITH CURRENT-BUFFER MILLER COMPENSATION

SETTLING-TIME-ORIENTED DESIGN PROCEDURE FOR TWO-STAGE AMPLIFIERS WITH CURRENT-BUFFER MILLER COMPENSATION SETTING-TIME-ORIENTED DESIGN PROCEDURE FOR TWO-STAGE AMPIFIERS WITH CURRENT-BUFFER MIER COMPENSATION ANDREA PUGIESE, 1 FRANCESCO AMOROSO, 1 GREGORIO CAPPUCCINO, 1 GIUSEPPE COCORUO 1 Key words: Operatioal

More information

By: Pinank Shah. Date : 03/22/2006

By: Pinank Shah. Date : 03/22/2006 By: Piak Shah Date : 03/22/2006 What is Strai? What is Strai Gauge? Operatio of Strai Gauge Grid Patters Strai Gauge Istallatio Wheatstoe bridge Istrumetatio Amplifier Embedded system ad Strai Gauge Strai

More information

OPTIMIZATION OF RNS FIR FILTERS FOR 6-INPUTS LUT BASED FPGAS

OPTIMIZATION OF RNS FIR FILTERS FOR 6-INPUTS LUT BASED FPGAS OPTIMIZATION OF RNS FIR FILTERS FOR 6-INPUTS LUT BASED FPGAS G.C. Cardarilli, M. Re, A. Salsao Uiversity of Rome Tor Vergata Departmet of Electroic Egieerig Via del Politecico 1 / 00133 / Rome / ITAL {marco.re,

More information

CONTROLLING FREQUENCY INFLUENCE ON THE OPERATION OF SERIAL THYRISTOR RLC INVERTERS

CONTROLLING FREQUENCY INFLUENCE ON THE OPERATION OF SERIAL THYRISTOR RLC INVERTERS EETRONIS - September, Sozopol, BUGARIA ONTROING FREQUENY INFUENE ON THE OPERATION OF SERIA THYRISTOR R INVERTERS Evgeiy Ivaov Popov, iliya Ivaova Pideva, Borislav Nikolaev Tsakovski Departmet of Power

More information

Problem of calculating time delay between pulse arrivals

Problem of calculating time delay between pulse arrivals America Joural of Egieerig Research (AJER) 5 America Joural of Egieerig Research (AJER) e-issn: 3-847 p-issn : 3-936 Volume-4, Issue-4, pp-3-4 www.ajer.org Research Paper Problem of calculatig time delay

More information

信號與系統 Signals and Systems

信號與系統 Signals and Systems Sprig 24 信號與系統 Sigals ad Systems Chapter SS- Sigals ad Systems Feg-Li Lia NTU-EE Feb4 Ju4 Figures ad images used i these lecture otes are adopted from Sigals & Systems by Ala V. Oppeheim ad Ala S. Willsky,

More information

Measurements of weld geometry using image processing technology

Measurements of weld geometry using image processing technology Measuremets of weld geometry usig image processig techology Chia-Lug Chag a, Ye-Hug Che b a Departmet of Mechaical Egieerig, Natioal Yuli Uiversity of Sciece ad Techology, Douliu, Yuli, Taiwa, ROC b Departmet

More information

Research Article Dominant Mode Wave Impedance of Regular Polygonal Waveguides

Research Article Dominant Mode Wave Impedance of Regular Polygonal Waveguides Microwave Sciece ad Techology, Article ID 485794, 4 pages http://dx.doi.org/10.1155/2014/485794 Research Article Domiat Mode Wave Impedace of Regular Polygoal Waveguides Vyacheslav V. Komarov Istitute

More information

Improvement of Commutation Time in Matrix Converter

Improvement of Commutation Time in Matrix Converter Iteratioal Joural of Scietific & Egieerig Research Volume 3, Issue 6, Jue-01 1 ISSN 9-5518 Improvemet of Commutatio Time i Matrix Coverter Idrajit Sarkar, Sumata Kumar Show, Prasid Syam Abstract Matrix

More information

Laboratory Exercise 3: Dynamic System Response Laboratory Handout AME 250: Fundamentals of Measurements and Data Analysis

Laboratory Exercise 3: Dynamic System Response Laboratory Handout AME 250: Fundamentals of Measurements and Data Analysis Laboratory Exercise 3: Dyamic System Respose Laboratory Hadout AME 50: Fudametals of Measuremets ad Data Aalysis Prepared by: Matthew Beigto Date exercises to be performed: Deliverables: Part I 1) Usig

More information

A 1.2V High Band-Width Analog Multiplier in 0.18µm CMOS Technology

A 1.2V High Band-Width Analog Multiplier in 0.18µm CMOS Technology Iteratioal Review of Electrical Egieerig (I.R.E.E.), Vol. 5, N. March-pril 00.V High Bad-Width alog Multiplier i 0.8µm CMOS Techology mir Ebrahimi, Hossei Miar Naimi bstract alog multiplier is a importat

More information

Total Harmonics Distortion Reduction Using Adaptive, Weiner, and Kalman Filters

Total Harmonics Distortion Reduction Using Adaptive, Weiner, and Kalman Filters Wester Michiga Uiversity ScholarWorks at WMU Master's Theses Graduate College 6-2016 Total Harmoics Distortio Reductio Usig Adaptive, Weier, ad Kalma Filters Liqaa Alhafadhi Wester Michiga Uiversity, liquaa.alhafadhi@yahoo.com

More information

Subscriber Pulse Metering (SPM) Detection

Subscriber Pulse Metering (SPM) Detection Subscriber Pulse Meterig () Detectio Versatile telephoe call-charge ad security fuctios for PBX, Payphoe ad Pair-Gai applicatios - employig CML s family of 12kHz ad 16kHz ICs INNOVATIONS INV/Telecom//1

More information

信號與系統 Signals and Systems

信號與系統 Signals and Systems Sprig 2 信號與系統 Sigals ad Systems Chapter SS- Sigals ad Systems Feg-Li Lia NTU-EE Feb Ju Figures ad images used i these lecture otes are adopted from Sigals & Systems by Ala V. Oppeheim ad Ala S. Willsky,

More information

A Novel Three Value Logic for Computing Purposes

A Novel Three Value Logic for Computing Purposes Iteratioal Joural o Iormatio ad Electroics Egieerig, Vol. 3, No. 4, July 23 A Novel Three Value Logic or Computig Purposes Ali Soltai ad Saeed Mohammadi Abstract The aim o this article is to suggest a

More information

Computational Algorithm for Higher Order Legendre Polynomial and Gaussian Quadrature Method

Computational Algorithm for Higher Order Legendre Polynomial and Gaussian Quadrature Method Computatioal Algorithm for Higher Order Legre olyomial ad Gaussia Quadrature Method Asif M. Mughal, Xiu Ye ad Kamra Iqbal Dept. of Applied Sciece, Dept. of Mathematics ad Statistics, Dept. of Systems Egieerig

More information

Encode Decode Sample Quantize [ ] [ ]

Encode Decode Sample Quantize [ ] [ ] Referece Audio Sigal Processig I Shyh-Kag Jeg Departmet of Electrical Egieerig/ Graduate Istitute of Commuicatio Egieerig M. Bosi ad R. E. Goldberg, Itroductio to Digital Audio Codig ad Stadards, Kluwer

More information

Performances Evaluation of Reflectarray Antenna using Different Unit Cell Structures at 12GHz

Performances Evaluation of Reflectarray Antenna using Different Unit Cell Structures at 12GHz Idia Joural of Sciece ad Techology, Vol 9(46), DOI: 1.17485/ijst/216/v9i46/17146, December 216 ISSN (Prit) : 974-6846 ISSN (Olie) : 974-5645 Performaces Evaluatio of Reflectarray Atea usig Differet Uit

More information

11.11 Two-Channel Filter Banks 1/27

11.11 Two-Channel Filter Banks 1/27 . Two-Chael Filter Baks /7 Two-Chael Filter Baks M We wat to look at methods that are ot based o the DFT I geeral we wat to look at Fig..6 rom Porat ad igure out how to choose i & i to get Perect Reco

More information

A Miniaturized Non-ResonantLoaded Monopole Antenna for HF-VHF Band. Mehdi KarimiMehr, Ali Agharasouli

A Miniaturized Non-ResonantLoaded Monopole Antenna for HF-VHF Band. Mehdi KarimiMehr, Ali Agharasouli Iteratioal Joural of Scietific & Egieerig Research, Volume 8, Issue 4, April-017 109 ISSN 9-5518 A Miiaturized No-ResoatLoaded Moopole Atea for HF-VHF Bad Mehdi KarimiMehr, Ali Agharasouli Abstract I this

More information

The Fast Haar Wavelet Transform for Signal & Image Processing

The Fast Haar Wavelet Transform for Signal & Image Processing Vol. 7, No., The Fast Haar Wavelet Trasform for Sigal & Image Processig V.Ashok T.Balakumara C.Gowrishakar epartmet of BE, epartmet of ECE epartmet of EEE Velalar College of Egg.&Tech. Velalar College

More information

A Study of Implementation of Digital Signal Processing for Adaptive Array Antenna

A Study of Implementation of Digital Signal Processing for Adaptive Array Antenna MASTER THESIS A Study of Implemetatio of Digital Sigal Processig for Adaptive Array Atea Supervisor: Associate Prof. Hiroyuki ARAI Submitted o Feb., Divisio of Electrical Ad Computer Egieerig, Yokohama

More information

INF 5460 Electronic noise Estimates and countermeasures. Lecture 11 (Mot 8) Sensors Practical examples

INF 5460 Electronic noise Estimates and countermeasures. Lecture 11 (Mot 8) Sensors Practical examples IF 5460 Electroic oise Estimates ad coutermeasures Lecture 11 (Mot 8) Sesors Practical examples Six models are preseted that "ca be geeralized to cover all types of sesors." amig: Sesor: All types Trasducer:

More information

Analysis, Design and Experimentation of Series-parallel LCC Resonant Converter for Constant Current Source.

Analysis, Design and Experimentation of Series-parallel LCC Resonant Converter for Constant Current Source. This article has bee accepted ad published o J-STAGE i advace of copyeditig. Cotet is fial as preseted. Aalysis, Desig ad Experimetatio of Series-parallel LCC Resoat Coverter for Costat Curret Source.

More information

CHAPTER 6 IMPLEMENTATION OF DIGITAL FIR FILTER

CHAPTER 6 IMPLEMENTATION OF DIGITAL FIR FILTER CHAPTER 6 IMPLEMENTATION OF DIGITAL FIR FILTER 6.1 INTRODUCTION The digital FIR filters are commo compoets i may digital sigal processig (DSP) systems. There are various applicatios like high speed/low

More information

EECE 301 Signals & Systems Prof. Mark Fowler

EECE 301 Signals & Systems Prof. Mark Fowler EECE 3 Sigals & Systems Prof. Mark Fowler Note Set #6 D-T Systems: DTFT Aalysis of DT Systems Readig Assigmet: Sectios 5.5 & 5.6 of Kame ad Heck / Course Flow Diagram The arrows here show coceptual flow

More information

Methods to Reduce Arc-Flash Hazards

Methods to Reduce Arc-Flash Hazards Methods to Reduce Arc-Flash Hazards Exercise: Implemetig Istataeous Settigs for a Maiteace Mode Scheme Below is a oe-lie diagram of a substatio with a mai ad two feeders. Because there is virtually o differece

More information

Performance and Analysis with Power Quality improvement with Cascaded Multi-Level Inverter Fed BLDC Motor Drive

Performance and Analysis with Power Quality improvement with Cascaded Multi-Level Inverter Fed BLDC Motor Drive Iteratioal Joural of Recet Advaces i Egieerig & Techology (IJRAET) Performace ad Aalysis with Power Quality improvemet with Cascaded Multi-Level Iverter Fed BLDC Motor Drive 1 N. Raveedra, 2 V.Madhu Sudha

More information

Revision: June 10, E Main Suite D Pullman, WA (509) Voice and Fax

Revision: June 10, E Main Suite D Pullman, WA (509) Voice and Fax 1.8.0: Ideal Oeratioal Amlifiers Revisio: Jue 10, 2010 215 E Mai Suite D Pullma, WA 99163 (509) 334 6306 Voice ad Fax Overview Oeratioal amlifiers (commoly abbreviated as o-ams) are extremely useful electroic

More information

Research Article Modeling and Analysis of Cascade Multilevel DC-DC Boost Converter Topologies Based on H-bridge Switched Inductor

Research Article Modeling and Analysis of Cascade Multilevel DC-DC Boost Converter Topologies Based on H-bridge Switched Inductor Research Joural of Applied Scieces, Egieerig ad Techology 9(3): 45-57, 205 DOI:0.9026/rjaset.9.389 ISSN: 2040-7459; e-issn: 2040-7467 205 Maxwell Scietific Publicatio Corp. Submitted: September 25, 204

More information

Compound Controller for DC Motor Servo System Based on Inner-Loop Extended State Observer

Compound Controller for DC Motor Servo System Based on Inner-Loop Extended State Observer BULGARIAN ACADEMY OF SCIENCES CYBERNETICS AND INFORMATION TECHNOLOGIES Volume 6, No 5 Special Issue o Applicatio of Advaced Computig ad Simulatio i Iformatio Systems Sofia 06 Prit ISSN: 3-970; Olie ISSN:

More information

FEATURES 4:1 single-ended multiplexer Q nominal output impedance: 7Ω (V DDO

FEATURES 4:1 single-ended multiplexer Q nominal output impedance: 7Ω (V DDO ICS8304I GENERAL ESCRIPTION The ICS8304I is a low skew, 4:1, Sigle-eded ICS Multiplexer ad a member of the HiPerClockS HiPerClockS family of High Performace Clock Solutios from IT The ICS8304I has four

More information

Novel Low Voltage CMOS Current Controlled Floating Resistor Using Differential Pair

Novel Low Voltage CMOS Current Controlled Floating Resistor Using Differential Pair 48 S. A. TEKİN, H. ERCAN, M. ALÇI, NOVEL LOW VOLTAGE CMOS CURRENT CONTROLLED FLOATING RESISTOR Novel Low Voltage CMOS Curret Cotrolled Floatig Resistor Usig Differetial Pair Sezai Aler TEKİN, Hamdi ERCAN,

More information

Chapter 1 The Design of Passive Intermodulation Test System Applied in LTE 2600

Chapter 1 The Design of Passive Intermodulation Test System Applied in LTE 2600 Chapter The Desig of Passive Itermodulatio Test System Applied i LTE 600 Gogli, Wag Cheghua, You Wejue 3, Wa Yuqiag 4 Abstract. For the purpose of measurig the passive itermodulatio (PIM) products caused

More information

Hardware Technologies for Robust Personal Communication Transceivers

Hardware Technologies for Robust Personal Communication Transceivers Hardware Techologies for Robust Persoal Commuicatio Trasceivers Hery Samueli Asad A. Abidi Gregory J. Pottie Yahya Rahmat-Samii Itegrated Circuits & Systems Laboratory Electrical Egieerig Departmet Uiversity

More information

Comparison of Frequency Offset Estimation Methods for OFDM Burst Transmission in the Selective Fading Channels

Comparison of Frequency Offset Estimation Methods for OFDM Burst Transmission in the Selective Fading Channels Compariso of Frequecy Offset Estimatio Methods for OFDM Burst Trasmissio i the Selective Fadig Chaels Zbigiew Długaszewski Istitute of Electroics ad Telecommuicatios Pozań Uiversity of Techology 60-965

More information

Efficiency Analysis of Wireless Power Transmission for Portable Electronics

Efficiency Analysis of Wireless Power Transmission for Portable Electronics MATEC Web of Cofereces, 008 ( 05) DOI: 0.05/ mateccof/ 05008 C Owed by the authors, published by EDP Scieces, 05 Efficiecy Aalysis of Wireless Power Trasmissio for Portable Electroics Xigpig Xu, Chuaxiag

More information

Indicator No mark Single preset Dual preset DIN W144 H72mm DIN W48 H96mm No mark DIN W72 H72mm (4 digit) (6 digit) Counter/Timer

Indicator No mark Single preset Dual preset DIN W144 H72mm DIN W48 H96mm No mark DIN W72 H72mm (4 digit) (6 digit) Counter/Timer FX/FX/FX Series DIN W7 7, W8 96, W 7mm er/timer Features 6 iput modes ad output modes ig speed: cps/cps/kcps/kcps Selectable voltage iput (PNP) or No voltage iput (NPN) dditio of Up/Dow iput mode Wide

More information

Performance Analysis of Channel Switching with Various Bandwidths in Cognitive Radio

Performance Analysis of Channel Switching with Various Bandwidths in Cognitive Radio Performace Aalysis of Chael Switchig with Various Badwidths i Cogitive Radio Po-Hao Chag, Keg-Fu Chag, Yu-Che Che, ad Li-Kai Ye Departmet of Electrical Egieerig, Natioal Dog Hwa Uiversity, 1,Sec.2, Da-Hsueh

More information

History and Advancement of the Family of Log Periodic Toothed Planer Microstrip Antenna

History and Advancement of the Family of Log Periodic Toothed Planer Microstrip Antenna Joural of Electromagetic Aalysis ad Applicatios, 2011, 3, 242-247 doi:10.4236/jemaa.2011.36039 Published Olie Jue 2011 (http://www.scirp.org/joural/jemaa) History ad Advacemet of the Family of Log Periodic

More information

BANDWIDTH AND GAIN ENHANCEMENT OF MULTIBAND FRACTAL ANTENNA BASED ON THE SIERPINSKI CARPET GEOMETRY

BANDWIDTH AND GAIN ENHANCEMENT OF MULTIBAND FRACTAL ANTENNA BASED ON THE SIERPINSKI CARPET GEOMETRY ISSN: 2229-6948(ONLINE) DOI: 10.21917/ijct.2013.0095 ICTACT JOURNAL ON COMMUNICATION TECHNOLOGY, MARCH 2013, VOLUME: 04, ISSUE: 01 BANDWIDTH AND GAIN ENHANCEMENT OF MULTIBAND FRACTAL ANTENNA BASED ON THE

More information

CP 405/EC 422 MODEL TEST PAPER - 1 PULSE & DIGITAL CIRCUITS. Time: Three Hours Maximum Marks: 100

CP 405/EC 422 MODEL TEST PAPER - 1 PULSE & DIGITAL CIRCUITS. Time: Three Hours Maximum Marks: 100 PULSE & DIGITAL CIRCUITS Time: Three Hours Maximum Marks: 0 Aswer five questios, takig ANY TWO from Group A, ay two from Group B ad all from Group C. All parts of a questio (a, b, etc. ) should be aswered

More information