Research Article New Topologies of Lossless Grounded Inductor Using OTRA

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1 Joural of Electrical ad omuter Egieerig Volume 2, Article ID 753, 6 ages doi:.55/2/753 Research Article New Toologies of Lossless Grouded Iductor Usig OTRA Rajeshwari Padey, Neeta Padey, Sajal K. Paul, 2 A. Sigh, B. Sriram, ad K. Trivedi Deartmet of Electroics ad ommuicatio, Delhi Techological Uiversity, Bawaa Road, Delhi 42, Idia 2 Deartmet of Electroics Egieerig, Idia School of Mies, Dhabad 8264, Idia orresodece should be addressed to Sajal K. Paul, sajalkaul@rediffmail.com Received 28 March 2; Revised 4 Jue 2; Acceted 4 Jue 2 Academic Editor: Raj Seai oyright 2 Rajeshwari Padey et al. This is a oe access article distributed uder the reative ommos Attributio Licese, which ermits urestricted use, distributio, ad reroductio i ay medium, rovided the origial work is roerly cited. Two alterate toologies of lossless grouded iductor have bee roosed usig oeratioal trasresistace amlifier (OTRA). Three alicatios usig the roosed iductors are also icluded. PSPice simulatio ad exerimetal results have bee icluded to demostrate the erformace ad verify the theoretical aalysis.. Itroductio Recetly the oeratioal trasresistace amlifier (OTRA) has emerged as alterate imortat aalog buildig block as it iherits all the advatages offered by curret mode techiques. The OTRA is a high-gai curret iut voltage outut device. The iut termials of OTRA are iterally grouded, thereby elimiatig resose limitatios due to arasitic caacitaces ad resistaces at the iut. Although the OTRA is commercially available from several sources uder the ame of curret differecig amlifier or Norto amlifier, it has ot gaied attetio util recetly. These commercial realizatios do ot rovide iteral groud at the iut ort ad allow the iut curret to flow i oe directio oly. The former disadvatage limits the fuctioality of the OTRA where as the later forces to use exteral D bias curret leadig to comlex ad uattractive desigs []. Several high-erformace MOS OTRA toologies have bee roosed i literature [ 4] leadig to growig iterest i OTRA-based aalog sigal rocessig circuits. I the recet ast OTRA has bee extesively used as a aalog buildig block for realizig a umber of sigal rocessig circuits such as filters [5 8], oscillators [9, ], multivibrators [, 2], ad immittace simulatio circuits [9, 3 5], a alicatio which has bee dealt with i this aer. A umber of grouded arallel immittace toologies usig sigle OTRA are roosed i [3]. However oe of these cofiguratios ca realize a lossless grouded iductor. The structure i [4] resets simulatio of lossless egative grouded iductace. Lossless grouded iductor simulators usig two OTRAs, five resistors, ad oe caacitor are reseted i [9, 5]. I this aer two additioal toologies of lossless grouded iductor usig two OTRAs, five resistors, ad oe caacitor are reorted. I these toologies five assive elemets out of six are grouded as comared to four grouded elemets i [9, 5]. Some alicatios of the roosed toologies are also reseted. 2. ircuit Descritio OTRA is a three-termial device, show symbolically i Figure ad its ort relatios ca be characterized by the followig matrix: V I V = I. () R m R m V O For ideal oeratios the trasresistace gai R m aroaches ifiity ad forces the iut currets to be equal. Thus OTRA must be used i a egative feedback cofiguratio. The roosed lossless grouded iductor toologies are show i Figure 2. Routie aalysis of the circuit of I O

2 2 Joural of Electrical ad omuter Egieerig I V V o V I Io Figure : OTRA circuit symbol. R 4 Y i (s) R R 2 R R 3 R 5 R 3 Y i (s) R 2 R 5 R 4 Figure 2: Iductor simulatio toologies. V B M 8 M 9 M M I B V DD M 2 M 3 M M 2 M 3 V O I I M 4 M 5 M 6 M7 V SS Figure 3: MOS imlemetatio of OTRA [4]. M 4 Figure 2 results i the followig exressio for iut admittace: ( Y i (s) = G + G 3 + G 5 G G 5 ) + sg 2 G 3 G 5, (2) Y i will be urely iductive if the followig coditio is met G + G 3 + G 5 = G G 5. (3) Similarly for iductor toology of Figure 2, iut admittace is give by ( Y i (s) = G + G 2 + G ) 2 + G 3. (4) G 3 sg G 2 G 5 This iut admittace will be urely iductive rovided that G + G 2 + = G 2 G 3. (5) The equivalet iductace values alog with coditios are give i Table. It is clear from Table that for both the toologies the iductace value ca be cotrolled ideedet of coditio of realizatio. The roosed toologies are verified through simulatios usig the MOS imlemetatio of the OTRA [4] as give i Figure 3. The SPIE simulatio is erformed usig.5 μm MOS rocess arameters rovided by MOSIS (AGILENT) ad suly voltages take are ±.5V. Asect ratios used fordifferet trasistors are give i Table 2. A iductor of value =. mh is desiged usig the iductor toology of Figure 2 with the comoet values of R = R 2 = R 3 = R 5 = KΩ, R 4 = 3KΩ, = 3 F. The frequecy resose of the imedace as obtaied usig this iductor is show i Figure 4. The iset deicts the elarged view of imedace resose i lower frequecy rage.

3 Joural of Electrical ad omuter Egieerig 3 Table : Iductorsrealized bythe toologies showifigure 2. Figure oditio No-iteractive cotrol of Figure 2 G + G 3 + G 5 = G G 5 G 2 G 3 G 5 Figure 2 G + G 2 + = G 2 G 3 G 3 G G 2 G 5 Ideedet cotrol of value of through G 2 Ideedet cotrol of value of through G 5 2K 2 24 Imedace (Ohms).5 K K.5 K Imedace (Ohms) 5 5 KHz 3 KHz KHz 3 KHz Frequecy Imedace (Ohms) Imedace (Ohms) KHz KHz 3 KHz KHz Frequecy KHz KHz KHz MHz 3MHz Frequecy KHz KHz KHz MHz 3MHz Frequecy Figure 4: Imedace versus frequecy resose of toology of Figure 2. Imedace versus frequecy resose of toology of Figure 2. Table 2: Asect ratio of the trasistors. Trasistor W(μm)/L(μm) M M 3 /2.5 M 4 /2.5 M 5,M 6 3/2.5 M 7 /2.5 M 8 M 5/2.5 M 2,M 3 /2.5 M 4 5/.5 Similarly, Figure 4 shows the frequecy resose of the imedace of the iductor of value = μh as obtaied with comoet values of R = R 2 = R 4 = R 5 = KΩ, R 3 = 3KΩ, ad = 3 F for iductor toology give i Figure 2. I the iset, the variatio of imedace i lower frequecy rage is show. 3. Alicatios I this sectio some alicatios of the roosed toologies have bee reseted. Both the toologies may be used for costructig filter ad oscillator circuits. 3.. High-ass Filter. A high ass filter, as show i Figure 5, ca be costructed usig roosed iductors. The trasfer fuctio for high ass resose is obtaied as where ω = V o s 2 = V i s 2 + s/r +/, (6) ( ), Q = R ( ). (7) The fuctioality of the high ass filter is verified usig the iductor toology of Figure 2 ad desiged for lower cutoff frequecy of 53.3 KHz. The comoet values are obtaied as R = 3 Ω ad = F for =.mh. The value of =. mh is obtaied usig iductor toology of Figure 2 with comoet values of R = R 2 = R 3 = R 5 = KΩ, R 4 = 3KΩ, ad = 3 F. The frequecy resose of the filter simulated usig PSPIE is deicted i Figure 5. valueoflowercutoff frequecy is obtaied as 55 KHz which is i close agreemet to the theoretical value of 53.2 KHz Bad Pass Filter. The roosed iductor toologies may also be used to obtai bad-ass resose usig the circuit

4 4 Joural of Electrical ad omuter Egieerig 4 Vi V o Gai (db) 8 R 2 KHz KHz KHz MHz MHz MHz Frequecy Figure 5: High-ass filter. Frequecy resose of high ass filter. 2 V i R V o Gai (db) KHz KHz KHz MHz MHz MHz Frequecy Figure 6: Bad-ass filter. Frequecy resose of bad-ass filter. 4 2 R R 2 R 3 R 4 Vout (mv) 2 R Time (µs) 4 Figure 7: L oscillator. Outut of L oscillator.

5 Joural of Electrical ad omuter Egieerig 5 I AD844 () T Z V O I Z Figure : Exerimetal outut of L oscillator. I AD844 (2) T Z2 R m V O2 I Z2 V O The theoretical roositio is verified usig the toology of Figure 2. A bad-ass filter is desiged havig ceter frequecy of 53.3 KHz. The comoet values are obtaied as R = KΩ ad = F for =. mh. The value of =. mh is obtaied for iductor toology of Figure 2 with comoet values of R = R 2 = R 4 = R 5 = KΩ, R 3 = 3KΩ, = 3 F. The frequecy resose of the filter simulated usig PSPIE is deicted i Figure 6. The simulated results are i close agreemet with the theoretical redictio. Figure 8: FOA based OTRA imlemetatio L Oscillator. A L Oscillator ca be realized usig the roosed iductor toologies. Figure 7 shows the schematic of a L oscillator usig toology of Figure 2 for which the coditio of oscillatio (O) ad frequecy of oscillatio (FO) are obtaied as Gai (db) 5 3 Hz KHz KHz KHz Exerimetal Frequecy Figure 9: Frequecy resose of the high-ass filter. MHz 5 MHz give i Figure 6. The trasfer fuctio for bad-ass resose is obtaied as where ω = V o s/r = V i s 2 + s/r +/, (8) ( ), ) Q = R (. (9) O : G + G 3 + G 5 = G G 5, () FO : f o = 2Π. () R 2 R 3 R 5 /R 4 Figure 7 shows the outut of the oscillator for =.mh ad = 33 F. frequecy of oscillatio is 86 KHz as agaist the calculated value of KHz with % error of.85% Exerimetal Verificatio. The roosed iductor toologies are also tested exerimetally to verify the theory. The OTRA is imlemeted usig two FOAs (I AD844AN) as show i Figure 8 with a suly voltage of ±5V. The high ass filter of Figure 5 is rototyed with = F, R = 68 Ω, ad = mh. The iductor of value = mh is imlemeted usig iductor toology of Figure 2 with comoet values of R = R 2 = R 3 = R 5 = KΩ, R 4 = 3KΩ, ad = 3F. Theoretical, simulated ad exerimetal frequecy resoses are show i Figure 9. It is observed that the exerimetal values more or less follow the theoretical ad simulated values. The oscillator circuit of Figure 7 is also tested exerimetally. The outut waveform observed o oscilloscoe is show i Figure. The observed frequecy of oscillatio is foud to be KHz, which is i close agreemet to theoretically calculated value of KHz.

6 6 Joural of Electrical ad omuter Egieerig 4. oclusio Two ew OTRA-based lossless grouded iductor toologies are reseted. A high ass filter, bad-ass filter, ad a oscillator are realized usig the roosed iductor toologies to illustrate their alicatios. PSice simulatio ad exerimetal results are icluded to verify the theoretical roositios. It is foud that the results obtaied are i close agreemet with the ideal values. Hece it is exected that the roosed iductors will rovide a otio to itegrated circuit desiger where lossless grouded iductor is required. [4] S. Kiliç, K. N. Salama, ad U. Çam, Realizatio of fully cotrollable egative iductace with sigle oeratioal trasresistace amlifier, ircuits, Systems, ad Sigal Processig, vol. 25, o., , 26. [5] U. Çam,F.Kaçar, O. icekoglu, H. Kutma, ad A. Kutma, Novel two OTRA-based grouded immitace simulator toologies, Aalog Itegrated ircuits ad Sigal Processig, vol. 39, o. 2, , 24. Refereces [] N. Salama ad A. M. Solima, MOS OTRA for aalog sigal rocessig alicatios, Microelectroics Joural, vol. 3, , 999. [2] J. J. he, H. W. Tsao, ad.. he, Oeratioal trasresistace amlifier usig MOS techology, Electroics Letters, vol. 28, o. 22, , 992. [3] H. Mostafa ad A. M. Solima, A modified MOS realizatio of the oeratioal trasresistace amlifier (OTRA), Frequez, vol. 6, o. 3-4,. 7 76, 26. [4] A. K. Kafrawy ad A. M. Solima, A modified MOS differetial oeratioal trasresistace amlifier (OTRA), AEU Iteratioal Joural of Electroics ad ommuicatios, vol. 63, o. 2,. 67 7, 29. [5] S. Kiliç ad U. Çam, ascadable allass ad otch filters emloyig sigle oeratioal trasresistace amlifier, omuters ad Electrical Egieerig, vol. 3, o. 6,. 39 4, 25. [6].akir,U.Çam, ad O. icekoglu, Novel allass filter cofiguratio emloyig sigle OTRA, IEEE Trasactios o ircuits ad Systems II, vol. 52, o. 3, , 25. [7]J.J.he,H.W.Tsao,S.I.Liu,adW.hiu, Parasiticcaacitace-isesitive curret-mode filters usig oeratioal trasresistace amlifiers, IEE Proceedigs: ircuits, Devices ad Systems, vol. 42, o. 3, , 995. [8] A. Gokce ad U. Çam, MOS- sigle amlifier biquads usig the oeratioal trasresistace amlifier, AEU Iteratioal Joural of Electroics ad ommuicatios, vol. 63, o. 8, , 29. [9] K. N. Salama ad A. M. Solima, Novel oscillators usig the oeratioal trasresistace amlifier, Microelectroics Joural, vol. 3, o., , 2. [] U. Çam, A ovel sigle-resistace-cotrolled siusoidal oscillator emloyig sigle oeratioal trasresistace amlifier, Aalog Itegrated ircuits ad Sigal Processig, vol. 32, o. 2, , 22. []. L. Hou, H.. hie, ad Y. K. Lo, Squarewave geerators emloyig OTRAs, IEE Proceedigs: ircuits, Devices ad Systems, vol. 52, o. 6, [2] Y. K. Lo, H.. hie, ad H. J. hiu, Switch-cotrollable OTRA-based bistable multivibrators, IET ircuits, Devices ad Systems, vol. 2, o. 4, , 28. [3] U. Çam,F.Kaçar, O. icekoglu, H. Kutma, ad A. Kutma, Novel grouded arallel immittace simulator toologies emloyig sigle OTRA, AEU Iteratioal Joural of Electroics ad ommuicatios, vol. 57, o. 4, , 23.

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