Load Current Adaptive Control of a Monolithic CMOS DC/DC Converter for Dynamic Power Management

Transcription

1 oad Curret Adatie Cotrol of a Moolithic CMOS DC/DC Coerter for Damic Power Maagemet ei-chi Su ad Yig-Yu Tzou, Member, IEEE Power Electroics Sstems & Chis ab., Adace Power Electroics Ceter, Deartmet of Electrical ad Cotrol Egieerig, Natioal Chiao Tug Uiersit, Taiwa. Abstract - This aer resets the desig of a moolithic curret-mode CMOS DC/DC coerter with itegrated ower switches ad a o-chi assie adatie cotroller with the sesed aerage iductor curret. The sesed switched curret, combied with the itegratio of iductor oltage, ad a oltage-cotrolled floatig resistor, ca be used for the adatie cotrol of a CMOS DC/DC coerter. The oliear carrier cotrol ca adjust carrier accordig to iut oltage to reduce the iut disturbace. The roosed cotrol scheme has bee desig ad simulatio erified based o the TSMC 0.5m techolog. The desiged CMOS DC/DC switchig regulator is based o a rated outut curret of 500mA with a adjustable outut oltage from.0v to.8v. Simulatio results shows the roosed adatie cotrol scheme ca achiee a fast damic ower o trasiet resose as well as a robust oltage regulatio agaist large loadig curret ariatio. Ide Terms - CMOS DC/DC coerters, schroous buc regulator, load curret adatie cotrol, oliear carrier, fast damic resose, damic ower maagemet. I. INTRODUCTION Alicatios of sstem-o-a-chi (SOC ca be broadl classified accordig to their high-erformace (HP or lowower (P characteristics. Adaced microrocessors ad high-ed grahic rocessors are eamles of high erformace alicatios, while ortable wireless alicatios such as PDAs, digital cameras, ad bluetooth deices are eamles of low-ower SOCs. I either alicatio, the ower sulig to the SOC sstems eeds to satisf the damic ower maagemet, fast damic resose, ad low ower cosumtio []-[]. To accommodate the dierse ower requiremets of a ortable deice, we eed to desig dedicated dc-dc coerters for target oit-of-load (PO alicatios. CMOS based schroous buc regulators are widel emloed i ortable iformatio aliaces. ow ower cosumtio with low stadb ower, high ower desit with itegrated magetic comoets, high efficiec with large iut oltage rage, fast ower o resose time, robust oltage regulatio without eteral comoets, ad oltage scalig caabilit, etc., are imortat desig issues for itegrated dc-dc coerters [4]-[]. I order to achiee robust cotrol erformace, curret-mode cotrol schemes are usuall emloed with the cotrol loos. Amog arious realizatio schemes, the ea curret mode (PCM This wor was suorted b the Natioal Sciece Coucil, Taiei, Taiwa, R.O.C. Project o. NSC 94--E Fig.. Proosed aalog adatie oltage loo cotrol scheme. cotrol with egatie sloe comesatio is robabl the most frequetl adoted scheme i realizatio of PM cotrol ICs [7]. The PCM cotrol with egatie sloe comesatio ca elimiate subharmoic oscillatios withi the ier curret loo whe oeratig duties are high [8]. The sesig scheme for the moolithic CMOS DC/DC eeds to be realized with high badwidth as well as low ower cosumtio. A o-chi curret sesig scheme without usig a series coected resistor is roosed i [9], howeer, this scheme eed sohisticated desig of circuit arameters to match the high temerature sesitiit of ochi CMOS buffer circuits. To simlif the desig of cotrol loos of a CMOS DC/DC coerter, arious oltage-mode cotrol schemes, such as secod-order sloe comesatio [0], obsererbased sesorless curret mode cotrol [], ed-oit redictio [], adatie arameter schedulig [], ad digital cotrol [4], hae bee deeloed to roide robust erformace as well as simle circuit realizatio. Howeer, these cotrol schemes still ca ot meet the requiremet of low-cost desig with robust erformace. I this aer, a simle load-curret adatie gai cotrol scheme with a feedforward oliear carrier cotrol has bee roosed to achiee simle ad robust cotrol of a moolithic DC/DC coerter without curret mode cotrol. A moolithic curret-mode CMOS DC/DC coerter with itegrated ower switches ad a oel o-chi adatie cotroller is reseted i this aer. The roosed aalog adatie oltage loo cotrol scheme is show i Fig.. ith the sesed switch curret, combied with the /07/$ IEEE 70

2 V i Itegrator Itegrator Iut oltage reset reset (a Fied frequec tooth carrier V i reset Noliear carrier Fig.. itegratio of iductor oltage, ad a oltage-cotrolled floatig resistor, a aalog adatie cotrol scheme is roosed for the regulatio of a CMOS DC/DC coerter. The iductor curret is sesed b usig a o-chi sesig circuit i measurig the curret of the comlemetar switches, howeer, because this measured curret is used for the tuig of the cotrol gai for the oltage mode cotroller, it ca be much slower comared with the curret mode sesig circuit ad furthermore, the requiremet o its accurac much less striget. Therefore, simle curret sesig scheme ca be emloed i desig of the o-chi curret sesig circuit. The desiged CMOS DC/DC coerter has bee erified b usig a sstem-leel simulatio software tool PSIM ad also b a deice-leel simulatio tool HSPICE based o the TMSC 0.5m techolog. Simulatio results shows the roosed adatie cotrol scheme ca achiee a fast damic ower o trasiet resose as well as a robust oltage regulatio agaist large load curret ariatios. II. (b The was to geerate oliear carrier. ANAOG ADAPTIVE CONTROER A. Feedforward Noliear Carrier Cotrol I geeral, a fied frequec tooth carrier is used i ulse-width geerator to geerate driig sigal for ower stage because of it is eas to desig ad realize. But if the iut oltage of coerter suffers from disturbace i circuit or oise, the outut oltage of coerter will bled the disturbace comoet ad become chageable. If the oltage loo comesator of coerter does t desig well, the iut disturbace ma cause the coerter ustable. The feedforward oliear carrier ca reduce the ifluece of iut disturbace o outut oltage of coerter. As show i Fig., it geerates the carrier accordig to the iut oltage. If the iut oltage has a chage, the amlitude of carrier will adjust itself to decrease the chage of outut oltage. Fig. is the simulatio results of comared with fied frequec tooth carrier ad oliear carrier. A 000Hz sie wae with V ea-to-ea oltage is added o iut oltage as a disturbace. ithout a oltage loo comesatio, use fied frequec tooth carrier ca t adjust Fig.. Simulatio results of comared with fied frequec tooth carrier ad oliear carrier whe iut oltage is ariable. ref e Voltage loo c Pulse-width geerator d Buc coerter o Comesator C(s P(s G(s - Fig. 4. T(s Bloc diagram of oltage cotrol loo itself ad hece occurs a ariatio which equals to 0.V o outut oltage, but the ariatio ca be reduced to 0.5V if oliear carrier is used. If the wa descrited i Fig. (a is used, the outut of oltage loo comesator will be i low leel ad ma cause the trasistors i comesator to leae saturatio regio. Therefore, the wa to geerate oliear carrier is as Fig. (b i this aer. B. Adatie Voltage oo Comesator I the desig of a loo comesator for a high badwidth switchig regulator we eed tae careful cosideratios i determiatio of gai crossoer frequec ad comesatio of the resoat ea iheret i the outut C filter. The resoat ea of a switchig regulator becomes more si at light load ad more flat as load becomes hea. Coetioal aroach is emloig curret-mode cotrol to esure robust resose uder large lard load disturbaces. Howeer, this aroach eeds comlicated cotrol circuit ad still requires roer hase comesatio to esure a guarateed hase margi for large load ariatios. Voltage-mode cotrol with matched load comesatio emerges as a cometitie solutio for dedicated alicatios due to its simlicit ad fast damic resose. Howeer, this aroach still requires a careful desig of the oltage loo comesator. Fig. 4 shows the bloc diagram of oltage-mode cotrol loo of a switchig regulator. I order to ease the alicatios of switchig regulators for more ersatile alicatios without the eed of loo comesator desig, we eed to deelo a adatie cotroller to accommodate arious loadig coditios ad to elimiate the comesatio circuit to simlif the circuit imlemetatio. This aers rooses a simle aalog circuit orieted adatie cotrol scheme b tuig the cotrol loo gai with a oliear fuctio of the measured aerage iductor curret. A roortioal-itegral (PI hase-lead comesator with adjustable gai is adoted i the realizatio of the oltage-mode cotroller. Fig. 5 shows the schematic of the 7

3 Z f Z i C 0.9 C R R C,r o R c 0.8 ref I load I load,r Fig. 5. ithout adatie cotrol Schematic of the oltage loo comesator. = 0.5 = 0. = Fig. 7. The relatioshi betwee loadig coditio ad adatie cotrol gai. V dd M 5 M 8 M 7 i_o i_o M M out_o I bias R z C c C (a less or equal to. M M 4 M ithout adatie cotrol = gd = Fig. 8. Schematic of oltage error amlifier. = C c R z Nullig resistor (b large or equal to. Fig.. Simulatio result of adatie cotrol with a ste chage of referece oltage. oltage-loo error amlifier with its comesator circuit ad its trasfer fuctio is ( s z( s z C( s ( s( s ( s where R C z R C RCC C C z R C R C R R R R C B usig a oltage-cotrolled floatig resistor [5], the cotrol gai is roortioall adjusted accordig to the loadig coditio. The roosed cotrol scheme ca achiee a robust fast damic resose ad roides a. i - gm i r o //r o4 C Fig. 9. simle realizatio of the CMOS DC/DC schroous buc coerter without a eteral comesatio comoets. The loadig coditio ca be determied b the iductace curret. The trasfer fuctio of oltage loo comesator ca be rewritte as ( s z( s z C( s ( i s( s ( s where is a factor reersets the amout that iductace curret iflueces the gai of comesator. Fig. shows the simulatio results of adatie cotrol with a ste chage of referece oltage. The referece oltage switches from.5v to.5v at t = 0ms. I Fig. (a, the simulatio coditio is less or equal to. The resose waeform will aroach the waeform without adatie cotrol. It causes the oltage cotrol loo ustable - gm r o //r o7 C Small sigal model of oltage error amlifier. 7

4 if is smaller. I Fig. (b, the simulatio coditio is large or equal to. The rise time ad settlig time will be eted if is large. I other words, whe becomes large, the gai of comesator decreases ad hece the badwidth of comesator becomes arrow. The relatioshi betwee loadig coditio ad adatie cotrol gai i this aer is show i Fig. 7, where I load,r is the rated outut curret ad,r is the comesator gai i full loadig. Accordig to loadig coditio, the adatie cotrol gai will adjust to corresodig alue. III. CIRCUIT IMPEMENTATION I this sectio, the circuit imlemetatio of the loadcurret adatie gai cotrol scheme with a feedforward oliear carrier cotrol is addressed ad the desig is based o the structure show i Fig.. Desig details of each sub-circuit are reseted as follows. Magitude (db Phase (deg Bode lot of oltage loo Fig. 0. Frequec (Hz Bode lot of loo gai A. Voltage oo Comesator Fig. 8 shows the schematic of oltage error amlifier. Comared with other toologies of oeratioal amlifier (OPA such as telescoic or folded-cascode, two-stage OPA has adatages of high gai ad large outut swig. Fig. 9 shows its small sigal model ad its gai, oles ad zero are A g m ( r g A C m c o, m // r o4 g z Cc ( Rz g m ( r o c // r o7 gm C c C C C C C C Note that the ullig resistor R z should larger tha /g m to geerate a egatie zero ad is the domiat ole. I order to reduce the iut offset oltage, V ds should equal to V ds4. This coditio occurs whe ( ( 4 ( 5 (4 ( ( ( 7. All MOS are desiged to oerate i saturatio regio. Decide the bias curret is A ad the domiat ole locates 00Hz, the / ratio of each MOS ca be calculated: ( ( ( ( 4 ( ( 5 ( 7 ( 8 The Bode lot of desiged loo gai C(sP(sG(s is show i Fig. 0. The desiged comesator roides 50 o hase margi ad the badwidth of oltage loo is 80Hz. B. O-Chi Curret-Sesig Circuit Fig. shows the schematic of o-chi curret-sesig circuit. Durig the coerter ON-state, M ad M s tur o, the V ds of M ad M are almost the same because the OPA c ( i this circuit is used as a oltage mirror. Therefore, I D : I D will equal to (/ : (/ ad the iductace curret is sesed. The drai curret of M through R sese to geerate a sesig oltage V sese used to cotrol the oltage cotrolled floatig resistor i oltage loo comesator. Durig the coerter OFF-state, M ad M s tur off ad M s tur o. The oltage at the egatie iut ode of OPA is closed to V dd. The drai curret of M is zero ad M is the same. Assume all MOS oerate i saturatio regio, the calculated results of the / ratio of each MOS are listed below: ( ( MS MCS Fig.. ( ( MS MCS C. ow-pass Filter Schematic of o-chi curret-sesig circuit..5, ( ( MCS Mrs ( MCS 4 ( MCS 5 0. Because the o-chi curret sesig circuit metioed before ol seses the switch curret durig ON-state, a low-ass filter should be used to get the aerage iductace curret. The cutoff frequec should much lower tha switchig frequec of coerter, but imroerl low cutoff frequec will cause the adatie cotrol gai adjust isesitiel. I this aer, the cutoff frequec is decided at a teth of switchig frequec of coerter. D. Voltage-Cotrolled Floatig Resistor Fig. shows the schematic of oltage cotrolled 7

5 Fig.. Schematic of oltage cotrolled floatig resistor. E. Comarator i PM Modulator The comarator, show i Fig., is imlemeted b a source-couled differetial air with ositie feedbac. The gate-to source oltages of M ad M ca be calculated from their resectie drai currets ad are gie b i i, V where = 0.5 C o. The hsteresis V H ca be calculated as where D D GS Vth, GS th, '( M '( (0 M V H ( V trig ( id '( id '( M M ( ( GS 5 GS id '( ( ( M ( Note that the comarator has hsteresis characteristic ol whe is larger tha. 4. floatig resistor. The gate of M 4 ad M are the two termials of the resistor. Because of I = I : I I Fig.. I D ( Va V I b D V V V th, ( V b V V V where = C o (/,. The drai curret of the matched trasistors M ad M 4 are equal: ( V V V V b g Vdd Vth, ( Vg Vdd Vth, g V dd where = C o (/,4. Similarl, from the matched trasistors M 5 ad M, V a ca be eress as V g ca be eress as V a (5 ( a V Vg Vdd. (7 V g Vsese Vth,. (8 From (5, (, (7 ad (8, I ad I ca be rewritte as I I ( V Schematic of hsteresis comarator. dd V sese ( V V V V resistor alue. I ( Vdd Vsese Obiousl, the resistor alue is cotrolled b V sese. (9 IV. SIMUATION RESUTS The desiged CMOS DC/DC coerter is simulated b usig a sstem-leel simulatio software tool PSIM ad sthesized b a deice-leel simulatio tool HSPICE based o the TMSC 0.5m techolog. The iut oltage of coerter ad the sul oltage of cotrol circuit are DC 5V, the oerated frequec of coerter is 500Hz. The comoet alues are show i Table I. TABE I COMPONENT VAUES OF THE SIMUATION SETUP Buc coerter Noliear carrier geerator Comesator ow-ass filter C R R it C it R z (i OPA C c (i OPA R R C C C R fil C fil 0H 4.7F. 88.9F F 0 5 F 88F F.59 F Fig. 4 shows the simulatio results for a large ste load chage. Coerter is oerated i discotiuous mode whe load curret is 50mA. I closed loo simulatio with adatie cotrol, the outut oltage ariatio is 0mV ad the settlig time is 0s. It s better tha the closed loo simulatio without adatie cotrol. 74

6 oad curret oad curret chage V o = 4mV 8s Oe loo Closed loo Closed loo with adatie cotrol 4s V o = mv oad curret (a Switches to light loadig. Fig. 7. Simulatio results for a large load curret chage. 0s 4s Oe loo Closed loo with adatie cotrol Closed loo Fig. 4. (b Switches to hea loadig. Simulatio results for a ste load chage. Fig. 8. Iut oltage Simulatio results for a ste chage of referece oltage. Oe loo Closed loo V o = 5mV V o = 5mV Closed loo with adatie cotrol Fig. 5. Magitude (db Simulatio results for a ste chage of referece oltage. Bode lot of outut imedace Oe-loo Closed-loo with adatie cotrol Frequec (Hz Fig.. Frequec resose of outut imedace. Fig. 5 shows the simulatio results for a ste chage of referece oltage from.5v to.55v. The load curret Fig. 9. Simulatio results for a ste chage of iut oltage. ol has little chage ad hece the gai of comesator i adatie cotrol has little adjustmet. Therefore, the trasiet resose of closed loo simulatio is similar to closed loo simulatio with adatie cotrol. Fig. shows the frequec resose of outut imedace. The resoat frequec is Hz. The outut imedace is reduced i magitude after closed loo with adatie cotrol. After the crossoer frequec of the oltage loo, the loo gai is small ad hece the frequec resose of outut imedace is almost the same as oe loo cotrol. Fig. 7, Fig. 8, ad Fig. 9 are simulated b HSPICE. Fig. 7 shows the simulatio results for a large ste load chage ad Fig. 8 shows the simulatio results for a ste referece oltage chage which are corresodig to the simulatio results i Fig. 4 ad Fig. 5. Fig. 9 shows the simulatio results for a ste chage of iut oltage from 5V to V. The ariatio of aerage outut oltage i trasiet resose is %. It meas the iut disturbace ca be reduced b usig a feedforward oliear carrier cotrol. 75

7 V. CONCUSION This aer has reseted the desig of a moolithic curret-mode DC/DC coerter b usig feedforward oliear carrier PM modulatio scheme with assie adatie cotrol to accommodate large load curret disturbaces as well as iut oltage ariatios. The oliear carrier geerated b the itegratio of iut oltage ca reduce the iut-to-outut oltage disturbace effect comared with the coetioal PM techique. The assie adatie cotroller roided a simle selfadjust of gai based o the aeraged iductor curret to stabilize the cotrol loo to accommodate differet loadig coditios. Simulatio results show the desiged adatie moolithic dc-dc switchig regulator ca maitai fast ad well damed damic resose for large chages of iut oltage ad load curret. This research reeals feasibilit of imlemetatio of adatie switchig dc-dc regulators for wide alicatios without loo comesator desig b usig aalog techolog. [4] B. Patella, A. Prodic, A. Zirger, ad D. Masimoic Highfrequec digital cotroller IC for DC-DC coerters, IEEE APEC Cof. Rec., ,00. [5] Hassa O. Elwa, Solima A. Mahmoud, ad Ahmed M. Solima, CMOS oltage cotrolled floatig resistor, It. J. Electroics, ol. 8, o. 5, , 99. REFERENCES [] Z. Re, B. H. rogh, ad R. Marculescu, Hierarchical adatie damic ower maagemet, IEEE Trasactios o Comuters, ol. 54, o. 4, , Aril 005. [] A. idow, D. izer, G. Sherida, ad D. Tam, The semicoductor roadma for ower maagemet i the ew milleium, Proceedigs of the IEEE, ol. 89, o.,. 80-8, Jue 00. [] G. Patouais, Y.. i, ad.. Sheard, A full itegrated ochi DC-DC coersio ad ower maagemet sstem, IEEE Joural of Solid-State Circuits, ol. 9, o., , March 004. [4] Sura Musuuri, Patric. Chama, Ju Zou, ad Chag iu, Desig issues for moolithic DC DC coerters, IEEE Tras. o Power Electroics, ol. 0, o.,. 9-49, Ma 005. [5] A. P. Dac ad A. P. Chadraasa, Ultra low ower cotrol circuits for PM coerters, IEEE PESC Cof. Rec.,. -7, 997. [] B. Sahu ad G. A. Rico-Mora, A low oltage, damic, oiertig, schroous buc-boost coerter for ortable alicatios, IEEE Trasactios o Power Electroics, ol. 9, o., , March 004. [7] R. Mammao, Switchig ower sul toolog: oltage mode s. curret mode, i Uitrode Desig Note DN-. Dallas, TX: Teas Istrumets Icororated, 994. [8] ig-hug i, Aalsis of subharmoic oscillatio of fiedfrequec curret-rogrammig switch mode ower coerters, IEEE Tras. o Citrcuits ad Sstems - I: Fudametal ad Alicatios, ol. 45, o., , Ja [9] Cheug Fai ee ad Phili. T. Mo, A moolithic curret-mode CMOS DC DC coerter with o-chi curret-sesig techique, IEEE Joural of Solid-State Circuits, ol. 9, o.,. -4, Ja [0] H. Saurai ad Y. Sugimoto, Aalsis ad desig of a curretmode PM buc coerter adotig the outut-oltage ideedet secod-order sloe comesatio scheme, IEICE Tras. o Fudametals, ol. E88 A, o., , Feb [] J. T. Mossoba ad P.T. rei, Desig ad cotrol of sesorless curret mode dc-dc coerters, IEEE APEC Cof. Rec., 00. [] Ma Siu, Phili. T. Mo, a Nag eug, Yat-Hei am, ad ig-hug i, A oltage-mode PM buc regulator with edoit redictio, IEEE Tras. o Circuits ad Sstems II: Eress Briefs, ol. 5, o. 4, , Aril 00. [] A. J. Forsth, I.. Ellis, ad M. Moller, Adatie cotrol of a high-frequec DC-DC coerter b arameter schedulig, IEE Proceedigs - Electric Power Alicatios, ol. 4, o. 4, , Jul