(2) The MOSFET. Review of. Learning Outcome. (Metal-Oxide-Semiconductor Field Effect Transistor) 2.0) Field Effect Transistor (FET)

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1 EEEB73 Electroics Aalysis & esig II () Review of The MOSFET (Metal-Oxide-Semicoductor Field Effect Trasistor) Referece: Neame, Chapter 3 ad Chapter 4 Learig Outcome Able to describe ad use the followig: Uderstad ad describe the geeral operatio of -chael ad p-chael ehacemetmode MOSFETs. Apply the ideal curret-voltage relatios i the dc aalysis ad desig of various MOSFET circuits usig ay of the four basic MOSFETs. Qualitatively uderstad how MOSFETs ca be used to amplify time-varyig sigals. escribe the small-sigal equivalet circuit of the MOSFET ad to determie the values of the small-sigal parameters..0) Field Effect Trasistor (FET).0) Field Effect Trasistor (FET) Aalogy The voltage betwee two termials (G-S) cotrols the curret through the third termial () BJT FET.1) MOSFET Characteristics ad Properties.1.1) Circuit Symbols ad Covetios.1.1) Circuit Symbols ad Covetios (Cot) Fig 3.1: The -chael ehacemet-mode MOSFET (NMOS) (a) covetioal circuit symbol, ad (b) simplified circuit symbol used. Fig 3.13: The p-chael ehacemet-mode MOSFET (PMOS) (a) covetioal circuit symbol, ad (b) simplified circuit symbol used. Lecturer: r Jamaludi Bi Omar -1

2 EEEB73 Electroics Aalysis & esig II.1.) Basic Priciple of Operatio The voltage betwee two termials (G-S) cotrols the curret through the third termial (). Fig 3.6: (a) Cross sectio of the -chael MOSFET prior to formatio of a electro iversio layer, (b) equivalet back-to-back diodes betwee source ad drai whe trasistor is i cut off, ad (c) cross-sectio after the formatio of a electro iversio layer..1.) Basic Priciple of Operatio (Cot) Operatio of NMOS: +ve voltage applied to GATE (G) creates a electric field i the uderlyig p-type substrate. This forces holes dow ito the substrate ad attracts electros towards the surface. For zero or small V GS, the SOURCE (S) ad RAIN () termials are separated by the p-regio (like two back-toback diodes). Hece, o curret ca flow betwee S ad. For larger V GS, the regio ear the surface becomes iverted (i.e. chages from p-type to -type) ad a - chael iversio layer is created betwee the S ad termials. This provides curret flow from to S. Appreciable chael coductio occurs oly whe V GS exceeds threshold voltage, V..1.) Basic Priciple of Operatio (Cot) Operatio of PMOS: The operatio of p-chael device is the same except: the hole is the carrier rather tha the electro. egative gate bias is required to iduce a iversio layer of holes (because substrate is of -type). curret flows from S to. threshold voltage for p-chael device is deoted as V TP. I both types of MOSFET (i.e. NMOS ad PMOS), the GATE is electrically isolated from the chael by the oxide layer, hece I G = ) Modes of Operatio There are 3 modes of operatio: Regio NMOS PMOS Cut off 0 < v GS < V i = 0 No-saturatio v GS > V v S < v GS - V i 0 Saturatio v GS > V v S v GS - V i 0 0 < v SG < V TP i = 0 v SG > V TP v S < v SG + V TP i 0 v SG > V TP v S v SG + V TP i 0 Saturatio regio is usually used for amplifier circuits. Regio NMOS PMOS Nosaturatio v S < v S v S < v S Saturatio v S v S v S v S Trasitio Poit Ehacemet Mode epletio Mode.1.4) Curret-voltage Relatioships i = K [( v V ) v v ] i = K [( v + V ) v v ] i = K v S v GS V V V GS S [ vgs V ] S p v S v SG V TP V TP V TP SG TP S i = K [ v + V ] TP p SG S.1.4) Curret-voltage Relatioships (Cot) Coductio Parameters ' Wµ NMOSFET: Cox k W K = = L L ' Wµ pcox k p W PMOSFET: K p = = L L where: Cox = ε ox tox is the oxide capacitace per uit area Lecturer: r Jamaludi Bi Omar -

3 EEEB73 Electroics Aalysis & esig II.1.4) Curret-voltage Relatioships (Cot) µ µp ox k = µ Cox.1.4) Curret-voltage Relatioships (Cot) Schematic of -Chael Ehacemet Mode MOSFET mobility of electros mobility of holes oxide permittivity oxide thickess chael Width chael Legth tox W L process coductio parameter (provided by maufacturer for a particular process) The chael geometry, i.e. width-to-legth ratio (W/L), is a variable i the desig of MOSFETs that ca be utilized to produce specific curret-voltage characteristics i MOSFET circuits. Figure ) Curret-voltage Relatioships (Cot).1.5) MOSFET Operatig Curve Trasistor curret-voltage characteristics (i vs vgs) Useful formula O NOT FORGET!.1.5) MOSFET Operatig Curve (Cot).1.6) Fiite Output Resistace I a actual MOSFET, the output curve has a fiite slope beyod the saturatio poit due to chael legth modulatio (as vs > vs (sat), the poit of iversio zero charge moves away from termial causig a reductio of chael legth). is a positive quatity called the chael legth modulatio parameter Fig 3.15: Family of i versus vs curves for NMOS Fig 3.0: Effect of chael legth modulatio, resultig i a fiite output resistace Lecturer: r Jamaludi Bi Omar -3

4 EEEB73 Electroics Aalysis & esig II.1.6) Fiite Output Resistace (Cot) This effect is icluded i the drai curret equatio: i = K Output resistace: v ro = i [( v V ) ( 1+ λv )] S GS 1 S vgs = cost = λi Q where I Q = quiescet drai curret. V I Note: V A is aalogous to Early voltage of a BJT. A Q.) C Aalysis Of MOSFET Circuits dc biasig of MOSFET amplifiers is required to obtai saturatio mode of operatio Step 1 Step Step 3 Step 4 Assume trasistor is biased i the saturatio regio, i.e. V GS > V, I > 0 ad V S V S (sat). Aalyze the circuit usig the saturatio curret-voltage relatios. Calculate V G ad V GS from the biasig circuit. Calculate I. Perform KVL o -S (or S-) loop to fid V S (or V S ). Evaluate the resultig bias coditio of the trasistor. If the assumed parameter values i step 1 are valid, the the iitial assumptio is correct. However, if V GS < V, the the trasistor is probably cut off, ad if V S < V S (sat), the trasistor is likely to be biased i o-saturatio. If the iitial assumptio is prove icorrect, the a ew assumptio must be made ad the circuit reaalyzed. Step 3 must the be repeated..) C Aalysis Of MOSFET Circuits (Cot)..1) Commo-Source Circuit.) C Aalysis Of MOSFET Circuits (Cot)..) Load Lie of Commo-Source Circuit Fig 3.5: (a) A NMOS commo-source circuit ad (b) the NMOS circuit for Example 3.3 Example 3.3: Fig 3.31: Trasistor characteristics, v S (sat) curve, load lie, Calculate the I ad V S ad Q-poit for NMOS commo-source circuit i Fig 3.5(b) (Note: V = 1V ad K = 0.1mA/V ).3) AC Aalysis Of MOSFET Circuits I the MOSFET amplifier aalysis, superpositio theory applies, i.e. perform dc ad ac aalysis separately..3) AC Aalysis Of MOSFET Circuits (Cot).3.1) Small-sigal Hybrid- Equivalet Circuit of MOSFET Step 1 Step Step 3 Aalyze with oly dc sources preset to give the dc or quiescet solutio. The trasistor must be biased i the saturatio regio i order to produce a liear amplifier. Replace each elemet i the circuit with its small-sigal model, icludig replacig the trasistor by its small-sigal equivalet model. To draw the small-sigal model of the amplifier circuit: Start with the three termials of the trasistor. The sketch equivalet circuit betwee these termials. Coect the small-sigal model of the remaiig circuit elemets to the trasistor termials. Aalyze the small-sigal equivalet circuit, settig the dc source compoets equal to zero, to produce the respose of the circuit to time-varyig iput sigals oly. Figure 4.6: Expaded small-sigal equivalet circuit, icludig output resistace, for NMOS trasistor. Lecturer: r Jamaludi Bi Omar -4

5 EEEB73 Electroics Aalysis & esig II.3) AC Aalysis Of MOSFET Circuits (Cot).3.1) Small-sigal Hybrid- Equivalet Circuit of MOSFET (Cot).4) Basic Sigle Stage MOSFET Amplifiers.4.1) Basic Commo-Source (CS) Amplifier Circuit Trascoductace: i gm = v v ro = i vgs = VGSQ = cost GS S vgs = VGSQ = cost = K = λk ( V V ) GSQ Small-sigal trasistor output resistace: 1 ( V V ) λi Q GSQ = K I Q 1 Note: The small-sigal model of a PMOS trasistor is the same as i Figure 4.6 but with all ac voltage polarities ad curret directios reversed. All the parameter equatios stated above still apply for the PMOS trasistor. Figure 4.14: Commo-source circuit with voltage-divider biasig ad couplig capacitor..4.1) Basic Commo-Source (CS) Amplifier Circuit (Cot).4.) Commo-Source (CS) Amplifier with Source Resistor Figure 4.15: Small-sigal equivalet circuit, assumig the couplig capacitor is a short circuit. Figure 4.19: Commo-source circuit with source resistor ad positive ad egative supply..4.) CS Amplifier with Source Resistor (Cot) Compariso betwee Basic CS Amplifier ad CS Amplifier with Source Resistor Figure 4.0: Small-sigal equivalet circuit of NMOS commo-source amplifier with source resistor. Lecturer: r Jamaludi Bi Omar -5

6 EEEB73 Electroics Aalysis & esig II.4.3) Commo-rai (C) Amplifier a.k.a Source Follower.4.3) Commo-rai (C) Amplifier a.k.a Source Follower (Cot) Figure 4.6: NMOS source-follower or commo-drai amplifier Figure 4.7: (a) Small-sigal equivalet circuit of NMOS source-follower ad (b) Small-sigal equivalet circuit of NMOS source-follower with all sigal grouds at a commo poit.4.4) Commo-Gate (CG) Amplifier.4.4) Commo-Gate (CG) Amplifier (Cot) Figure 4.33: Small-sigal equivalet circuit of commo-gate amplifier. Figure 4.3: Commo-gate circuit. Compariso betwee C Amplifier ad CG Amplifier.4.5) Characteristics of the three MOSFET Amplifier cofiguratios Table 4. Note: RTH is the Thevei equivalet resistace of the bias resistors. Lecturer: r Jamaludi Bi Omar -6