A Novel Current Control Method of a Three-Leg Inverter in the Stationary Frame for a Two-Phase AC Motor

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1 Iteratioal Coferece o Electrical Dries ad Power Electroics (EDPE) he High atras, -3 ept. oel Curret Cotrol ethod of a hree-leg Ierter i the tatioary Frame for a wo-phase C otor Yixiao Luo, Dezhi Che, yug-il Kwo Departmet of Electroic ystems Egieerig, Hayag Uiersity sa, Korea yxluowhu@hotmail.com, chedezhi_934@.com, bikwo@hayag.ac.kr bstract his paper proposes a oel method to cotrol the curret of a three-leg oltage source ierter (VI) supplyig a two-phase iductio motor () i the statioary frame by modulatig the potetial of eutral leg middle poit with a proposed algorithm ad usig two closed loops with optimized proportioal ad resoat (PR) cotrollers to regulate the curret. wo coetioal curret cotrol strategies for coetioal three-leg VI i the statioary frame are preseted. he the oel cotrol method is itroduced. oth computer simulatio ad experimet results show the effectieess of the proposed method chieig better performace i terms of total harmoic distortio (HD), peak oershoot alue of output curret. Keywords DC/C coerter; curret cotrol; statioary frame; I. IRODUCIO he permaet split-capacitor motor (PC) is the most commo form of a typical two-phase machie, also recogized as the sigle-phase iductio motor () [], [], [3] which is widely used ad itesely researched. y remoig the capacitor of the, it turs ito a asymmetrical, capacitorless two-phase iductio motor (), which is selected as a model motor of this paper. For supplyig a, three differet oltage source ierter topologies ca be used, four-leg ierter, three-leg ad two-leg ierter. he performace ad ope loop pulse wih modulatio (PW) methods of these topologies hae bee aalyzed i [4]. he three-leg ierter is selected here as the model ierter, sice it costs less tha a four-leg ierter ad produces less harmoics tha a two-leg ierter, of which the coectio to a is show i Fig.. Variable speed cotrol ad differet modulatio strategies of this topology supplyig a has also bee researched i [], []. I some cases, motor currets rather tha motor termial oltages are directly commaded, such as for high performace drie systems, where precise curret cotrol is essetial for precise torque or speed cotrol. Curret regulators ca be categorized as liear, hysteresis ad deadbeat predictie i homas thoy Lipo Departmet of Electrical & Computer Egieerig, Uiersity of Wiscosi-adiso adiso WI, U thomas.lipo@gmail.com 4 3 V Fig.. chematic diagram of a ierter. statioary or sychroous frame [7]. Geerally cotrollers i sychroous frame are supposed to hae better performace tha i the statioary frame sice they act o DC quatities ad it is the possible to achiee zero steady-state error. double sequece cotroller to compesate the egatie compoets caused by imbalaced load i sychroous frame is itroduced i [8], [9]. Howeer, it is quite complex to trasform the statioary frame to the sychroous frame ad the trasform it back to statioary frame. herefore, i this paper currets are regulated i the statioary frame to aoid the frame trasformatio. hough hysteresis cotrol is proed to be effectie, its high switchig frequecy causes losses ad may damage the switches. ubsequetly, it is determied to utilize a PR cotroller to regulate the C curret i statioary frame to achiee almost zero steady-state error []. ethods to improe the performace of curret cotrol i statioary frame icludig the optimizatio of, or proportioal ad resoat (PR) cotrollers ad usig feedforward compesatio to elimiate the error caused by back electromotie force (EF) disturbace hae bee proposed ad examied i [], []. simple way to cotrol the curret of a three-phase load i statioary frame uses three cotrollers which ca also be applied to the two-phase load system, amed method I. eawhile aother method of usig oly two cotrollers ad from which the modulatio sigal for the third obtaied, itroduced i [3] also works for a two-phase load system, amed method II. Furthermore, a oel curret cotrol algorithm modulatig the potetial of the middle poit of the eutral leg to elimiate the error is proposed. EDPE //$3. IEEE

2 Iteratioal Coferece o Electrical Dries ad Power Electroics (EDPE) he High atras, -3 ept. ll three methods are erified i L/IULIK, ad compared i terms of total harmoic distortio (HD), peak oershoot. lso, a experimetal prototype cosistig of a microprocessor-based cotroller, the three-leg oltage source ierter, ad a.7kw two-phase iductio motor, is costructed to cofirm the proposed cotrol strategy of achieig better performace tha the coetioal methods. II. ODELLIG, COROL D IULIO. odellig of a wo-phase Iductio motor he dyamic equatios of a geeric usymmetrical twophase iductio motor i statioary frame ca be defied as r r s s d s Rsis () d s Rs is () d r Rr ir ar r (3) d r Rr ir ar r (4) where the stator ad rotor flux likages ca be defied as s s r r L i L i () s s s s m r L i L i () m s m r L i L i (7) m s r r L i L i (8) r r where sα, sβ, rα, rβ are the α-β stator ad rotor oltages respectiely, i sα, i sβ, i rα, i rβ are the αβ stator ad rotor currets, ψ sα, ψ sβ, ψ rα, ψ rβ are the αβ stator ad rotor flux likages, R sα, R sβ, R rα, R rβ are the stator ad rotor resistaces, L sα, L sβ, L rα, L rβ are the stator ad rotor iductaces, L mα, L mβ are the mutual iductaces, ω r is the electrical rotor agular speed, d/ is the differetial operator ad a is the turs ratio betwee the mai ad auxiliary widigs.. Cotrol methods ) ethod I: usig three cotrollers simple method to cotrol the curret is usig a closed loop with cotroller i the statioary frame. ice the two-phase iductio motor is fed by a coetioal three-leg ierter, three closed loops with cotrollers are used. he essetial structure of the curret regulated two-phase C system, drie from a coetioal three-leg oltage source ierter is show i Fig.. he oltage source ierter topology is the same as a coetioal three phase bridge ierter, cosistig of six IG ad diodes, supplyig a two-phase iductio motor, where the mai widig ad auxiliary widig, coected to the three-leg ierter represet the load of both phase ad phase. 4 3 V a PW b Fig.. lock diagram of 3 cotrol. i * i Howeer, sice the output currets of three legs are ot idepedet from each other, this method eeds to be improed to achiee good performace. ) ethod II: usig two cotrollers It ca be oted that the floatig eutral leg has oly degrees of freedom. I [] oly two cotrollers are required ad the commad sigal for the third leg is geerated based o the other two regulated phases accordig to (9) where a, b, are the commad sigal for phase ad phase ad the eutral leg respectiely, as show i Fig. 3. Howeer, sice this is a ubalaced three phase system the phase oltage of the third leg is zero for a, () does ot apply to this topology. lso, a cotroller ca ot elimiate the steady-state error to zero o C quatities sice it ca ot achiee a ifiite forward gai. 3) Proposed method s show aboe that there are disadatages of both method I ad method II, a oel method modulatig the potetial of eutral leg middle poit based o its aerage switchig state equatios with a proposed algorithm ad usig two closed loops with a optimized PR cotroller is itroduced. 3 V cotrol PW a b Fig.3. lock diagram of coetioal cotrol. EDPE

3 Iteratioal Coferece o Electrical Dries ad Power Electroics (EDPE) he High atras, -3 ept. From Fig., it is clear that V, V, V () = whe the upper switch of each leg is o, ad = whe it is off. Furthermore,,, are the potetial of poits,, respectiely as show i Fig., referrig to the egatie side of the DC bus oltage source. he the aerage alue of,, switchig period ca be expressed as V () the While ssume that V () V (3) D( ) ( msit) (4) V( msi t) () V V m si( t ) m si( t ) () he based o the fact that the phase shift betwee two phases of a two-phase iductio motor is 9, the aerage alue of phase ad phase oltage switchig time period ca be expressed as U U a b mv mv si( ) cos( t ) cos( ) si( t ) (7) From the equatios metioed aboe, assume that max[, ] mi[, ] X, X V (8) where X is defied as (8), which ca be writte as max[ U a, Ub ] mi[ U a, Ub ] X (9) he ca be soled as ( X max( Ua, Ub) mi( Ua, Ub)) () he alue of X has ifluece o the performace of this cotrol system, ad the most coeiet way to fid proper alue of X is icreasig the alue of it step by step ad obserig the step respose of the curret cotrol loop o simulatio model ad real experimet system. ssume that the output of two PR cotrollers of phase ad phase are x, y respectiely. he the modulatig sigal for the three legs ca be obtaied as a b x y () which act as the modulatio sigals of PW to compare with the triagular carrier wae to produce commad sigals for switches as show i Fig. 4. he cure of HD referrig to the alue of X is show i Fig.. It ca be obsered that the alue of HD decreases as X icreases at the begiig, but it icreases as X icreases after a certai poit. hus the alue of X ca be determied. s proposed ad itroduced i [8] [3], a sigificat feature of PR cotroller is its ability to track sufficietly the C curret ad achieig the zero steady-state error at the certai resoat frequecies. ideal PR cotroller i the s-domai ca be defied as K r s Gr ( s) K p () s where K p is the proportioal gad K r deotes the resoat gai. Howeer, it is difficult to implemet a ideal PR cotroller practically i DP usig a fixed poit calculatio. hus the practical expressio of PR cotroller ca be obtaied as K r s Gr ( s) K p (3) s s where ω r is the resoat cut off frequecy. It ca be see from the expressio that ifiite forward cotroller gai ca be achieed by the deomiator at some certai alues. he cotroller parameters ca be determied by first maximizig K p while achieig uity loop gai with a required phase margi (4 ~ ) at the maximum possible crossoer frequecy ad the maximizig the K r. V 3 4 PW =f( x, y ) PR cotroller PR PR Fig. 4. lock diagram of proposed cotrol. r EDPE

4 HD(%) Iteratioal Coferece o Electrical Dries ad Power Electroics (EDPE) he High atras, -3 ept X Curret[] Error[] ime[s] -. e ime[s] e Fig.. Cure of HD referrig to X. C. imulatio Results he parameters of the curret regulatio system is show i LE I. he simulatio results, output currets of phase ad phase as well as the error betwee them with referece sigals, of all three methods are show i Fig., Fig. 7 ad Fig. 8. d LE II. shows the HD ad peak oershoot of all methods. It ca be see that the cure of errors of method I, method II, method III is becomig thier, idicatig that method III ca achiee a better performace tha method I, method II sice the couplig betwee three legs are aoided, error caused by imbalace ca be elimiated by modulatig the potetial of eutral leg middle poit ad PR cotroller performs more effectie o C quatity. Curret[] Error[] Circuit parameters LE I. PREER OF HE C YE Value Resistie compoet of load R a( Ω) 4. Iductie compoet of load L a(mh) 7.4 Resistie compoet of load R b( Ω).98 Iductie compoet of load L b(mh) 4.3 DC bus oltage(v) 3 ack EF frequecy(hz) witchig frequecy(hz) ia ime[s] e ime[s] Fig.. Output currets ad errors of method I,, output currets,, errors. ib e Fig. 7. Output currets ad errors of method II,,output currets,, errors. Curret[] Error[] ime[s] -. e ia ime[s] Fig. 8. Output currets ad errors of method III,, output currets,, errors. LE II. COPRIO EWEE LL HREE EHOD HD Peak oershoot ethod I.4%.7 ethod II.3%. ethod III.78%.4 Where is the output curret of phase, is the output curret of phase, e ia is the error betwee the output curret ad referece of phase, e ib is the error betwee the output curret ad referece of phase. D. Experimet Results I order to demostrate the effectieess of the proposed cotrol algorithm, a experimetal prototype has bee implemeted. he diagram of the hardware system show i Fig. 9 icludes a mai power circuit, a curret detectig circuit, as well as 3F833. lso a.7 kw sigle phase (ubalaced two phase) iductio motor was used as a ubalaced two phase iductio machie coectig directly to the VI. lso, the PR cotroller is discretized by biliear trasformatio to implemet o DP. he output currets are show i Fig., Fig. ad Fig.. e ib EDPE

5 Iteratioal Coferece o Electrical Dries ad Power Electroics (EDPE) he High atras, -3 ept. greater tha that itroduced by the proposed method, idicatig that the proposed algorithm ca achiee a better performace o elimiatig the error betwee the output curret ad referece curret, which are cosistet with the simulatio results. Fig. 9. Diagram of the hardware system. /di Fig.. Output currets of method I. /di Fig.. Output currets of method II. /di Fig.. Output currets of method III. From the experimet results aboe, it ca be easily oticed that the curret ripple itroduced by method I ad method II are 3.33ms/di 3.33ms/di 3.33ms/di III. COCLUIO coetioal three-leg oltage source ierter is used for cotrollig the curret of a two-phase iductio motor i this paper. wo coetioal cotrol strategies, usig two or three closed loop cotrollers which also works for three-phase load i the statioary frame, is itroduced. oel cotrol method, usig two closed loops with PR cotroller ad a ew algorithm modulatig the potetial of the eutral leg middle poit is the proposed. ll methods are erified i L/IULIK, as well as by experimet, which demostrates that the proposed cotrol method ca achiee a better performace i terms of HD, peak oershoot. REFERECE [] C.-. Youg, C.-C. Liu, ad C.-H. Liu, ew ierter drie desig ad cotrol method for two-phase iductio motor dries, Ist. Elec.Eg. Proc. Electric Power pplicat., ol. 43, o., pp. 48 4, o.99. [] E. R. eedict ad.. Lipo, Improed PW modulatio for a permaet-split capacitor motor, i Proc. IEEE Id. ppl. Cof.,, ol. 3, pp. 4- [3] F. laabjerg, F. Lugeau, K. kaug, ad. oes, wo-phase iductio motor dries, IEEE Id. pplicat. ag., July-ug. 4 [4] Jag, Do-Hyu. "PW methods for two-phase ierters." Idustry pplicatios agazie, IEEE 3. (7): -. [] D. G. Holmes ad. Kotsopoulos "Variable speed cotrol of sigle ad two phase iductio motors usig a three phase oltage source ierter", IEEE Idustrial pplicatios ociety aual meetig coferece records, pp [].. de R. Correa, C.. Jacobia,... Lima, ad E. R. C. da ila, " three-leg oltage source ierter for two-phase ac motor drie system", Proc. IEEE PEC',, ol. 3, pp [7]. P. Kazmierkowskd L. alesai, "Curret cotrol techiques for three-phase oltage-source PW coerters: surey", IEEE ras. Id. Electro., ol. 4, pp [8] Hsu, Pig, ad ichael ehke. " three-phase sychroous frame cotroller for ubalaced load [iertor operatio]." Power Electroics pecialists Coferece, 998. PEC 98 Record. 9th ual IEEE. Vol.. IEEE, 998. [9] Pha, Va-ug, ad Hog-Hee Lee. "Ehaced proportioal-resoat curret cotroller for ubalaced stad-aloe DFIG-based wid turbies." Joural of Electrical Egieerig & echology.3 (): [] D.. Zmood, D.G. Holmes, "tatioary frame curret regulatio of PW ierters with zero steady-state error" IEEE ras. o Power Electr. Vol. 8, pp. 84-8, ay 3. [] W. Y. Kog, D. G. Holmes ad. P. cgrath "Ehaced three phase ac statioary frame curret regulators", Proc. IEEE ECCE, pp [] W. Y. Kog, D. G. Holmes ad. P. cgrath "Improed statioary frame C curret regulatio usig feedforward compesatio of the load EF", Proc. IEEE PEC-9, IEEE ppl. Power Electro. Cof., pp.4 - [3]. P. cgrath,. G. Parker ad D. G. Holmes "High-performace curret regulatio for low-pulse-ratio ierters", IEEE ras. Id. ppl., ol. 49, o., pp.49-8, 3 EDPE