Analysis and Suppression of Common Mode Interference in Three- Phase Power Rectifier Unit Based on Common Mode Transformer

Transcription

1 Aalysis ad Suppressio of ommo Mode Iterferece i Three- Phase Power Rectifier Uit Based o ommo Mode Trasformer JINFENG IU 1, YU ZHANG 1, XUDONG WANG 1, ad RUI GONG 2 1 School of Electrical & Electroic Egieerig, Harbi Uiversity of Sciece & Techology, hia 2 State Grid Heilogjiag Electric Power ompay imited, hia ljf78118@163.com, @qq.com, wxd6158@163.com, blackdoor629@163.com Abstract: - Power rectifier uit ca realize covertig curret by use of three-phase sychroous rectificatio bridge. The multiple parallel power uits ca amplify the capability of sigle geerator ad it is ivaluable i battery charge, weldig machie ad electrochemistry fields. Nevertheless, the electromagetic iterferece (EMI) which results from the speedy switch of power devices would affect the parallel output voltage, eve out of cotrol. Accordig to the structure of power rectifier uit i this paper, the curret path ad magitude of commo mode (M) coducted iterferece which rages from 10kHz to 30MHz would be more aalysed. The simulatio model with parasitic parameters based o SPWM cotrol model was built i this paper ad the cotrasted the differet suppressio methods by use of iductor ad trasformer respectively. At last, the lie impedace stability etwork (ISN) ad EMI receiver were used to test the commo mode iterferece (MI) of power rectifier uit. The experimet result verified the accuracy of model ad validity of suppressio method with M trasformer. Key-Words: - Electromagetic Iterferece, ommo Mode Trasformer, oducted Iterferece, Power Rectifier Uit, ie Impedace Stability Network. 1 Itroductio The traditioal apparatus with high direct curret cosists of multiple parallel D power modules i order to output high curret ad they share the high power output. With the improvemet of request for productio process ad efficiecy i may compaies, the deficiecies of this kid of power become more ad more. First of all, it has high eergy cosumptio ad low efficiecy. Secodly, the whole volume is large ad weight is heavy because the power frequecy trasformer is usually used ad may power modules are paralleled. astly, the cotrol apparatus has low precisio ad high eergy cosumptio [1-2]. The low voltage ad high direct curret power supply based o mature sychroous alterator i this paper has multiple parallel power uits. Each uit cosists of three-phase widigs ad three-phase sychroous rectificatio system. The use of MOSFET ca greatly reduce the power coverter s volume ad weight ad better the quality of high frequecy power supply. D power supply ca be delivered to D bus after rectificatio ad the umber of parallel power uits ca be varied to satisfy the power eed of differet load. Although every three-phase sychroous rectifier uit with power switch ca fast the dyamic respose, high frequecy pulse which is produced by switch will lead to high chage rate of curret ad voltage ad become strog EMI, where the MI is domiat [3]. The frequecy of this kid of iterferece rages from two or three kilohertz to dozes of megahertz ad magitude has exceeded over the electromagetic compatibility (EM) limit. EMI of rectifier would ifluece ot oly the ormal procedure of load but rectifier itself. A mass of retrieval material ca prove that strog voltage chage rate produced by eutral poit of rectifier to groud could charge ad discharge the parasitic capacitors, so the MI of three-phase rectifier uit is primarily due to D side [4-6]. Aalysis ad suppressio MI for rectifier uit are so useful that it s crucial to optimize the quality of D output ad improve the EM performace. Sectio 2 presets the commo mode curret loop of voltage mode PWM rectifier. Sectio 3 presets the simulatio module of separate ad etire power uit. Sectio 4 presets suppress method of commo mode EMI. Sectio 5 presets the experimet results by test platform. 2 ommo Mode urret of the Voltage Mode PWM rectifier The thyristor rectificatio circuit is usually used to traditioal three-phase power supply. It would brig low power factor ad a fair amout of resoace to power supply whe thyristor s tur-o agle is smaller. So the extra apparatus with the fuctio of elimiatig resoace ad power factor compesatio E-ISSN: X 92 Volume 12, 2017

2 is widely applied to large bulk thyristor rectifier, therefore, it will icrease the cosumer s cost. I this paper each uit with efficiet ad high frequecy power has the voltage mode PWM rectifier whose switches are MOSFETs of extremely low oresistace. It ca covert A to D ad realize stable D output. This kid of rectifier would improve eergy efficiecy, reduce the reactive power ad resoace ad raise the quality of eergy [7-8]. The structure of high frequecy power supply based o the voltage mode PWM rectifier is show i Fig.1. Three-phase PWM rectifier is composed of three half bridges, amely, six MOSFETs. The iput side of A coects to power supply through three-phase iductace which simulates the ier of sychroous alterator. i sa i sb i sc Fig.1 High Frequecy Power Structure of PWM Rectifier Voltage chage i the switch circuit of PWM rectifier is so rapid that ca reach 10kV/μs ad the couples to parasitic capacitors. osequetly, MI forms o the iput ad output ports. For the structure reliability, MOSFET heatsik usually screws tightly to the shell of machie which is coected to groud i order to do t electrocute whe someoe touches shell. Isulatio layer betwee switch ad heatsik is very thi, that is, the metal coolig fi of switch adheres to heatsik through grease i case of overheat failure for switch. So parasitic capacitor would be formed betwee the drai or source of switch ad heatsik. M voltage will charge ad discharge parasitic capacitor cotiuously ad produce M curret [9]. Approximately formula of parasitic capacitor: 12 ε r A p = (1) h where εε rr is the relative permittivity betwee power switch ad heatsik, A is the area of heatsik, h is the thickess of isulated spacer. Accordig to the material of isulator ad structure of heatsik, we ca get the parameters as below: εε rr =2.2, A=3.1cm 2, h=2mm, the p =30pF. + - But the parasitic capacitor which is eutral to groud i a leg of PWM rectifier is combiig betwee top ad bottom switch. Whe they both have idetical characteristics, the parasitic capacitor i every leg is about double tha i sigle switch. Because parasitic parameters to groud could ifluece MI seriously ad the impedace of lie itself is t ideal, we should keep stability of lie to groud by coectig ISN to circuit o the basis of stadard GBT The previous researches show that differetial mode (DM) iterferece is maily i A side of rectifier, while MI is domiatly produced by D side [10]. ISN is placed ito the D side i the testig procedure. Sice ISN has the characteristics of stable impedace, we ca cosider ISN impedace to groud as lie impedace to groud i the followig aalysis. There are two paths of M curret which are show i Fig.2. Broke lie 1 is oe of M curret that flows iput of rectifier. It flows through heatsik to refereced groud ad the flows back through parasitic capacitor of A power supply [11]. I geerally, the parasitic capacitors of A power supply to groud is much greater tha switch to groud ad their ifluece to M curret ca be igored. Broke lie 2 is the other of M curret. It flows back through testig ISN. Threephase Power Supply i sa i sb i sc SPWM Rectifier ircuit oop 1 ircuit oop 2 ISN Refereced Groud Fig.2 oupled path of M urret oa d Fig.3 shows the result of coducted iterferece whe ISN is iserted betwee filter capacitor ad load. oducted iterferece of etire system cocetrates o the rage from 5MHz to 30MHz which is obviously frequecy scope of MI. This paper will focus o this scope to aalyse ad reduce the iterferece. Maximum iterferece is o 20MHz, whose value reaches almost 60dB, ad the dampig rate is about 30dB/dec. M filter could provide dampig of 40dB/dec i perfect circumstace, that is, the impedace of M oise source ad load are igored [12]. Filter must provide dampig of 30dB/dec at least whe impedace of oise source ad load are cosidered, ad the it ca satisfy the desig demad. E-ISSN: X 93 Volume 12, 2017

3 through impedace aalyser ad Saber simulatio fittig curve as below: R=100mΩ, r =80H, r =0. Magitude(dBµV) Frequecy(MHz) Fig.3 MI result of rectifier 3 Simulatio Model of Power Rectifier Uit There are passive devices such as resistor, capacitor etc. o the output of rectifier uit. They geerally regard as pure resistor or capacitor i the desig process, while they all have separately parasitic parameters withi the high frequecy, especially the radio frequecy whose rage from 1MHz to 30MHz. They dramatically affect EM of device [13]. The high frequecy characteristics of these passive devices must be cosidered whe we aalyse MI. 3.1 High Frequecy haracteristic of Resistor The resistor s impedace characteristic is differet from ideal sice it is typical load for rectifier. Fig.4 is high frequecy equivalet circuit of resistor, where r is leakage iductace ad r is parasitic capacitor of resistor. r Fig.5 Impedace characteristics of 500kΩ resistor Fig.6 Impedace characteristics of 100mΩ resistor 3.2 High Frequecy haracteristic of apacitor Real capacitor exists stray iductors ad high frequecy equivalet circuit is show i Fig.7, where c is leakage iductor, R c is equivalet series resistor. The equivalet parameters of 4700μF electrolytic capacitor i this system are listed as below: c =10H, R c =30mΩ. R Fig.4 High frequecy equivalet circuit of resistor For large resistor, parasitic capacitor is domiat withi high frequecy. Nevertheless, for small resistor, mai parasitic parameter is iductor. Fig.5 ad Fig.6 are impedace characteristics which rage from 10kHz to 30MHz for 500kΩ ad 100mΩ, respectively. It s evidet that 500kΩ resistor still keep resistace withi 1MHz, ad magitude falls at the rate of -20dB/dec over 1MHz which is the state of capacitace, meawhile, the phase reaches -90⁰. For 100mΩ resistor, parasitic iductor is effective ad magitude arises at the rate of 20dB/dec withi the whole testig frequecy. The phase reaches 90⁰. Applied load i this system is widig resistor with low resistace ad parasitic iductor is pricipal i high frequecy. We ca get the parameters of resistor r R c Fig.7 High frequecy equivalet circuit of capacitor Fig.8 represets the impedace characteristic of this capacitor. The impedace of capacitor is so high that ca regard as ope i the circumstace of D ad low frequecy. apacitor would play mai role if frequecy was high ad magitude falls at the rate of - 20dB/dec. orer frequecy emerges whe impedace of capacitor ad stray iductor are almost equal. Therefore, magitude arises at the rate of 20dB/dec ad phase swiftly reaches 90⁰ because stray iductor prevails durig this period. c E-ISSN: X 94 Volume 12, 2017

4 Fig.8 Impedace characteristics of 4700uF capacitor 3.3 Simulatio Model of Etire Power Rectifier Uit The simulatio model for power rectifier uit ca be built accordig to aforemetioed parameters which is show i Fig.9. p is parasitic capacitor of every rectifier leg s eutral to groud which is a composite of up ad bottom switches, whose value is almost twice of equatio (1). ISN itroduces 0.25μF capacitor ad 50Ω resistor for each lie of D output to groud. is the parasitic capacitor of D lie to groud. Meawhile, the model cosiders the parasitic parameters of filter capacitor ad load. I order to achieve high efficiecy ad fast respose, the method of load power feedforward without differet beat is applied to this paper. This method ca ot oly improve the performace of dyamic respose for PWM rectifier but also trace the variace of load power real-timely through the test of load power ad feedforward compesatio. Meawhile, it ca fast trace curret sigal of D bus without differece ad reduce the distortio of voltage ad curret of power supply through the PWM rectificatio techology with high power factor. The fudametal idea of this method is to calculate the pulse width of ext switch period accordig to the state equatio of D system, feedback sigal ad required ext refereced output value. Fig.9 Simulatio model with parasitic parameters of power rectifier uit The MOSFET is FDP8030 which is product of Fairchild Semicoductor Icorporatio. Accordig to the parameters of this MOSFET, we set about the model of switch as below: tur-o rise time t r =185s, tur-off fall time t f =200s, o-state resistace r o =3.5mΩ. Fig.10 is covertig scheme of sigle rectifier leg. M curret flows through parasitic capacitor p ad heatsik to refereced groud, ad the flows back to D side through 0.25μF capacitor ad 50Ω resistor of ISN. It divides ito two paths, i.e. curret I 1 ad I 2, where I 1 flows back positive D lie directly ad I 2 flows back through electrolytic capacitor ad load. For coveiece, the parasitic capacitors of D lie to groud ca be igored sice they coect ISN i parallel completely [14]. Although there are equivalet series iductor ad resistor for electrolytic capacitor, its iductor is much less tha the parasitic iductor of M loop circuit ad its resistor is much lower tha 50Ω of ISN. osequetly, parasitic iductor ad resistor of electrolytic capacitor ca be igored, while capacitace of series-coected 4700 μf ad 0.25 μf is almost 0.25 μf. Otherwise, the resistace of load is very low because we wat to produce low voltage ad high curret D output. So the paths of curret I 1 ad I 2 are early same. E-ISSN: X 95 Volume 12, 2017

5 I 2 I 1 R where 1 ω =, R ξ =, Z0 =. They represet 2 resoat agular frequecy, dampig coefficiet ad characteristic impedace, respectively. Heatsik p I cm 50Ω 50Ω Refereced Groud Fig.10 Scheme of sigle rectifier leg with parasitic parameters Fig.11 is equivalet circuit of MI for three legs. V 1, V 2 ad V 3 are iterferetial source of every leg s eutral. R o is a composite of resistor of D lie ad load. cm is equivalet iductor betwee heatsik ad refereced groud ad s is equivalet iductor betwee ISN ad electrolytic capacitor. Fig.11(b) shows that simplified equivalet circuit, where is the sum of s /2 ad cm, R is almost 25Ω because R o is much lower tha 25 Ω. Otherwise, 0.5μF capacitor ca be igored because either p or is much less tha 0.5μF ad the series result is early equal to the sum of p ad. We ca get the circuit parameters by impedace aalyser ad correspodig calculatio as below: s =8μH, cm =2μH, =1200pF, p =60pF. osequetly, the last M equivalet circuit is secod-order R circuit, where =6μH, R=25Ω, =1260pF. V 1 +V 2 +V 3 p s /2 cm R o (a) Etire equivalet circuit 0.5µF 25Ω 4 Suppress of ommo mode EMI for Power Rectifier Uit Usual method to suppress commo mode iterferece is EMI filter. M capacitor ca reduce M iterferetial source, while M iductor ca icrease impedace of loop circuit which would reduce M curret [15]. This paper cosults the method of M trasformer which could atteuate axial curret ad the proposes the M trasformer which is put i D side to suppress MI. 4.1 Aalysis of M Iductor used i D Side M iductor is essetially trasformer whose turs ratio is 1:1, while the methodology of coectig is differet. Fig.12 is the symbol ad structure of M iductor ad Fig.12(b) demostrates the directio of widigs ad magetic field. Flux H M will superpose upo each other ad iductace could icrease whe M curret flows through M iductor. Nevertheless, flux H DM will offset by each other ad iductace is almost zero whe DM curret flows through M iductor. Namely, M iductor performs high impedace for M curret ad low impedace for DM curret. So it ca maily reduce MI. M iductor is useful to suppress MI of low frequecy, while larger M iductor would reduce less MI of high frequecy sice the icrease of widig turs results i the icrease of distributed capacitor. H M R I DM H DM I M E I DM H DM (b) Simplified equivalet circuit Fig.11 Equivalet circuit of MI Accordig to R circuit, M curret, i.e. resoat curret is: E it = e ξ ω t ξω 2 ( ) t si( 1 ) 2 1 ξ Z0 (2) (a) Symbol H M (b)structure Fig.12 ommo mode iductor M iductor is placed betwee D output ad ISN which is show i Fig.13. M iductor ca be equivalet to iductor ad resistor i series if M iductor s parasitic capacitor was igored. E-ISSN: X 96 Volume 12, 2017

6 PWM rectifier oad M iductor ca provide higher impedace from 10kHz to 2MHz ad lower impedace over corer frequecy. So M iductor has limit ability to reduce MI of high frequecy. 50Ω 50Ω Refereced groud Test scheme with commo mode iductor Fig.13 Suppose the ad R of series resoat circuit are times ad m times respectively tha origial ad the the characteristic parameters are: 1 1 ω' = = ω (3) mr m ξ' = = ξ (4) 2 Fig.15 Impedace aalysis of MI loop circuit Z ' 0 = = Z 0 (5) So M curret is updated as: E / 2 ( ) m ξω ω it = e t si( ( mξ ) t) (6) 2 ( mξ ) Z 0 Sice >>(mζ) 2 i M iductor, resoat curret ca be simplified as: E / ( ) m ξω ω it = e t si( t) (7) Z0 Ferrite core of M iductor is EE16 with 8 widig turs for each. ross-sectioal area of magetic rig is 0.19cm 2 ad legth of it is 1.7cm. Each iductace is 0.735mH by calculatio. oupled equivalet iductor is 0.75mH which is tested by impedace aalyser, that is, the leakage iductace of each widig is 3μH. The structure of M iductor is similar to rig trasformer because they both are composed of magetic rig ad two widigs. oupled iductor i Saber ca simulate M iductor ad desigate P ports of each coupled iductors as dotted termial. oected iductor ad coupled iductor are set 0.753mH ad 0.75mH respectively. Fig.14 is the simulatio model of coupled iductor. Fig.16 Frequecy spectrum of M curret 4.2 Aalysis of M Trasformer used i D Side M trasformer ca form by addig secodary widig m based o M iductor. R t is i parallel with secodary widig. m could iduce curret whe flux is variable i M trasformer caused by M curret but DM curret would offset. Fig.17 represets the structure of M trasformer with six ports. m Fig.17 Structure of M trasformer Fig.14 Model of coupled iductor Frequecy spectrum of M loop impedace with M iductor is show i Fig.15. Fig.16 presets frequecy spectrum of M curret by A small sigal aalysis of Saber. Accordig to the simulatio result, Two primary widigs turs are still 8 ad ew secodary widig turs is also 8. Secodary widig is thi i order to atteuate core widow area sice the secodary curret is very low ad parallel resistor ca be chose o the basis of suppressio request. Fig.18 E-ISSN: X 97 Volume 12, 2017

7 demostrates the test scheme whe M trasformer is placed o D side of rectifier. 1 R t 2 PWM rectifier oad E m R R t Refereced groud 50Ω Fig.18 Test scheme with M trasformer 50Ω The trasfer fuctio of M equivalet circuit should be aalysed ad the determie the resistace of Rt. Fig.19 is equivalet circuit with M trasformer which is replaced with T type circuit. 1, 2 ad m are leakage iductace of two primary widigs ad iductace of excitig widig respectively. We ca get parameters after testig as below: m =0.6mH, 1 = 2 =3μH. Fig.19 Equivalet circuit with M trasformer Accordig to equivalet circuit of Fig.17, the trasformer fuctio of M curret to voltage source is: Icm() s 1 = (8) E( s) s 1 + ms//( Rt + 2s) + s+ R+ 1/ s where 1 combies with to form t for coveiece ad the fuctio after sortig out is: I () s s[( s + ) + R ] = cm 2 m t 3 2 E( s) s ( 2 + m + m2) + s [ R( 2 + m) + Rt( 2 + m)] + s( 2 + m + RR t ) + Rt (9) Sice 2 << m, t << m, RR t << m, the characteristic equatio is: 3 2 s m( + 2 ) + s m( R + Rt) + sm + Rt = 0 (10) Based o aalysis of Matlab root locus, there are two cojugate complex roots ad a real root whe 0<R t <120Ω. M curret determied by two complex roots is oscillatig because the real root is offset by zero o the origi. There are three real roots whe 120Ω<R t <350Ω. M curret is determied by ext pole to the origi because the pole which is closest to the origi is offset by zero ad its wave is dampig expoetially. There are two complex roots ad a real root whe R t >350Ω. M curret is determied by two complex roots sice the real root is far away from the origi ad its wave is still oscillatig. Fig.20(a)-(c) represet zeros-poles distributio for M curret loop circuit whe R t is 2Ω, 200Ω ad 1000Ω, respectively. The result is i accordace with aforemetioed aalysis. Especially, two complex roots are o the vertical axis ad system is critically stable state whe R t =1000Ω. (a) R t =20Ω (b) R t =200Ω (c) R t =2000Ω Fig.20 Poles-Zeros distributio The choice of R t ca make three real roots for characteristic equatio ad M curret ca ot oscillate. Evetually, R t is 200Ω ad M curret is determied by ext pole to the origi. Fig.21 is M E-ISSN: X 98 Volume 12, 2017

8 trasformer model i Saber where excitig widig is i parallel with R t. Frequecy spectrum of M loop impedace with M trasformer is show i Fig.22. Fig.23 represets frequecy spectrum of M curret by A small sigal aalysis of Saber. Accordig to the simulatio result, M trasformer provides low impedace from 10kHz to 200kHz, while high impedace after corer frequecy. Especially, impedaces are all higher tha them at the rage of low frequecy over 1MHz.So it s efficiet for suppressio of high frequecy MI. Fig.25 represets MI spectrum through EMI receiver ad ISN whe M iductor was applied to system. It s obvious that M iductor ca atteuate MI o the rage of low frequecy but ca ot reduce MI o high frequecy which is importat area to cotrol. O the other had, MI o high frequecy is higher because partial of DMI coverts to MI based o the existece of M iductor. Fig.24 Test system of M coducted iterferece Fig.21 Saber model of coupled trasformer Magitude(dBµV) Frequecy(MHz) Fig.25 MI spectrum with M iductor Fig.22 Impedace aalysis of MI loop circuit Fig.26 ad 27 show MI spectrum whe parallel resistor R t i M trasformer is 100Ω ad 200Ω, respectively. MI is atteuated effectively o the rage of high frequecy because of the existece of parallel resistor. The characteristic equatio has two complex roots ad a real root whe R t =100Ω. Therefore, although M curret is reduced, it oscillates. The characteristic equatio has three real roots whe R t =200Ω. M curret is atteuated o the etire rage of testig frequecy. It ca prove the accuracy of model ad validity of suppressio method. Fig.23 Frequecy spectrum of M curret 5 Experimet of Validatio I order to verify the model ad EMI suppressio method, MI testig platform for power rectifier uit is built. AFJ istrumets is used to test M coducted iterferece which is show i Fig oclusio This paper aalyzed coupled path of M curret of SPWM rectifier ad deduced MI was produced by chargig ad dischargig for parasitic capacitor of leg s eutral to groud. R resoat equivalet circuit was built to simulate M curret loop. The priciple ad suppressio result for MI were E-ISSN: X 99 Volume 12, 2017

9 compared whe M iductor ad trasformer are used respectively. The experimet spectrum result verified accuracy of model ad validity of suppressio method. While, there are three demerits about M trasformer. First, the structure of M trasformer is more complicate tha iductor. Secodly, secodary widig will produce trasformer s M oise through electric field couplig oce oise voltage distributes o primary widig. astly, the wave ripple of D output voltage is more high because of the itroductio of M trasformer. Therefore,i order to coquer the defects as stated above, more exact parameters desig for M trasformer must be doe i the future accordig to the characteristics of trasformer. Magitude(dBµV) Magitude(dBµV) Frequecy(MHz) Fig.26 MI spectrum with M trasformer whe R t = Frequecy(MHz) Fig.27 MI spectrum with M trasformer whe R t =200 Ackowledgemets This research was supported by the Natioal Natural Sciece Foudatio of hia (No ) ad Key Techology Research of Heilogjiag(No.GA13A202) Refereces: [1] P. A. Dahoo, M. Firmasyah, D. Pramasti Y., A high-curret low-voltage D power supply, IEEE Power Electroics ad Drive Systems, Depasar, Idoesia, [2] Qamaruzzama, A. Purwadi, P.A. Dahoo, A D high-curret low-voltage power geeratig system, IEEE Power System Techology oferece, Kumig, hia, [3] MH Hedayati, AB Acharya, ommo-mode filter desig for PWM rectifier-based motor drives, IEEE Trasactios o Power Electroics, Vol.28, No.11, 2013, pp [4] Pei Xue-ju, Zhag Kai, Kag Yog, he Jia, Dampig ad Suppressio of commo mode iterferece currets i PWM iverter, Proceedigs of the SEE, Vol.24, No.11, 2004, pp [5] ei Xig, Jia Su, Wai Rogjog, oducted commo-mode EMI reductio by impedace balacig, IEEE Trasactio o Power Electroics, Vol.27, No.3, 2012, pp [6] Z. Zha, Y. Zhog, H. Gao,. Yua, Hybrid selectio harmoic elimiatio PWM for commo-mode voltage reductio i three-level eutral-poit-clamped iverters for variable speed iductio drives, IEEE Trasactios o Power Electroics, Vol.27, No.3, 2012, pp [7] Joha W. Kolar, Thomas Friedli, Jose Rodriguez, Patrick W. Wheeler, Review of threephase PWM A-A coverter topologies, IEEE Tras. Id. Electro., Vol.58, No.11, 2011, pp [8] Foseca Davide, abrita arlos, alado Maria, Some desig aspects cocerig a ew siglephase A/D PWM coverter for ac tractio systems, WSEAS Tras. ircuits Syst., Vol.4, No.9, 2005, pp [9] Tokuda Masamitsu, Ohsaki Hiryuki, Mastuo Takashi, oducted iterferece immuity characteristics to high-speed power lie commuicatio system, IEEE Iteratioal Symposium o Power ie ommuicatios ad Its Applicatios, Udie, Italy, [10] He Hog, Bao Shuai, i Hag, Suppressio of the coducted iterferece of switchig power supply, Key Egieerig Materials, Vol.474, No.2, 2011, pp [11] Su Ya-xiu, Su Rui-feg, he Big-cai, Forecast of coducted iterferece of three-phase PWM drive motor system, Electric Machies ad otrol, Vol.15, No.5, 2011, pp [12] Darie E., episca., About the high-frequecy iterfereces produced i systems icludig PWM ad A motors, Proceedigs of the 12 th WSEAS Iteratioal oferece o ircuits, Heraklio, Greece, [13] Fucu Ha, Shahog He, Dere Feg, Biyig Peg, The coducted iterferece of electromagetic pulse toward switch trigger system, IEEE oferece o Idustrial Electroics ad Applicaios, Hagzhou, hia, E-ISSN: X 100 Volume 12, 2017

10 2014. [14] M Heldwei, T Nussbaumer, JW Kolar, ommo mode modellig ad filter desig for a three-phase buck-type pulse width modulated rectifier system, IET Power Electroics, Vol.3, No.2, 2010, pp [15] JW Shi, H Shi, GS Seo, JI Ha, ow-commo mode voltage H-bridge coverter with additioal switch legs, IEEE Trasactios o Power Electroics, Vol.28, No.4, 2013, pp E-ISSN: X 101 Volume 12, 2017