INF 5460 Electronic noise Estimates and countermeasures. Lecture 11 (Mot 8) Sensors Practical examples

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1 IF 5460 Electroic oise Estimates ad coutermeasures Lecture 11 (Mot 8) Sesors Practical examples

2 Six models are preseted that "ca be geeralized to cover all types of sesors." amig: Sesor: All types Trasducer: Eergy from oe form to aother Eg radiatio Power Piezo electric elemet (bidirectioal fuctio): Motio Voltage Trasducer = Sesor Actuator Detector: Optics, Ifrared, Particle Simulators model the most commo types of oise while special oise types such as. G (Geeratio-egeeratio oise) must be represeted by separate (typically user defied) oise models.

3 8-1 Voltaic Sesor This type of sesor geerates a voltage sigal. Cc E Sesors: Thermo coupler Thermopile Pyro electric ifrared detector s L Vso,Eo Vs Cc - ED s Es Vs Cp L IL I CC: Because we are oly iterested i the AC portio of the sesor sigal. L: Provides bias to the amplifier ad ay impedace matchig. Cp: Parasitic capacitace of the sesor or betwee the coectio lies. Low oise L should be large, Cp should be small ad CC large. The amplifier should be chose so that 0=S ad EI is as small as possible. 3

4 8- Biased resistive sesor VBB B s Cc L - Vso,Eo s I B Ib Cp Cc L IL E I Yellow ds Vs This type provides a variety i the sesor resistace (ds S). A bias etwork is required. Two ew oise sources have to be cosidered: VBB ad B. If the sesor resistace is placed i a bridge, there will also be cotributios from the other bridge resistors. Sesors: Stretch lap (Strai gauge) Photo coductive ifrared cell Bolometer radiatio detector esistive thermometer Piezo resistive sesors B: Sesor bias CC: emovig DC-sigal L: Amplifier iput bias 4

5 V S I B S V BB S S B VBB B s ds Cc L - Vso,Eo s Vs I B Ib Cp Cc L IL E I Alteratively the sigal is modelled as a curret source i parallel with S: IS=VS/S. Is: (Icorrectly amed I i parallel with s i the figure) Thermal oise 1/f-oise G- oise (Geeratio-ecombiatio) Ib: Thermal oise ad ay other oise due to B. Low oise B should be large. B may be replaced by a coil. CC should be so large that IXc does ot cotribute eve at the lowest frequecies. If VBB ca ot be chaged B has to be selected as a compromise to get high eough VS ad low eough oise. The proper choice depeds o the sesor characteristics. If VBB ca be icreased it is possible to achieve both high gai ad low oise. Further we should have L S so that IL does ot cotribute 5 sigificatly.

6 8-3 Optoelectroic Detector Applicatios: Ifrared detectio Heat meterig Light ad colour measuremet Fibre optic sesors Sesors for CDs Laser detectors Two types: 1. Photovoltaic: Light provides a voltage o output. Photocoductive: Light provides curret (i additio to dark curret). A bias is required to collect charges. Photo coductive detectors have two subgroups: a. Made of bulk semicoductor material ad where the coductivity icreases with exposure. Modelled as a variable resistace. Discussed earlier. b. Perceive the detector as a diode. The diode is reverse biased. I the followig we will discuss a photo coductive diode of type b (i.e. with a diode model of the sesor) 6

7 Yellow IB B VBB VBB B ID - Vso,Eo Ecell cell E - B - Vso,Eo B Is Ip rd Cd Cw I1 I I (Figur fault: Yellow B should be. Cd, Ecell ad cell should have bee gree (part of sesor diode).) The figure shows three schematics: The simple schematic, the most used schematic ad the oise form of the most used schematic. The voltage over B is a product of B ad the curret through the detector: Curret = leakage curret sigal curret. 7

8 IB B V BB V BB B ID - Vso,Eo Ecell cell E - B - Vso,Eo B Is Ip rd Cd Cw I1 I I B provides a virtual groud at the iput that will reduce the iput impedace ad thus improve the frequecy respose V0=-IDB. IS: Sigal curret (ot oise curret) IP: Diode oise i the detector (ot thermal oise) I I I 1/ sh G rd: Dyamic oiseless resistace i the photo diode Cd: Parasitic capacitace of the diode cell: Series resistace of the diode Ecell: Thermal oise i the diode CW: Parasitic capacitace of the wires B: Feedback resistace IB: Thermal oise i B : esistace o the positive amplifier iput I: Thermal oise i the E,I1 ad I: oise i the amplifier model. 1/ f FET iput at the amplifier is probably the best choice here! 8

9 8-3-1 Photo Diode oise Mechaisms (All oise currets passig through the diode) I p I sh IG I qi f sh I D 1/ f Ecell 4kT I E s cell cell cell f IG-: Geeratio-ecombiatio oise. The coductivity varies due to the variatios i the free charge. The oise is "White" util 1/(average life time of the e-h-pairs i the detector diode). Ish, IG- ad I1/f: Fuctio of curret ad icreases with curret stregth. Miimum oise whe the curret through the diode is oly backgroud photo oise. 9

10 EP = oise Equivalet Power is the value of a iput sigal (i this case the light power) that produces a electrical output sigal that is as large as the output oise aloe whe there is o iput sigal. 10

11 8-3- PI Photo Diode Sesor PI diode is used for visible light ad to the portio of the ifrared spectrum that is closest to visible light. PI=P - Itrisic/o-doped -. The itrisic regio gives a larger depletio/sesitive regio. eed bias voltage <50V ad typically i the rage 5-0V. Example values: VB=0V Cd= typically 1pF-5pF cell = <50 d=10g ID: Dark curret: 100pA typical reverse curret 1/f-oise: oise corer: 0-30 Hz 10dB/dec icrease below corer frequecy Max respose: 0.5A/W i the visible frequecy bad m, 0.75 electro/photo=75% quatum efficiecy EP dow towards -110dBm/Hz 11

12 8-4 LC Sesor Model Sesors: Heads for magetic tapes s Cc - Yellow Vso,Eo s Cc E Iductive pick-ups Dyamic microphoes Vs Lp Cp L Es Vs Lp Cp L IL I Liear variable differetial trasformers "various other iductive sesors" S: Sesor series resistace or the real part of the sesor impedace. ES: Thermal oise i S LP: Sesor iductace CP: Capacitace used to decide the resoace. It cosists of iteral ad exteral parasitic ad iteded capacitaces. CC: Isolate the DC-compoet from the amplifier so that it ca be set up with the desired bias voltage. IL: Thermal oise i L 1

13 Low oise At resoace E will be at its miimum, ad I will oly be depedet o the impedace of the series iductace ad resistace. (Eq. 7-13) Coils with magetic core have decreasig iductace ad growig resistace at higher frequecies. It may therefore be ecessary to model the coil at several frequecies. Costructio of the sesor coil ad resoace capacitace ca be doe so that maximum S/ ratio is achieved. VS is proportioal to the umber of turs. Coil resistace is proportioal to the umber of turs for small diameters. oise is proportioal to the square root of the umber of turs. Thus, the sigal level will icrease more tha the oise level with icreasig umber of turs util a certai limit. 13

14 8-5 Piezoelectric Trasducer E - Vso,Eo LM Lx L C M s CB Cp Lx L IL I Yellow Es "Piezo" "Electric" Mechaical motio Electrical respose Applicatios: Microphoes Hydrophoes Soar Seismic detectors Vibratio Sesors Accelerometers Two resoaces --- Series resoace LM ad CM --- Parallel resoace (CMCB) ad Lx. ormally the parallel resoace is preferred LM: Mechaical iductace CM: Mechaical capacitace S: Serial loss i the trasducer ES: Thermal oise i S CB: Trasducer capacitace IS: Sigal curret (o oise) Cp: Parasitic cable capacitace Lx: Exteral coil L: Load resistace IL: Thermal oise i L 14

15 Equivalet iput oise: E - Vso,Eo LM Lx L C M s CB Cp Lx L IL I Es Z S Z L E i kts E I I Z L ZS: The serial impedaces of S, CM ad LM. ZL: The parallel impedace of CB, CP, Lx ad L. ZP: is ZS ZL Z 4 L P S is typically small ad the first term ca usually be igored. This is a high impedace system ad E will be small compared to I. To get the least amout of oise curret should L be large ad I small. A FET amplifier should be chose due to: Small I L ca be made be very large 15

16 8-6 Trasformer Model Why havig a trasformer betwee the sesor ad the amplifier? 1) Impedace matchig makes that both the sesor ad the amplifier "sees" the impedace with the least oise. ) Provide isulatio betwee the source ad amplifier. (Security, DC-currets, etc.) 3) To achieve maximum trasfer of sigal power. 4) Most optimal for the smallest sesor resistaces However the trasformer also cotributes with some oise! 16

17 Impedace trasformatio Assume ideal trasformer: We will the get 1 1 V V P P s p 1 : TV V T Def p S 1 s p T 17

18 I this way the sesor resistace is trasformed so that the amplifier sees the optimal source resistace givig the least possible oise. We have previously defied 0=E/I. Whe we let E' ad I' represet their trasferred value o the source side we get: ad We will the have o the source side: We match so that '0=S ad have S=0/T²T²=0/S. We choose the tur ratio of the trasformer so that T²=0/S to get the smallest possible oise. s p E T E E ' P S I TI I ' ' ' ' P S T I T E I E 18

19 s Vs T L - Vso,Eo Yellow s Es Vs C1 C Itc Lp 1:T T1 sec Ers C L E L E I VS: Sesor sigal voltage S: Sesor resistace ES: Thermal oise i S C1: Primary shuts capacitace P: esistace primary side of trasformer, serial (ot amed i figure) EP: Thermal oise i P (ot amed i figure) C: esistace primary side of the trasformer, parallel Itc: Thermal oise i C Lp: Iductace at the primary side T1: oiseless, ideal trasformer sec: esistace secodary side of trasformer Ers: Thermal oise i sec C: Secodary shuts capacitace L: Load resistace EL: Thermal oise i L 19

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