, the error signal, (3), can be expressed as (4). U U e U e U e (2) (3) (4) Assuming
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- Norman Peters
- 6 years ago
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1 Sychroizatio i highly distorted three-phase grids usig selective otch filters Cristia Blaco, David Reigosa, Ferado Briz ad Jua M. Guerrero Uiversity of Oviedo. Dept. of Elect., Computer & System Egieerig. Gijó, 3324, Spai blacocristia@uiovi.es, diazdavid@uiovi.es, ferado@isa.uiovi.es, guerrero@isa.uiovi.es Abstract Robust extractio of the positive sequece voltage magitude ad frequecy i highly distorted grids is of paramout importace i distributed power geeratio (DPG) systems. Phase locked loop (PLL) sychroizatio methods are commoly used, they ca be grouped ito pre-filter stage methods ad filter i the loop methods. Though both provide similar performace ad ca be desiged to reject oe or more disturbig harmoic compoets although, compared to prefilter stage methods, filter i the loop methods are coceptually simpler ad easier to tue. Coversely, filter i the loop methods ca show ustable behavior if they are ot properly desiged ad do ot iclude disturbace rejectio strategies whe the magitude is distorted, their use ot beig therefore advisable whe power calculatio or magitude sychroizatio is eeded. This paper proposes a filter i the loop sychroizatio techique able to isolate the magitude ad phase of the positive sequece voltage of the microgrid/grid eve uder high distorted coditios. The method is based o a agle-trackig observer, which extracts the positive sequece phase, ad a scalar product to extract the positive sequece magitude, which provides a disturbace rejectio mechaism for both phase ad magitude estimatio. Idex Terms Grid sychroizatio, complex PLL, complex coefficiets filters, harmoic rejectio. H I. INTRODUCTION istorically, cetralized power plats have bee cosidered the most effective ad reliable way to geerate electricity, the use of Distributed Power Geeratio (DPG) beig traditioally restricted to regios lackig adequate ifrastructure. However, i recet years, due to the ustoppable icreased electricity demad, atural resources maagemet ad evirometal cocers, DPG is growig little by little. Actually oly % of worldwide eergy is geerated by DPG, which icludes both reewable (wid, solar, etc ) as well as o-reewable (fuel cells, micro gas turbies, etc ) eergy resources, meaig that, globally speakig, the ew paradigm is at a early stage. Although DPG is usually related to small or medium size power plats, it is expected that i the medium term each home-user ca become a autoomous etity, with the capability ot oly of demadig but also of ijectig power ito the grid, which is commoly kow as micro-geeratio []. A very exteded ad suitable way to isert the DPGs ito the electrical system is throughout microgrids. This cocept was first defied i [2] as a system with reewable ad o- This work was supported i part by the Research, Techological Developmet ad Iovatio Programs of the Spaish Miistry of Sciece ad Iovatio- ERDF uder grat MICINN--ENE2-494 ad the Miistry of Sciece ad Iovatio uder grat MICINN--CSD29-46, ad by the Persoel Research Traiig Program fuded by the Regioal Miistry of Educatio ad Sciece of the Pricipality of Asturias uder grat BP-7 reewable eergy resources, icludig loads, eergy storage ad heat, beig a cotrollable system providig power geeratio, power storage ad heat to a local area. Geerally speakig, a microgrid ca operate i two differet modes: islad ad grid-coected [3]. I islad mode, it works as a autoomous system, the magitude ad frequecy of the fudametal voltage beig set by a master source or by a cetral cotroller [4]. I grid-coected mode, the magitude ad frequecy of the fudametal voltage are established by the grid [3]. Estimatio of the magitude ad phase of the positive sequece voltage at the poit of commo couplig (PCC) beig of paramout importace to guaratee stable operatio ad precise cotrol of the active/reactive power flows. Durig grid-coected operatio, strict regulatios regardig power quality (harmoics ad ubalaces), isladig detectio, frequecy shifts ad maximum magitude deviatios must be fulfilled [7]. Although durig islad operatio mode these regulatios are ot ecessary to be met, some good practice recommedatios are usually give [8]. Both positive ad egative sequece harmoics usually appears at the PCC voltage i case of high power trasiets, o-liear loads or ubalaces [9], beig therefore a essetial issue the developmet of a sychroizatio method that efficietly works uder high-distorted coditios to prevet the coverter to re-iject the disturbaces to the microgrid/grid. Sychroizatio methods ca be roughly classified ito methods that extract the grid frequecy, referred as frequecy locked loop (FLL) methods ad methods that extract the grid phase, referred as phase locked loop (PLL) methods. The mai drawback of the FLL methods is that they usually have a poor disturbace rejectio capability [] agaist harmoic distortio strategies to overcome these limitatios have already bee proposed []. O the other had, PLL methods typically provide disturbace rejectio capabilities agaist harmoic ad ubalaced coditios [4], what makes them a appealig optio. The PLL methods could be orgaized as follows: Methods that use a PLL i the sychroous referece frame (SRF-PLL) [5] or a agle trackig observer (ATO) [6]. This method locks the grid phase ad it is geerally limited to udistorted etworks sice it does ot implemet ay specific disturbace rejectio mechaism, beig achieved it by usig a reduced badwidth i their PLL/ATO PI cotroller. Pre-filter stage methods: they use a previous filterig stage that feeds the SRF-PLL or ATO with the goal of removig specific harmoic compoets. The pre-filter stage ca be composed by a decouplig etwork [2] or a cascade of filters (real or complex coefficiets) [4], some
2 of them allowig the extractio of high order harmoics [3]. Filter i the loop methods: they elimiate harmoic compoets by isertig a filterig stage withi the SRF- PLL/ATO close-locked loop, [8]. The mai drawback of these methods is that the disturbace rejectio mechaism is oly effective for phase extractio, but ot for the magitude. This ca have adverse effects for power calculatios or durig the sychroizatio process. I this paper, a ew filter i the loop sychroizatio method with disturbace rejectio capability for both phase ad magitude estimatio is proposed. The paper is orgaized as follows: sectio II shows the basics of the proposed sychroizatio method. Filterig process, tuig ad stability criteria are show i sectio III, while a simulatio based aalysis of the proposed method uder differet workig coditios is give i Sectio IV. Fially the coclusios are preseted i Sectio V. II. GRID SYNCHRONIZATION USING SELECTIVE CASCADE OF NOTCH FILTERS Ay three-phase balaced system (voltages ad/or currets) ca be expressed as a complex vector ito a αβ referece frame (). A ideal grid will oly exhibit a positive sequece voltage (=). However, a egative sequece (=-) voltage, due to ubalaced loads, as well as higher order harmoic compoets (=, 7, -, 3, ), due to o-liear loads like diode ad thyristor rectifiers, ca be foud i practice. u U e j( t ) U e j( t ) U e j( t ) 5,7,,3... where is the harmoic order. Fig. shows the block diagram of the proposed method, the sigal processig used to estimate the fudametal voltage compoet magitude ad phase is explaied followig. () -. The error sigal (3) is obtaied as the vector cross-product betwee the estimated uit vector e j ˆ U, whose phase is the estimated phase of the iput sigal, ad the iput sigal (U αβ ). The error is divided by the estimated fudametal iput magitude (U ) i order to make it isesitive agaist SAGs ad magitude chages. Assumig perfect trackig of the fudametal compoet, ˆu t, the error sigal, (3), ca be expressed as (4). U U e U e U e (2) U j t jm t j t m ˆ ˆ u u j ˆ u e U U Re si Im cos si( ˆ ) U cos( t) U cos m t U cos t u m cos( ˆ ) U si( t) U si m t U si t u m U m si ( m ) t U si ( ) t (4) Assumig, ad for particular the case of =5 (- 5 th harmoi ad m=7 (7 th harmoi, a 6 th harmoic is iduced ito the error sigal (4), which amplitude is a liear combiatio of the amplitude of the th ad 7 th harmoics. Similarly, the - th ad the 3 th harmoics will iduce a 2 th harmoic i the error sigal, i.e. harmoics at frequecies h*6*ω (h=,2,3, ) are iduced ito the error sigal. Whe a oliear load is fed with a three phase ubalaced voltage system, the voltage complex vector, u αβ, ca be expressed as (5), both positive ad egative odd harmoics beig preset ito the PCC grid voltage (see Fig. 2 [9]. As a cosequece of this, the error sigal (4) (see Fig. ) cotais all eve harmoics. Fig. 2a(re shows the ATO iput spectrum uder ubalaced coditios while Fig. 2b shows the error sigal spectrum, showig the harmoics at frequecies h*ω (h=2,4,6,8, ). Fig. 2a shows the ATO iput spectrum for balaced (blu, egative sequece compoet, i.e. harmoic -, is ot preset, ad ubalaced coditios (re, egative sequece compoet is preset, while Fig. 2b shows the error sigal spectrum for both balaced (blu ad ubalaced (re coditios, showig the harmoics at frequecies h*6*ω, the differeces beig readily observable. (3) Fig. - Block diagram of the proposed method. Phase extractio procedure A ATO with a filter i the loop stage is used to estimate the phase of fudametal compoet (positive sequec. For discussio purposes, it will be first assumed that the iput sigal, U αβ, (2), cosist of the fudametal compoet, ad two harmoics, oe beig a positive sequece compoet of order m ad the other a egative sequece compoet of order Fig. 2- Distributio of ATO harmoics i case of balaced ad ubalaced ATO iputs. Iput to the ATO ad error sigal (8), for the case of balaced ad ubalaced grid voltages. Magitude extractio procedure To estimate the fudametal voltage compoet magitude U, a scalar product is performed betwee the grid voltage, u αβ, ad the uit vector e j ˆ u, which phase is the estimated phase of the ATO (See Fig. ). A filterig stage is placed after the scalar product to provide a disturbace rejectio mechaism for the magitude estimatio.
3 u V e (2k ) k :: j( t ) j t A U ( t) e Re U ( t) cos t Im U ( t) si t U U cos ( m ) t U cos ( ) t m (5) (6) A A 2 3dB 3dB BW ta ; BW 2 N FSz NF z C i P k w f 2 s z c i z p k (2) (3) Fig. 3- Harmoics of the error sigal i the proposed magitude extractio block, for case of balaced ad ubalaced coditios. Similarly as discussed for the phase extractio procedure previously, if the iput complex voltage vector is balaced (2), the scalar product will be of the form show by (6). For the case of, the spectrum of A cosist of a DC compoet, whose amplitude is the grid fudametal voltage compoet (U ), ad a set of harmoic compoets located at h*6*ω (h=,2,3, ), the correspodig frequecy spectrum is show i Fig. 3. Coversely, if the iput complex vector of the magitude estimatio block is the same as a ubalacedfed oliear load defied i (5), the spectrum of A is composed by a DC compoet, which amplitude is the grid fudametal voltage compoet (U ), ad harmoic compoets located at h*2*ω (h=,2,3, ). III. FILTERING STAGE, TUNING PROCESS AND STABILITY CRITERIA To reject the disturbaces discussed i the previous sectio, a filterig stage cosistig o cascade otch filters is proposed (see Fig. 4), their desig, tuig ad digital implemetatio, as well as their stability aalysis, is preseted i this sectio. Filterig stage desig The trasfer fuctio of a geeric secod order aalog otch filter ca be expressed as (7), where sets the depth ad the width of the filter ad is the otch frequecy. Sice the proposed method is iteded to be implemeted i a DSP based system, the system desig ad stability aalysis will be performed i the discrete time domai. To guaratee precise trasformatio of the frequecies of iterest from the cotiuous domai to the discrete domai, Tusti discretizatio will be used (8), (9) beig obtaied by discretizatio of (7). NFs 2 z s T z s s 2 2 s 2 s 2 ; o (7) 2 z z 2cos NF z b 2b cos z 2b z 2 () fs 2 b (8) (9) () where ω is the otch frequecy (), ω stads for the rated grid frequecy, T s is the samplig time (f s is the samplig frequecy), BW is the otch filter badwidth ad A -3dB is the otch filter magitude at half squared magitude ( 2/2) (See Fig. 5). As already metioed, the frequecy spectrum of the PI regulator iput (4) ad amplitude errors (6) cosist of harmoic compoets at h*6*ω (h=,2,3, ) or h*2*ω (h=,2,3, ), depedig o whether the grid voltage is balaced of ubalaced. A filterig stage cosistig o a cascade of secod order otch filters, (3), is used to remove these harmoic compoets. The otch filter desig requiremets, [2], idicates that this trasfer fuctio must have C ceros located o the uit circle at the otch frequecies ( e ) to make zero gai at otch frequecies ad P poles adjacet to the zeros to assure uitary gai for the o-otch bad, with the poles located withi the uit circle [2]. The earer the poles are to the uit circle, the smaller will be the badwidth of the otch filter [2]. IN Notch Filter NF(s) Notch Filter NF2(s) 2 Notch Filter NF(s) OUT ω ff Fig. 4- Filterig stage block diagram Fig. 5- Digital otch filter desig The iteratioal stadards for grid-coected coverters, [6], limit the maximum total voltage harmoic distortio (THD) to 5%, each idividual harmoic magitude beig smaller tha 4% for harmoic orders lower tha th, 2% for the harmoic orders betwee th ad 7 th,.5% for the harmoic orders betwee 7 th ad 23 rd,.6% for harmoic orders betwee 23 rd ad 35 th ad.3% for orders higher tha 35 th. Sice each otch filter adds a additioal phase shift ito the estimated phase, oly harmoics whose order is lower tha th will be cosidered for the filterig process. The proposed filterig stage cosists of three otch filters, (9), located at ω 2 =, ω 4 =2 ad ω 6 =3Hz, that correspods to - st, 3 rd,- 3 rd, 5 th, th ad 7 th harmoics (see sectio 2). Other harmoic compoets could be take ito accout, the method beig recofigurable to reject them. It is also importat to ote that a lowpass filter could be placed iside the filterig stage i order to deal with white Gaussia oise comig from the sesors ad electroics. It is ot ecessary to iclude it iside the ATO sice the PI regulator acts as a lowpass filter, but it ca be placed iside the Gai(dB) BW ω rad/s A -3dB
4 magitude estimator. I this case, a 3Hz lowpass filter has bee used. If (9) is used for the selected otch frequecies usig a badwidth of 5rad/s, the zero-pole map show at Fig. 6 is obtaied. It is observed that all zeros are placed o the uit circle, the poles beig close to the zeros ad iside the uit circle, followig therefore the desig requiremets. Imagiary Real ϕ + - ε ϕ ϕ * FS Fig. 6- Filterig stage zero-pole map. Fig. 7- ATO liear model. PI ω * Tuig methodology ad stability aalysis This subsectio aalyzes the tuig methodology of the PI cotroller to guaratee the system stability ad adequate dyamic respose. The liearized model of the proposed ATO is show i Fig. 7, where the ATO error, ε ϕ (4), is proportioal to the sie of the differece betwee the estimated (ϕ * ) ad the * * real agle (ϕ); si( ) ca be safely assumed if the agle error is small eough. The ATO closed-loop trasfer fuctio ad the overall trasfer fuctio are give by (4) ad (5) respectively, G PI (s) beig the trasfer fuctio of the PI cotroller, (6), ad FS the trasfer fuctio of the filter stage. * (s) (s) FS(s) G PI (s) s FS(s) G PI (s) (4) * ( s) s FS( s) GPI ( s) (5) ( s) s FS( s) G ( s) PI Ki GPI ( s) K p (6) s Differet figures of merit were take ito cosideratio for the selectio of K p ad K i to guaratee stability ad adequate dyamic performace, icludig frequecy based (differece betwee phase margi, PhMar), ad time based (maximum overshoot, Over, ad settlig time, settim. A global performace idex, GPI, of the form show by (7) ca be defied, with the weights w phmar, w over ad w settim beig set accordig to the importace give to each oe o the tuig criteria. This is discussed later i this subsectio. GPI w phmar w over w settim (7) phmar over settim Ki Ki Kp Kp Kp Ki Kp Ki Fig. 8- Color maps as a fuctio of the cotroller gais showig the absolute value of the differece betwee the system Phase Margi ad the optimum value (7 deg),, overshoot i %,, settlig time i secods ad global performace idex (GPI) (7). Color maps were foud to be coveiet for visualizatio purposes. The optimum value for the phase margi was selected to be 7º [22], while for the overshoot ad time respose, the lower is their value, the better is the behavior of the system. Fig. 8a shows PhMar, which is defied to be PhMar= Phase margi7º, i.e. the absolute value of the differece betwee the actual ad the target phase margi, as a fuctio of K p ad K i. Figs. 8b ad 8c show the overshoot percet ad settlig time respectively, as a fuctio of K p ad K i. Fig. 8d shows the global performace idex (7). For the selected weights, w phmar, w over ad w settim, i (7), relatively large values would ormally be assiged to w phmar, sice stability is key, while smaller values would be used for w over ad w settim. w phmar =.9, w over =. ad w settim =. were used for the results show i this paper. Fig. 8d shows the GPI color map. It is observed from the figure that the color map has smooth trasitios, meaig that slight chages i the cotroller gais do ot have a sharp impact o the overall stability. The values of the gais providig the miimum i the color map i Fig. 8d are K p =5.77 ad K i =7.3. IV. SIMULATION ANALYSIS UNDER GRID DISTORTED CONDITIONS Simulatio results showig the validity of the theoretical aalysis are preseted i this sectio. Fig. 9 shows the proposed simulatio setup where a programmable AC source was used to produce six differet disturbaces i the grid voltage: ) grid frequecy chage, 2) grid voltage magitude chage, 3) grid ubalace, 4) harmoic coditios, 5) simultaeous chage of the grid frequecy ad magitude ad 6) simultaeous chage of the grid frequecy ad harmoic distortio. Programmable AC Source v abg v abμg i ab Load Filter Fig. 9- Block diagram of the proposed method. DSP For each disturbace, the performace of the proposed method is compared with two well kow, widely used sychroizatio methods: MCCF-PLL [2] ad CCCF-CPLL [4]. Although a large umber of sychroizatio methods could be foud i the literature, the MCCF-PLL ad the CCCF-CPLL methods have bee selected sice they are methods desiged to be used uder high polluted etworks [4]. The MCCF-PLL ad the CCCF-CPLL methods have bee cofigured to reject - st, th ad 7 th harmoics. The badwidth G 6 4 2
5 of the stop filters has bee set to 5rad/s for all methods, meawhile the bad-pass filter for the fudametal compoet has bee set to 6 rad/s i MCCF-PLL ad CCCF-CPLL. The lowpass filter of the proposed method has a badwidth of 3 Hz ( 9 rad/s). Sice the CCCF-CPLL method uses the same ATO tha the proposed method, the same tuig parameters have bee used for both methods. The same tuig methodology as describe i the previous sectio was followed for the MCCF- PLL, resultig i a PI regulator gais of K p =4.6 ad K i =8.37. Table I Grid parameter boudaries by ormative[23-25] Maximum value Clearace time (s) Frequecy deviatio 47 f Hz 53.2 Voltage deviatio.8 V pu.2.2 Ubalace factor 4% - Harmoic distortio 4% idividual harmoic - The applied disturbaces have bee selected with the aim to reach the limits of the differet grid codes [23-25] (see Table I, where the clearace time refers to the detectio ad discoectio time from the mai gri. Simulatio results are give per uit for visualizatio purposes, beig the rated grid voltage ad frequecy are 22V ad 5Hz respectively. Magitude, frequecy ad phase sigals are plotted sice they are used commoly for differet cotrol strategies like sychroizatio, magitude/frequecy restoratio, droop cotrol, power calculatio, etc Frequecy deviatios test Fig. a ad 9b show the frequecy ad magitude of the AC source voltage that icludes both ramp-like ad step-like frequecy deviatios, iteded to emulate the iertia of sychroous geerators ad/or the coectio of discoectio of big loads i weak grids or isladed drooped microgrids [26]. A frequecy ramp-like chage of 3 Hz i.2s ad a steplike chage of 6 Hz were performed (from the upper to the lower limit of Table I). Fig. c, 9d ad 9e show the estimated magitude, frequecy ad phase error respectively, the phase error beig calculated as the phase differece betwee the AC source fudametal voltage phase ad the estimated phase Fig. - Simulatio results for frequecy deviatios: target frequecy,, ad magitude,, magitude error,, frequecy error, ad phase error,. It is observed from Fig. c that the proposed method shows a good magitude trackig capability with zero steady state error. O the other had, the remaiig methods show a small (%) steady state magitude error, showig small trasiet magitude oscillatios whe the frequecy step chages are performed (t=2s ad t=3s). All the methods show similar frequecy trackig capabilities (see Fig., egligible steady-state frequecy errors are observed eve whe a 6Hz frequecy step is performed. The mai performace mismatch betwee methods is related to the phase delay produced by the filterig stage (see Fig.. The proposed method produces a phase delay of.7 deg (as MCCF-PLL metho meawhile the delay itroduced by the CCCF-PLL method is 8 deg. However these offsets ca be easily compesated by meas of the filters trasfer fuctios. Magitude deviatios test Table I shows the maximum allowed magitude deviatios for grid-coected systems. I the preset test, the frequecy remais costat (see Fig. as log as the magitude of the AC source chages from pu to.8pu i.2s, ramp-like, ad from.8 to.2pu, step-like chage, from the lower to the upper limit, t=2s, ad backwards, t=3s (see Fig.. While all of the tested methods respose uder ramp-like deviatios is adequate (magitude (Fig., frequecy (Fig. ad phase (Fig. errors are egligibl, whe a steplike chage is applied, small trasiet oscillatios appear i the tracked frequecies, magitudes ad phases. The proposed method shows zero steady-state magitude, frequecy ad phase errors. The frequecy oscillatios, whose peak magitude is. p.u, are damped after.25s. The same phase delays were obtaied as i subsectio IVa, where small oscillatios appear ito the phase error due to the frequecy oscillatios Fig. - Simulatio results for magitude deviatios: target frequecy,, ad magitude,, magitude error,, frequecy error, ad phase error,. Ubalace test Ubalaced coditios are caused maily by ubalaced loads operatio. E.g. most low-voltage loads ad some medium-voltage oes (e.g. electric tractio motors), are siglephase fed. This equipmet, whe coected to a three-phase
6 system, causes ubalaced load currets, which creates osymmetrical voltage dips i idividual phases causig voltage ubalaces. The voltage ubalace factor (VUF) is usually defied as the ratio betwee the egative sequece ad the positive sequece voltage compoets [27], the limits beig show i Table I (limited to 4%). Two voltage ubalace factor values were tested (see Fig. 2 i order to compare the performace of the proposed method, while the frequecy remais uchaged (see Fig. 2. A 4% lower-ormative ubalace factor was selected durig s<t<2s ad also a % upper-ormative ubalace factor was used i 2s<t<3s. The ubalace rejectio capability of all of the tested methods is high, both i magitude (Fig. 2, frequecy (Fig. 2 ad phase (Fig. 2. The proposed method shows the best global performace, exhibitig egligible steady-state errors (magitude, frequecy ad phas. The behavior uder steplike ubalace variatios is similar tha the magitude deviatios test, where small oscillatios were obtaied that are damped after.25s. vu Fig. 2- Simulatio results for ubalace coditios: target frequecy,, ad voltage ubalace factor,, magitude error,, frequecy error, ad phase error,. Harmoic coditios test Historically, electric machies were the mai sources of harmoics i power systems, however, the power electroic equipmet that is commoly used ow days, should be icluded as a source of harmoic distortio. Sectio III.a ad Table I describe the maximum harmoic distortio allowed for grid-coected equipmet. Fig. 3 shows the simulatio results of the proposed sceario, where a 5 th harmoic with a magitude modified from pu to.4pu at t=s, chaged to.pu at t=2s ad fially removed at t=3s is ijected by the AC source, meawhile the frequecy remais uchaged (Fig.2a ad. MCCF-PLL ad CCCF-PLL methods do ot reject completely the ijected harmoics ad oscillatios were foud both i magitude ad frequecy (Figs. 2c, that disappear i the estimated phase due to the lowpass effect of the itegrator (Fig. 3. The magitude error is close to.5pu for the MCCF-PLL ad CCCF-CPLL methods whe a.4 p.u. 5 th harmoic is ijected ad.pu whe the 5 th harmoic magitude chages to.pu. A similar behavior is observed for the frequecy estimatio (see Fig. 3. The proposed method shows the better performace; egligible steady state error i magitude, frequecy ad phase estimatios ad fast trasiet respose whe the steps commads are applied (t=, 2 ad 3s) Fig. 3- Simulatio results for harmoic coditios: target frequecy,, ad harmoic istat magitude (p.u.),, magitude error,, frequecy error, ad phase error, Simultaeous frequecy ad magitude deviatio test A simultaeous chage i magitude ad frequecy which ca be caused by the coectio ad discoectio of big loads i weak grids or isladed drooped microgrids is preseted i this sectio. Fig. 4a ad b show the frequecy ad magitude chages icludig ramp-like ad step-like patters. The proposed sychroizatio method shows a overall acceptable trackig capability, both i magitude, frequecy ad phase. I magitude ad frequecy terms, it does ot show steady state error (MCCF-PLL ad CCCF-CPLL show a small magitude error) ad it exhibit.7deg. of phase delay i the estimated phase
7 Fig. 4- Simulatio results cotaiig simultaeous frequecy ad magitude deviatios: target frequecy,, ad magitude,, magitude error,, frequecy error, ad phase error,. f) Simultaeous frequecy deviatios ad harmoic coditios test This test shows a combiatio of tests ad where frequecy deviatios (Fig. 5 ad a 5 th harmoic, whose magitude follows Fig. 5b, is geerated by the AC source. This test is ru to cofirm the harmoic rejectio capability uder frequecy deviatios. It is observed from Fig. 5c ad d that the proposed method estimates the magitude ad frequecy with egligible steady-state error, while the same phase delays as i the previous test are obtaied (see Fig. 5. It is oted from Fig. 5c, d ad e, that the obtaied results both for the proposed method, CCCF-PLL ad MCCF-PLL methods follows a mixture betwee tests a (Fig. ) ad d (Fig. 3) Fig. 5- Simulatio results cotaiig simultaeous frequecy deviatios ad harmoic coditios: target frequecy, 5 th harmoic istat magitude (p.u.), magitude error (p.u.) frequecy error (p.u.), phase error (deg). V. EXPERIMENTAL RESULTS I this sectio the experimetal results testig the performace the sychroizatio methods are preseted. The experimetal setup is show i Fig. 6, where LCL filters, with a resoace frequecy of 575Hz are used. The master iverter was programmed to produce the same disturbaces discussed i the previous sectio whereas TMS32F28335 DSP has bee used for the implemetatio of the algorithms, usig a samplig ad switchig frequecy of khz. As simulatio results, Tusti trasformatio was used for the discretizatio of the cotiuous trasfer fuctios. The differet methods have bee tued to the values obtaied through the optimizatio method described i the Sectio II. It is also importat to ote that the executio time of the proposed method is µs meawhile the CCCF-CPLL uses 2.8 µs ad the MCCF-PLL method cosumes 3.8 µs where the proposed method is cofigured to reject - st, 3 rd,-3 rd, 5 th, - 5 th ad 7 th harmoics (Sectio III) meawhile the CCCF-CPLL ad the MCCF-PLL oly rejects - st, 5 th ad 7 th harmoics. This deotes the simplicity of the otched filterig o the loop stage desiged. Fig. 6 Experimetal Setup Frequecy deviatios test Fig. 7 shows the experimetal results uder frequecy deviatios implemeted ito the master iverter output voltage. Ramp-like (t=, 4s) ad step-like (t=2, 3s) deviatios have bee used. As simulatio results, the proposed method shows a excellet magitude ad frequecy trackig capability, where egligible steady-state error is observed (excludig white Gaussia ois both i the magitude (Fig. 7 ad frequecy (Fig. 7 error sigals. It is worth to metio that some spikes are preset ito the frequecy error whe a 6Hz (.2 p.u.) step-like frequecy variatio is produced that caot be cosidered sice this type of deviatio is less likely to occur i practice due to the large iertia of the geerators. Talkig ito phase error terms (Fig. 7, the same phase delays are obtaied as simulatio results, where the phase error cotais less Gaussia oise tha the frequecy error due to the lowpass behavior of the phase itegrator. Small phase deviatios appear whe a.2 p.u. step-like frequecy commad is applied that are rectified after 5ms DSP Master Iverter vab g vab ug Slave Iverter Fig. 7- Experimetal results for frequecy deviatios: target frequecy,, ad magitude,, magitude error,, frequecy error, ad phase error,. Magitude deviatios test Fig. 8 shows the magitude deviatio experimetal results whe the master iverter output voltage follows Fig. 8b. The proposed method exhibits good magitude trackig capability (mea of the magitude error is close to zero) ad it also shows better Gaussia oise cacellatio tha the remaiig methods. This differece is more oticeable ito the frequecy error (Fig.7, where the Gaussia oise is higher for the MCCF-PLL ad the CCCF-CPLL methods. Some spikes are i ug DSP
8 obtaied whe a step-like deviatio is performed that ot affect i a great degree the behavior of the slave iverter because of its voltage ad curret cotrol loops. As Fig.7e shows, all of the tested methods exhibit udistorted steady-state phase ad small phase deviatios are preset whe a step-like magitude chage is performed Fig. 8- Experimetal results for magitude deviatios: target frequecy,, ad magitude,, magitude error,, frequecy error, ad phase error,. Ubalace test A egative sequece compoet whose magitude follows Fig. 9b has bee ijected ito the master iverter output voltage. The proposed method shows good rejectio to the double-fudametal-frequecy harmoic created by the ubalace, eve whe a. p.u. egative sequece is preset (2<t<3s), both i magitude (Fig. 9, frequecy (Fig. 9 ad phase (Fig. 9. The remaiig methods show a similar good performace dealig with ubalaces, as predicted i simulatio results Fig. 9- Experimetal results for ubalace coditios: target frequecy,, ad ubalace factor,, magitude error,, frequecy error, ad phase error,. Harmoic coditios test This sectio cotais the experimetal results whe a 5 th harmoic, whose magitude follows Fig. 2b, was ijected ito the master iverter output voltage. MCCF-PLL ad CCCF-CPLL shows equivalet magitude ad frequecy harmoic rejectio capability meawhile the proposed method exhibits better harmoic cacellatio as Figs. 8c ad 8d show. Fig. 9e shows the phase error for all methods uder harmoic distortio. It is importat to ote that the phase delays obtaied match with the simulatio oes, where small spikes appear ito the phase error whe the magitude of the harmoics chage sharply Fig. 2- Experimetal results for harmoic coditios: target frequecy,, ad harmoic istat magitude (p.u.),, magitude error,, frequecy error, ad phase error, Simultaeous frequecy ad magitude deviatio test I this test a simultaeous chage both i frequecy (Fig. 2 ad magitude (Fig. 2 is applied. All of the tested methods show a small magitude error whe a simultaeous ramp-like chage (t=, 2s) occurs both i frequecy ad magitude that is slightly smaller for the proposed method. The frequecy ad agle trackig is good, showig some spikes whe ramp-like deviatios are performed that cofirm simulatio results
9 Fig. 2- Experimetal results cotaiig simultaeous frequecy ad magitude deviatios: target frequecy,, ad magitude,, magitude error,, frequecy error, ad phase error,. f) Simultaeous frequecy deviatios ad harmoic coditios test This test aims to verify simultaeously the frequecyadaptive ad harmoic rejectio capabilities. The frequecy of the master iverter output voltage follows Fig. 22a meawhile the magitude of the ijected 5 th harmoic is chaged usig Fig. 22b. As Fig. 22 shows, there are ot substatial differeces betwee the magitude (Fig. 22, frequecy (Fig. 22 ad phase (Fig. 22 errors preset i this test from the errors obtaied i subsectio V.d (Fig. 2): harmoic coditios test that proves the excellet frequecy trackig capability of the tested methods. The proposed method shows the same performace workig at differet frequecies Fig. 22- Experimetal results cotaiig simultaeous frequecy deviatios ad harmoic coditios: target frequecy, 5 th harmoic istat magitude (p.u.), magitude error (p.u.) frequecy error (p.u.), phase error (deg). VI. CONCLUSIONS A sychroizatio method for isladed ad grid coected power coverters is preseted i this paper. The method is based o a otch-filter i the loop stage to elimiate disturbaces ad a complex PLL to extract the frequecy/phase of the fudametal voltage compoet. A magitude extractio block based o the scalar product to obtai the positive sequece amplitude of the grid voltage has bee proposed. The desig of the filterig stage, the tuig of the cotroller ad the stability of the whole method has bee discussed. Simulatio ad experimetal results comparig the proposed method with existig sychroizatio methods have bee preseted, usig six differet disturbaces. It is cocluded from the simulatio ad experimetal results that the proposed method shows a excellet overall performace accomplishig with iteratioal detectio stadards, showig better performace tha the existig methods i terms of disturbace rejectio, time cosumptio ad simplicity. REFERENCES [] S. Kahrobaee, R. A. Rajabzadeh, L.-K. Soh, y S. Asgarpoor, «A Multiaget Modelig ad Ivestigatio of Smart Homes With Power Geeratio, Storage, ad Tradig Features», IEEE Tras. o Smart Grid, vol. PP, o. 99, p., 22. [2] R. Lasseter, MicroGrids, IEEE-PES 2, pp , New York, Ja. 27-3, 22 [3] Z. J. Hog, W. YaTig, W. ZhogJu, Z. Shouzhe, W. Xiaoyu, y S. Xiwei, «Study o microgrid operatio modes switchig based o eigevalue aalysis», APAP, vol., pp , 2. [4] K. T. Ta, X. Y. Peg, P. L. So, Y. C. Chu, y M. Z. Q. Che, «Cetralized Cotrol for Parallel Operatio of Distributed Geeratio Iverters i Microgrids», IEEE Tras. o Smart Grid, vol. PP, º. 99, pp., 22. [5] J. T. Saraiva y M. H. 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