THE CURRENT trend of wireless communication systems

Transcription

1 570 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II: EXPRESS BRIEFS, VOL. 56, NO. 7, JULY 009 Power-Aware Multibad Multistadard CMOS Receiver System-Level Budgetig Mohamed El-Nozahi, Studet Member, IEEE, Edgar Sáchez-Siecio, Fellow, IEEE, ad Kamra Etesari, Member, IEEE Abstract A systematic system-level desig methodology for multibad multistadard MB MS) widebad/recofigurable CMOS receivers is preseted. The methodology determies the specificatios oise figure NF) ad liearity) for each buildig block to miimize the overall power cosumptio. System-level simulatios show that the gai variatio of the LNA for various bads/stadards is a importat factor i miimizig the power cosumptio for ay MB MS receiver. Aalytical expressios for the optimum gai variatio of the LNA, NF, ad iput-referred third-order itercept poit of each buildig block are preseted. The desig methodology is applied to a widebad receiver coverig global systems for mobile commuicatios GSM) 900- ad 900-MHz bads, global positioig systems GPS), ad widebad code-divisio multiple-access WCDMA) stadards. As a example, the estimated power cosumptio is reduced by 40% whe compared with the approach where the gai of the LNA is costat. Idex Terms Multibad multistadard MB MS) CMOS receiver, power cosumptio, system-level budgetig. I. INTRODUCTION THE CURRENT tred of wireless commuicatio systems ad circuits has drive the idustry to develop multibad multistadard MB MS) mobile uits. With cellular phoes operatig from 800 MHz to.9 GHz, the global positioig system GPS) at. ad.5 GHz, ad the wireless local area etwork at.4, 5., ad 5.8 GHz, it has bee desirable to combie more tha oe bad/stadard i the same mobile uit to reduce complexity ad power cosumptio [], []. High-performace MB MS mobile uit implemetatio faces may challeges, icludig the required higher level of itegratio, lower power cosumptio, ad efficiet frequecy plaig. All these challeges have bee the mai focus of may proposed MB MS receiver architectures [], []. I additio, poor system-level desig ca result i cosiderable waste of power ad chip area. Usually, system-level desig ca be divided ito three mai steps: ) overall system-level specificatio estimatio; ) frequecy plaig; ad 3) blocklevel budgetig. The third step requires several maual iteratios to fid the optimum set of specificatios icludig the iput-referred oise ad oliearity) for each buildig block. However, it is ot guarateed that the fial set of specificatios for each block miimizes power cosumptio. Block-level bud- Mauscript received December 6, 008; revised February 6, 009 ad April 5, 009. First published Jue 6, 009; curret versio published July 7, 009. This paper was recommeded by Associate Editor A. S. Y. Poo. The authors are with the Departmet of Electrical ad Computer Egieerig, Texas A&M Uiversity, College Statio, TX USA melozahi@ieee.org; sachez@ece.tamu.edu; ketesar@ece.tamu.edu). Digital Object Idetifier 0.09/TCSII Fig.. MB MS direct coversio receiver. The bads are propagatig at differet same) frequecies before after) the RF mixer. getig methodologies for sigle-bad sigle-stadard SB SS) ad dual-bad sigle-stadard DB SS) receivers have bee proposed to miimize power cosumptio i [3] ad [5], respectively. However, to our kowledge, a methodology that ca be applied to a geeral MB MS receiver has ot bee proposed. This brief presets a geeralized methodology for systemlevel budgetig of MB MS receivers to miimize power cosumptio. A recofigurable or widebad LNA is employed to cover differet frequecy bads, whereas mixer ad basebad sectios are shared for differet bads ad stadards Fig. ) as i curret MB MS systems. Havig several parallel) LNAs will give additioal flexibility to optimize the receiver chai. However, the same receiver chai sigle widebad/recofigurable LNA) is cosidered because the curret tred goes for a higher level of itegratio by reusig various receiver buildig blocks [], []. It is importat to ote that the gai, oise figure NF), ad iput-referred third-order itercept poit IIP3) of the mixer ad basebad blocks are the same for all bads because RF sigals are dow coverted to the same spectrum. This brief is orgaized as follows: Sectio II presets basic facts ad assumptios required for the desig methodology. Sectio III describes the desig methodology to miimize the power cosumptio of a CMOS MB MS receiver. Sectio IV demostrates the simulatio results. II. BASIC FACTS AND ASSUMPTIONS A. Fact : The Dyamic Rage of Ay CMOS Circuit is Proportioal to Power Cosumptio The dyamic rage of a CMOS circuit, i.e., DR, is the ratio of the IIP3 VIIP3 to the iput-referred oise V i. For a sigle MOS trasistor, DR is give by [3] DR MOS V IIP3 4 Vi 3kTγθ I ) where k is the Boltzma s costat, T is the temperature i kelvis), γ is the oise factor, θ is the mobility degradatio /$ IEEE Authorized licesed use limited to: Texas A M Uiversity. Dowloaded o September 5, 009 at :3 from IEEE Xplore. Restrictios apply.

2 EL-NOZAHI et al.: POWER-AWARE MB MS CMOS RECEIVER SYSTEM-LEVEL BUDGETING 57 parameter, ad I is the dc curret of the trasistor. The supply voltage did ot appear i the DR because the iput sigal is assumed to be small, ad hece, the liearity of the device determies VIIP3. For a iductively degeerated commosource LNA ad the Gilbert cell mixer, the dyamic rage is foud to be [3], [4] DR LNA 4 3kTγθ I P DR MOS ) P c,lna DR Mixer 8 3π ktγθ I P P c,mixer π DR MOS 3) where P is the circuit power cosumptio, ad P c is the power coefficiet. Equatio ) is obtaied by cosiderig the NF ad IIP3 depedece o the quality factor Q of the iput matchig etwork [4]. If Q decreases, the iput-referred oise ad IIP3 icrease by the same ratio /Q. Hece, DR is idepedet of Q. Other circuit architectures such as the widebad LNA have differet power coefficiets, but their DR still depeds o power cosumptio [3]. I geeral, circuits with higher power coefficiets are more power hugry. B. Fact : Overall System-Level Specificatios Deped o Specificatios of Each Block For a cascaded homody or heterody receiver, overall system-level specificatios NF ov, ) are give by [5] NF ov )kt 50 Vi,i + Vi,i, i A j i VIIP3,i + A j VIIP3,i, 4) i where the subscript i is the block umber, is the total umber of blocks, the subscript ov stads for the overall system performace, ad A i is the gai of the ith block. C. Fact 3: Block-Level Budgetig Depeds o Power Coefficiets For a SB SS CMOS receiver, Sheg et al. [3] proved that miimum power cosumptio is achieved whe Vi,i ad IIP3,i are calculated from NF ov )kt 50 P c,i, if i Vi,i NF ov )kt 50 P c,i IIP3,i Pc,i A j, if i> 5) Pc,i, if i A j, if i>. 6) Equatios 5) ad 6) show that blocks with higher P c have relaxed specificatios to reduce the overall power cosumptio. I additio, these equatios do ot provide sufficiet iformatio about the gai of each block. For a SB SS receiver, the gai is cosidered as a degree of freedom [3] ad does ot affect the overall power cosumptio. Power cosumptio is maily determied by the NF ad liearity of the block. The gai ca be adjusted by chagig the load resistace. For MB MS receivers, the gai is a importat parameter, as will be show later i this brief. D. Fact 4: Miimum Power Cosumptio is Depedet o Power Coefficiets ad the Overall Dyamic Rage The miimum power cosumptio of the SB SS receiver is foud usig 5) ad 6) ad is give by P ov,mi P c,j DR j ) NF ov )kt 50 Equatio 7) poits out that P ov,mi depeds o the overall DR of the receiver ad o the P c s of differet buildig blocks. The overall power cosumptio of DB SS receivers is greatly depedet o the gai variatio of the LNA i two differet bads [5]. I this brief, it is prove that there is a optimum gai variatio of the LNA at differet bads/stadards to achieve the miimum power cosumptio i MB MS receivers. E. Assumptio: Various Stadards Share the Same Mixer ad Basebad Blocks This assumptio results i a higher level of itegratio for MB MS CMOS receivers []. The basebad filter ca be programmable to cover various stadards. A sigle widebad or recofigurable LNA is cosidered for differet stadards, which are at differet frequecy bads. The LNA should have a programmable gai for miimum power cosumptio. III. OPTIMUM BLOCK-LEVEL BUDGETING Block-level budgetig of a MB MS CMOS receiver ca be divided ito three cases. A. Case : Multiple Bads, Sigle Stadard MB SS) I this case, the same stadard covers several frequecy bads, as i the global system for mobile commuicatios GSM) 900- ad 900-MHz bads. Three possible system-level desig approaches ca be applied. The first approach uses parallel receiver chais for differet frequecy bads, where each chai is idividually optimized for miimum power cosumptio, as defied i 5) ad 6). Parallel chais icrease the area ad the cost of the CMOS receiver, but it results i miimal possible power cosumptio. The secod approach is to assume that the same receiver chai is used for all bads ad that the LNA has a costat gai over the etire bad. I this case, the worst NF ov ad amog the several stadards should be cosidered, leadig to a DR ov value higher tha the required DR ov for each bad. The third approach that is cosidered i this brief assumes that the same receiver chai is used ad that the gai of the LNA is variable with the frequecy bad. For a multibad sigle-stadard MB SS) receiver, the frequecy depedece of NF ov ad must be cosidered durig block-level budgetig for miimum power cosumptio. Authorized licesed use limited to: Texas A M Uiversity. Dowloaded o September 5, 009 at :3 from IEEE Xplore. Restrictios apply.

3 57 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II: EXPRESS BRIEFS, VOL. 56, NO. 7, JULY 009 Therefore, 7) is modified to iclude frequecy depedece, as follows: P ov ω) NF ov ω) ) kt ) where ω is the operatig frequecy. Commoly, NF ov ad chage as the operatig frequecy chages i CMOS receivers. For the receiver chai i Fig., this chage is due to the depedece of NF ad VIIP3 of the LNA to the operatig frequecy. As a result, NF ov ad should be examied for several bads i MB SS receivers. For example, if bad has a lower frequecy tha bad, ad if NF ov icreases with frequecy, the the NF ov of bad should be adjusted to a value lower tha the value specified by the stadard. Hece, DR ov at bad should be higher tha the value specified by the stadard. This frequecy depedece usually leads to higher power cosumptio. A similar coclusio is obtaied if the frequecy depedece is cosidered. It is importat to miimize DR ov for a give stadard, as follows: DR ov,mi ω k ),mi NF ov,max )kt 50 where,mi ad NF ov,max are specified by the stadard, ad the subscript k stads for the kth frequecy bad. To keep P ov miimum over multiple frequecy bads, DR ov should be miimized across these bads, i.e., NF ov ω ) NF ov ω k ) NF ov ω N )NF ov,max, ad ω ) ω k) ω N ),mi. N is the umber of frequecy bads. Keepig both NF ov ad the same across differet frequecy bads is ot trivial because NF ov is related to the frequecy-depedet NF of the LNA, whereas is depedet o the basebad buildig block of the receiver chai. Therefore, the receiver has differet DR ov values at differet frequecies. I such a case, either NF ov or should be kept costat over differet frequecy bads to miimize DR ov, ad hece power cosumptio, as show by Fact 4. Assumig NF ov is the same for various bads, the followig coditio holds usig 4): i,: i,: Vi,LNA ω )+ A LNA ω ) V i,lna ω k)+ A LNA ω k) 9) 0) where the subscript : idicates the effective iput-referred oise of the CMOS receiver chai, excludig the LNA. As depicted i 0), the gai of the LNA ca be adjusted to satisfy the required coditio. By solvig 0) usig 5) ad 6), oe ca prove that there is a optimum gai variatio of the LNA at differet frequecy bads to provide the same NF ov,as follows: A k A NF,ov + ). ) P c,lna i,lna ω k) i,lna ω ) j To calculate the ecessary gai ratio, the NF variatio of the LNA versus frequecy is also required. For the same NF ov over Fig.. NF ov,,addrov for a dual-bad system bad : 900 MHz; bad : 900 MHz, A 6dB, NF ov < 4 db, > dbm). differet frequecy bads, the ω )/ ω k) ratio is give by V ω IIP3,LNA ω ) ) IIP3,LNA ω k) + ) j A k A NFov ω k) P c,j /. ) P c,lna Similarly, if is kept costat over differet bads istead of NF ov, the gai variatio of the LNA ad the NF ov ω )/NF ov ω k ) ratio are give by ) A k A NF ov ω ) NF ov ω k ) 3 + V IIP3,LNA ω ) j P c,j VIIP3,LNA ω k) 3) P c,j / P c,lna i,lna ω k) +. j V A i,lna ω ) A k 4) To check the validity of the aforemetioed desig methodology, the required overall system-level specificatios for differet frequecy bads are simulated versus differet gai ratios of the LNA usig MATLAB. For each simulatio poit, the receiver chai is optimized for miimum power cosumptio usig 5) ad 6). I additio, the NF ov ad at each frequecy bad are maually adjusted to cosider the frequecydepedet NF LNA ad VIIP3,LNA. The simulatio results for 900- ad 900-MHz frequecy bads are preseted i Fig.. The simulated respose ca be divided ito three regios: I regio, ω ) ad NF ov ω ) are set to dbm ad 4 db, respectively. These values are specified by the stadard. As the gai ratio icreases, NF ov ω ) icreases, ad ω ) decreases util oe of the two parameter reaches the boudary of regio. I this example, ω ) determies the startig poit of this regio. By icreasig the gai ratio, ω ) reduces to a value lower tha the value MATLAB v.7.0, MathWorks, Ic. Authorized licesed use limited to: Texas A M Uiversity. Dowloaded o September 5, 009 at :3 from IEEE Xplore. Restrictios apply.

4 EL-NOZAHI et al.: POWER-AWARE MB MS CMOS RECEIVER SYSTEM-LEVEL BUDGETING 573 specified by the stadard. For this reaso, ω ) is set to dbm, ad hece, ω ) icreases with the gai ratio. NF ov ω ) reaches its maximum allowable value at the begiig of regio 3, ad therefore, NF ov ω ) eeds to be reduced if the gai ratio icreases beyod this poit. This example shows that DR ov has two turig poits, as defied by ) ad 3). DR ov reaches its miimum value o oe of these two poits. For this example, miimum DR ov is obtaied whe is the same for both bads. Comparig the optimum desig poit, which requires two gai settigs, with the case of a costat gai A k /A 0dB), the optimum desig approach reduces DR ov by 0.5 db, which is equivalet to reducig P ov by %. This simulatio example idicates that the gai variatio of the LNA is a importat parameter to miimize P ov ad that a LNA with two gai settigs achieves the required target with a gai differece of db. For the geeral case of MB SS receivers, the required DR ov for each frequecy bad, i.e., ω k, is calculated usig the same methodology with respect to the lowest frequecy bad ω.the required gai ratio, i.e., A k /A, for differet frequecy bads is calculated from ) 4). The, the required NF ov ω ) ad ω ) are determied from the followig relatios: ω ) max ω ) ω,...,ω ) ) ωn NF ov ω ) mi NF ov ω ) ω,...,nf ov ω ) ) ωn 5) where ω ) ωk ad NF ov ω ) ωk are the required overall IIP3 ad NF of bad k trasferred to bad. Fially, block-level budgetig is optimized for miimum P ov usig 5) ad 6). B. Case : Sigle Bad, Multiple Stadards SB MS) The secod case assumes that the receiver has the same frequecy bad for several stadards such as Bluetooth, WiFi, ad Zigbee at.4 GHz. Similar to Case, three possible system-level desig approaches ca be applied to miimize power cosumptio. The first approach uses parallel receiver chais for differet stadards, where each chai is idividually optimized for miimum power cosumptio, as defied i 5) ad 6). This approach results i miimal possible power cosumptio; however, it icreases the area ad the cost of the CMOS receiver. The secod approach is to assume that the same receiver chai with a costat gai LNA is used. I this case, the worst NF ov ad amog the several stadards should be cosidered, leadig to a DR ov value higher tha the required DR ov for each stadard. The third approach that is cosidered i this brief assumes that the gai of the LNA is variable with the stadard usig the same receiver chai. Cosider a SB MS receiver where NF ov,s ad NF ov,s are 3 ad 4 db, ad,s ad,s are 8 ad dbm, respectively. The subscript s stads for the stadard. Usig the secod approach, the receiver has to be optimized for the worst NF ov ad values of 3 ad dbm, respectively. For the third approach, the receiver is optimized for NF ov ad of 4 db ad dbm, respectively. These values are for the stadard with maximum DR ov. The overall specificatio of the other stadard is satisfied by lowerig the gai of the LNA by 6.5 db for s whe compared with s. As a result, NF ov,s ad are.8 db ad 8 dbm, respectively. The third approach reduces DR ov ad P ov by.8 db 33%) whe compared with the secod approach. Hece, block-level budgetig for a SB MS receiver is performed by fidig the required DR ov for all the stadard ad selectig DR ov,ssmax, i.e.,,s DR ov,ssmax maxdr ov,s, DR ov,sh, DR ov,ss ) 6) where S is the total umber of stadards, h is the idex for the hth stadard, ad s max is the stadard with maximum DR ov. The block-level specificatios are the optimized for the stadard with maximum DR NF ov,ssmax ad,ss max ) usig 5) ad 6). Because the receiver is desiged for DR ov,ssmax, ay other stadard is satisfied by chagig the gai of the LNA. If NF ov,sh is lower tha NF ov,ssmax, the the gai has to be icreased. Usig 4), the gai ratio of the LNA for the stadard h to s max is give by A h A s max NFov NF ov,sh NF ov,ssmax j. 7) O the other had, if,sh is higher tha,ss max, the the gai of the LNA has to be decreased. I this case, the gai ratio is A h A s max,ssmax,sh j. 8) C. Case 3: Multiple Bads, Multiple Stadards MB MS) This case is cosidered a superpositio of the two previously discussed cases with S stadards occupyig N frequecy bads. Block-level budgetig for the MB MS case is obtaied i three steps: ) mappig specificatios for all stadards ito the lowest bad; ) maximum dyamic rage estimatio/blocklevel budgetig cosiderig all stadards i the lowest bad; ad 3) mappig all the stadards back to their origial frequecy bad. The first step maps all the stadards occupyig differet bads to the lowest frequecy bad usig ) 4). This step coverts the MB MS case to a SB MS case ad allows the desiger to make a accurate compariso amog the required DR ov s of differet stadards, sice all of them are i the same bad. The frequecy-depedet gai variatios for the LNA, i.e., A k /A, are also kow from step. The secod step solves a SB MS problem usig 6) 8). Maximum DR ov is iitially determied, ad the, block-level budgetig for DR ov,ssmax is performed. Fidig the stadarddepedet gai variatios for the LNA, i.e., A h /A smax,isalso a part of this step. The fial step maps back stadards to their origial operatig bads by adjustig the frequecy-depedet gai variatios of the LNA. The total gai variatio for differet stadards is fially foud from A t h,k A A h A A k s max A 9) where A th,k is the total gai of the hth stadard at the kth bad. Authorized licesed use limited to: Texas A M Uiversity. Dowloaded o September 5, 009 at :3 from IEEE Xplore. Restrictios apply.

5 574 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II: EXPRESS BRIEFS, VOL. 56, NO. 7, JULY 009 TABLE I BLOCK-LEVEL SPECIFICATIONS FOR MB MS CMOS RECEIVER [NF AND GAIN IN db), v IN V/ Hz), AND IIP3 IN dbm)] Fig. 3. Number of samples versus the ormalized power P ov/p mi ) for differet block-level specificatios of the multimode receiver. IV. CASE STUDY AND VERIFICATION The described system-level desig methodology for MB MS receivers is ivestigated for a multimode CMOS receiver architecture show i Fig.. I this desig example, GSM bads at 900 ad 900 MHz, the GPS L bad at.575 GHz, ad widebad code-divisio multiple access WCDMA) at. GHz are cosidered. The targeted specificatios for each stadard are as follows: GSM-900/GSM-900 NF 4 db, IIP3 dbm, Gai 04 db), GPS NF 3dB, IIP3 5 dbm, Gai 75 db), ad WCDMA NF 7.9 db, IIP3 8 dbm, Gai 70dB). Such a receiver ca be foud i [6]. NF LNA ad VIIP3,LNA are assumed to vary with the square root of the frequecy. P c s of buildig blocks ca be obtaied from typical values of their NF, IIP3, ad power cosumptio. These values are show i Table I. The results of the desig methodology are tabulated i Table I. The NF ad IIP3 of the LNA, mixer, ad basebad blocks are maily determied from the GSM stadard at 900 MHz, because it has the maximum dyamic rage whe compared with other stadards whe they are all mapped to the lowest frequecy bad. NF ov ω ) ω is 3.8 db i this case. NF LNA ad VIIP3,LNA chage for differet frequecy bads due to their frequecy depedece. For the mixer ad basebad blocks, performace parameters are similar for all stadards. The of GPS ad WCDMA are higher tha those specified by the stadard because the liearity of the receiver is limited by the GSM bad. Icreasig the gai ratio for these two stadards results i better NF ov ad lower. For example, for the WCDMA case, the gai of the LNA ca be icreased up to 3.5 db, where reaches 8 dbm. This shows that the gai for WCDMA ca be adjusted betwee 0.5 ad 3.5 db without chagig P ov. I summary, a LNA with four gai settigs, as defied i Table I, miimizes P ov. To check the validity of the preseted desig methodology, the desig space of the complete receiver is explored with two billio samples usig MATLAB. Each sample cotais the NF, VIIP3, ad gai of each buildig block. Oly 40 millio samples met all stadards. Fig. 3 shows the umber of samples versus the estimated P ov ormalized to the obtaied power cosumptio usig the proposed system-level desig methodology. The power cosumptio for all desig poits are calculated from P c,i DR i. Noe of samples resulted i P ov lower tha the value obtaied usig the proposed methodology. I additio, as the ratio P ov /P mi is miimized, the umber of samples is expoetially decreased, which shows the difficulty to fid the optimum desig poit usig maual approaches. The proposed methodology is compared with the case where a fixed-gai widebad LNA is used, as i [7]. I additio, the compariso with the case of the LNA with a costat gai is just to clarify the importace of havig a LNA with differet gai settigs for the various bads ad stadards to miimize power cosumptio. The result is summarized i Table I. For the fixed-gai LNA case, miimum NF ov ad values of.8 db ad dbm at 900 MHz are obtaied, respectively. The resulted DR ov is higher by. db whe compared with the optimum case, resultig i higher power cosumptio. Usig P c,i DR i to compute the estimated power cosumptio i each case, the preseted desig methodology shows a reductio i power cosumptio by 40% whe compared with the case of the widebad LNA with a fixed gai. V. C ONCLUSION A MB MS receiver has bee cosidered as a superpositio of MB SS ad SB MS receivers. Aalytical expressios for NF ad VIIP3 of each buildig block have bee provided to miimize the overall power cosumptio. The gai variatio of the LNA for differet stadards/bads is a importat factor that determies power cosumptio. The methodology has bee tested for a widebad receiver coverig GSM-900, GSM-900, GPS, ad WCDMA stadards. As a example, power cosumptio is reduced by 40% whe compared with the approach where the gai of the LNA is kept costat. REFERENCES [] S. Wu ad B. Razavi, A 900 MHz/.8 GHz CMOS receiver for dual-bad applicatios, IEEE J. Solid-State Circuits, vol. 33, o., pp , Dec [] M. Zargari, M. Terrovitis, S. H.-M. Je, B. J. Kaczyski, L. MeeLa, M. P. Mack, S. S. Mehta, S. Medis, K. Oodera, H. Samavati, W. W. Si, K. Sigh, A. Tabatabaei, D. Weber, D. K. Su, ad B. A Wooley, A siglechip dual-bad tri-mode CMOS trasceiver for IEEE 80.a/b/g wireless LAN, IEEE J. Solid-State Circuits, vol. 39, o., pp , Dec [3] W. Sheg, A. Emira, ad E. Sáchez-Siecio, CMOS RF receiver system desig: A systematic approach, IEEE Tras. Circuits Syst. I, Reg. Papers, vol. 53, o. 5, pp , May 006. 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Restrictios apply.