EE 435. Lecture 24. Offset Voltages Common Mode Feedback Circuits

Transcription

1 EE 435 Lecture 24 Offset Voltages Common Mode Feedback Circuits

2 Review from last lecture Offset Voltage Two types of offset voltage: Systematic Offset Voltage Random Offset Voltage V OUT V ICQ fter fabrication it is impossible (difficult) to distinguish between the systematic offset and the random offset in any individual op amp Measurements of offset voltages for a large number of devices will provide mechanism for identifying systematic offset and statistical characteristics of the random offset voltage

3 Review from last lecture Gradient and Local Random Effect 100µm 0.01µm Local Random Effects : Vary Locally With No Correlation Gradient Effects : Locally ppear Linear Magnitude and Direction of Gradients are random Highly Correlated over Short Distances Both Contribute to Offset Both are random variables If Not Managed, Both Can Cause Large Offsets Strategies for minimizing their effects are different Will refer to the local random effects as random and the random gradient effects as gradient effects

4 Review from last lecture Offset Voltage Distribution Gaussian (Normal) pdf number Offset Voltage Bins Typical histogram of offset voltage (binned) after fabrication Mean is nearly 0 (actually the systematic offset voltage)

5 Review from last lecture Source of Random Offset Voltages The random offset voltage is almost entirely that of the input stage in most op amps V X M 3 M 4 V X M 3 M 4 V OUT V OUT V 1 M 1 M 2 V S V 2 V 1 M 1 M 2 V 2 V S I T I T (a) (b)

6 Review from last lecture Random Offset Voltages From a straightforward but tedious analysis it follows that: μ μ COX + 2 VTO n μ W L W L W L W L p L n 2 V EB n σ VOS 2 VTO p W nl n μ n W nl 4 p L w W n L n W p L p L n W n L p W p 2 2 n p n n p p n n p p where the terms VT0, μ, COX, L, and W are process parameters 21mV μ (n-ch) VT0 ; 25mV μ (p-ch) 2 2 μ+ C OX.016μ (n-ch) ;.023μ (p-ch) V X M 3 M 4 V OUT L=W ; 0.017μ 2 2 VTO n μ p L n 2 VOS W 2 VTO p n L n μ n W n L p σ Usually the VT0 terms are dominant, thus the variance simplifies to V 1 M 1 M 2 V S I T V 2

7 Review from last lecture Correspondingly: 2 V OS 2 2 Wn L VTOn n p n Random Offset Voltages L n 2 n p W L 2 VTOp V 2 EBn 4 1 Wn L 2 n 2 L 2 n 1 Wn L 2 n 1 W L p p 1 p W L 2 2 p p 2 COX 2 w L 1 W L n 1 n W 2 n n L 1 W L p 1 p W 2 p p which again simplifies to 2 2 VTO n μ p L n 2 VOS W 2 VTO p n L n μ n W n L p σ 2 + V X M 3 M 4 V OUT V 1 M 1 M 2 V 2 V S Note these offset voltage expressions are identical! I T

8 Review from last lecture Random Offset Voltages V CC V CC Q 3 V X Q 4 Q 3 V X Q 4 V 1 Q 1 Q 2 V 2 V 1 Q 1 Q 2 V 2 V E V E I T I T (a) (b) It can be shown that 2 V OS where very approximately = = 0.1μ Jn ; Jp 2V Jn t En 2 Jp Ep

9 Review from last lecture Random Offset Voltages Typical offset voltages: MOS - 5mV to 50MV BJT - 0.5mV to 5mV These can be scaled with extreme device dimensions Often more practical to include offset-compensation circuitry

10 Common Centroid Layouts Define p to be a process parameter that varies with lateral position throughout the region defined by the channel of the transistor. lmost Theorem: If p(x,y) varies throughout a two-dimensional region, then p EQ 1 p x, y dxdy Parameters such at V T, µ and C OX vary throughout a two-dimensional region

11 y x p EQ 1 p x, y dxdy

12 Common Centroid Layouts lmost Theorem: If p(x,y) varies linearly throughout a two-dimensional region, then p EQ =p(x 0.y 0 ) where x 0,y 0 is the geometric centroid to the region. If a parameter varies linearly throughout a two-dimensional region, it is said to have a linear gradient. Many parameters have a dominantly linear gradient over rather small regions

13 (x 0,y 0 ) (x 0,y 0 ) is geometric centroid p EQ 1 p x, y dxdy If ρ(x,y) varies linearly in any direction, then the theorem states 1 p p x,y dxdy p x,y EQ 0 0

14 Common Centroid Layouts layout of two devices is termed a common-centroid layout if both devices have the same geometric centroid lmost Theorem: If p(x,y) varies linearly throughout a two-dimensional region, then if two devices have the same centroid, the lateral-variable parameters are matched! Note: This is true independent of the magnitude and direction of the gradient!

15 Recall parallel combinations of transistors equivalent to a single transistor of appropriate W,L 2W,L W,L W,L M 1 M 2 M k kw,l W,L W,L W,L

16 Centroids of Segmented Geometries Denotes Geometric Centroid

17 Common Centroid of Multiple Segmented Geometries

18 Common Centroid of Multiple Segmented Geometries

19 Common Centroid Layouts Common centroid layouts widely (almost always) used where matching of devices or components is critical because these layouts will cancel all first-order gradient effects pplies to resistors, capacitors, transistors and other components lways orient all devices in the same way Keep common centroid for interconnects, diffusions, and all features Often dummy devices placed on periphery to improve matching!

20 Common Centroid Layout Surrounded by Dummy Devices

21 Fingers and Multipliers Multiple fingers use shared diffusions Multipliers refer to multiple copies of transistors with individual drains and sources Important to match orientation if overall device matching is required Multiplier = 2 Fingers = 2

22 Fingers and Multipliers lternate Orientations

23 Common-Mode Feedback V OUT M 3 M 4 V OXX V OUT C L V IN M 1 M 2 V IN C L V B2 M 9 Needs CMFB Repeatedly throughout the course, we have added a footnote on fullydifferential circuits that a common-mode feedback circuit (CMFB) is needed The CMFB circuit is needed to establish or stabilize the operating point or operating points of the op amp

24 Common-Mode Feedback V OUT M 3 M 4 V B1 V OUT M 3 M 4 V FB V IN M 1 M 2 V IN C L V OUT V OUT C L V IN M 1 M 2 V IN C L CMFB Circuit V B2 M 9 C L V OXX V B2 M 9 On the reference op amp, the CMFB signal can be applied to either the p- channel biasing transistors or to the tail current transistor It is usually applied only to a small portion of the biasing transistors though often depicted as shown There is often considerable effort devoted to the design of the CMFB though little details are provided in most books and the basic concepts of the CMFB are seldom rigorously developed and often misunderstood

25 Common-Mode Feedback Partitioning biasing transistors for V FB insertion V FB (Nominal device matching assumed, all L s equal) V OUT M 3 M 4 V OUT C L V IN M 1 M 2 V IN C L CMFB Circuit V OXX V B2 M 9 M 3 V B1 M 4 Ideal (Desired) biasing V B1 M 3 M 3B M 4B M 4 V B1 V FB M 3 V FB V FB insertion M 4 Partitioned V FB insertion W +W =W W 3 3B 3 3B <<W 3

26 Basic Operation of CMFB Block V FB V O1 V O2 CMFB Circuit V FB V OUT C L M 3 M 4 V OUT V IN M 1 M 2 V IN C L V OXX CMFB Circuit V B2 M 9 V OXX CMFB Block V O1 verager V VG V FB V O2 V +V V FB= s V OXX V OXX is the desired quiescent voltage at the stabilization node (irrespective of where V FB goes)

27 Basic Operation of CMFB Block CMFB Block V O1 verager V VG V FB V O2 V OXX V +V V FB= s Comprised of two fundamental blocks verager Differential amplifier Sometimes combined into single circuit block Compensation of the CMFB path often required!!

28 Mathematics behind CMFB (consider an example that needs a CMFB) M 5 V B1 M 4 V O1 V OXX V OXX V O2 C 1 C 2 V 1 M 1 M 2 V 2 V YY M 3 Notice there are two capacitors and thus two poles in this circuit

29 Mathematics behind CMFB (consider an example that needs a CMFB) M 5 V B1 M 4 V O1 V OXX V OXX V O2 C 1 C 2 V 1 M 1 M 2 V 2 V YY M 3 g 05 g 04 V O1 V V O2 1 V 2 g m1 V GS1 V GS1 g 01 C 1 C 2 g 02 g m2 V GS2 V GS2 M 3 M 3 M 3 2W 3 =W 3 g 03 /2 g 03 /2 Small-signal model showing axis of symmetry

30 Mathematics behind CMFB (consider an example that needs a CMFB) g05 g04 V O1 V V O2 1 V2 gm1vgs1 gm2vgs2 g 05 VGS1 g01 C 1 C 2 g02 VGS2 g03/2 g03/2 V d 2 g m1 V GS1 V GS1 g 01 V OD C Small-signal difference-mode half circuit d 0 V sc+g +g +g OD m1 g - 2 m1 DIFF= sc+g 01 +g 05 g +g p DIFF= - C V 2 Note there is a single-pole in this circuit What happened to the other pole?

31 Mathematics behind CMFB (consider an example that needs a CMFB) g05 g04 g 05 V O1 V V O2 1 V2 gm1vgs1 gm2vgs2 VGS1 g01 C 1 C 2 g02 VGS2 V COM V OC g03/2 g03/2 g m1 V GS1 V GS1 g 01 C V S g 03 /2 Standard small-signal common-mode half circuit VOC sc+g 01+g 05 +gm1 VCOM -VS 0 V g +g /2 -g V -V V g S m1 COM S OC 01 -gm1 g 01+g 03 /2 g 01+g 03 /2 COM - sc+g +g g +g +g /2 -g g sc+g m m p COM g C 05 Note there is a single-pole in this circuit nd this is different from the difference-mode pole But the common-mode gain tells little, if anything, about the CMFB

32 Mathematics behind CMFB (consider an example that needs a CMFB) g05 g04 g +g / COM ; - 05 p sc+g COM 05 C gm1-2 g 01+g05 DIFF= p sc+g +g DIFF= - C g V O1 V V O2 1 V2 VGS1 gm1vgs1 g01 C 1 C 2 g02 g03/2 g03/2 gm2vgs2 VGS2 Difference-mode analysis completely hides all information about commonmode This also happens in simulations Common-mode analysis completely hides all information about differencemode This also happens in simulations Difference-mode poles may move into RHP with FB so compensation is required for stabilization (or proper operation) Common-mode poles may move into RHP with FB so compensation is required for stabilization (or proper operation) Difference-mode simulations tell nothing about compensation requirements for common-mode feedback Common-mode simulations tell nothing about compensation requirements for difference-mode feedback

33 Mathematics behind CMFB (consider an example that needs a CMFB) g05 g04 g +g / COM ; - 05 p sc+g COM 05 C gm1-2 g 01+g05 DIFF= p sc+g +g DIFF= - C g V O1 V V O2 1 V2 VGS1 gm1vgs1 g01 C 1 C 2 g02 g03/2 g03/2 gm2vgs2 VGS2 Common-mode and difference-mode gain expressions often include same components though some may be completely absent in one or the other mode Compensation capacitors can be large for compensating either the common-mode or difference-mode circuits Highly desirable to have the same compensation capacitor serve as the compensation capacitor for both difference-mode and common-mode operation But tradeoffs may need to be made in phase margin for both modes if this is done Better understanding of common-mode feedback is needed to provide good solutions to the problem

34 Common-Mode and Difference-Mode Issues Overall poles are the union of the common-mode and difference mode poles Separate analysis generally require to determine common-mode and differencemode performance Some amplifiers will need more than one CMFB

35 Common-mode offset voltage M 5 M 4 V O1 V 0XX V COFF V 0XX V O2 C 1 V B1 C 2 M 1 M 2 V C1 V C1 V YY M 3 Definition: The common-mode offset voltage is the voltage that must be applied to the biasing node at the CMFB point to obtain the desired operating point at the stabilization node Note: Could alternately define common-mode offset relative to V YY input if CMFB to M 3

36 Common-mode offset voltage Consider again the Common-mode half circuit V O1 V 0XX M 5 M 4 V 0XX V COFF V O2 C 1 V B1 C 2 M 1 M 2 V C1 V C1 M 4 V COFF V O2 V YY M 3 V XX M 2 V C1 C 2 M 3 M 3 M 3 V YY M 3 There are three common-mode inputs to this circuit! The common-mode signal input is distinct from the input that is affected by V COFF The gain from the common-mode input where V FB is applied may be critical!

37 Common-mode gains M 5 M 4 V C2 M 4 V O1 C 1 V C1 V 0XX V 0XX V COFF V B1 M 1 M 2 V C1 C2 V O2 V O2 V YY M 3 M 2 V C1 M 3 V C3 V02 g 02+g 03 /2 COM - VC1 sc+g04 V02 gm4 COM2 - VC2 sc+g04 V02 g m3 /2 COM3 - V sc+g C3 04 C g 02+g 03 /2 IT 1 COM0 - g I / 2 2 g 04 m4 T EB4 COM20 - g 04 IT /2 VEB 4 T 2 I / V 4 2IT /2 g /2 V 2 m3 EB3 COM30 = - g04 I T /2 VEB3 lthough the common-mode gain COM0 is very small, C0M20 is very large! Shift in V 02Q from V OXX is the product of the common-mode offset voltage and COM20

38 Effect of common-mode offset voltage VDD M5 M4 VO1 V0XX VCOFF V0XX VO2 V C2 C1 VC1 M1 VB1 M2 VC1 C2 M 4 VYY M3 V COFF V O2 V B1 M 2 V C1 C 2 COM20 4 V EB 5 V C3 M 3 V 02 = COM20 VCOFF How much change in V 02 is acceptable? (assume e.g. 50mV) How big is V COFF? How big is COM20? (similar random expressions for V OS, assume, e.g. 25mV) (that due to process variations even larger) (if λ=.01, V EB =.2, COM20 =2000) If change in V 02 is too large, CMFB is needed (50mV >? 2000x25mV)

39 How much gain is needed in the CMFB amplifier? VDD VFB M3 M4 VOUT VOUT VIN M1 M2 VIN CMFB Circuit CL CL VOXX VB2 M9 CMFB Block V O1 verager V VG V FB V O2 V OXX CMFB must compensate for V COFF Want to guarantee V02Q -V 0XX < ΔVOUT-CCEPTBLE This is essentially the small-signal output with a small-signal input of V COFF

40 How much gain is needed in the CMFB amplifier? VDD VFB M3 M4 VOUT VOUT VIN M1 M2 VIN CMFB Circuit CL CL VOXX V C1 M 4 VB2 M9 M 2 V C1 V O2 C 2 V VG V FB V OXX Want to guarantee V C3 M 3 V02Q -V 0XX < ΔVOUT-CCEPTBLE The CMFB Loop Do a small-signal analysis, only input is V COFF V = V +V COFF COM2 V =V 02 COFF 1- COM2 COM2 V =V 0UT-CCEPTBLE COFF 1- COM2 COM2

41 How much gain is needed in the CMFB amplifier? VDD VFB VOUT M3 M4 VOUT V C1 X V C3 M 4 M 2 M 3 Y V C1 V O2 C 2 V VG V OXX V FB VIN VIN M1 M2 CL VB2 M9 V =V 0UT-CCEPTBLE COFF CL VOXX 1- CMFB Circuit COM2 COM2 The CMFB Loop This does not require a particularly large gain This is the loop that must be compensated since and COMP2 will be frequency dependent Miller compensation capacitor for compensation of differential loop will often appear in shunt with C 2 Can create this half-circuit loop (without CM inputs on a fully differential structure) for simulations Results extend readily to two-stage structures with no big surprises Capacitances on nodes X and Y create poles for CMFB circuit Reasonably high closed-loop CMFB bandwidth needed to minimize shifts in output due to high-frequency common-mode noise

42 CMFB Circuits Several (but not too many) CMFB circuits exist Can be classified as either continuous-time or discrete-time I B V OXX I B + V o - V o V 01 M 1 M 2 M 3 M 4 V 02 N 1 N 2 C S C 1 C 1 C S N 2 N 1 V FB M 5 V 01 V 02 N 1 N 2 N 2 N 1 V SS V FB M 6 V SS

43 CMFB Circuits Several (but not too many) CMFB circuits exist Can be classified as either continuous-time or discrete-time I B I B V OXX I B + V o - V o V 01 M 1 M 2 M 3 M 4 V 02 N 1 N 2 C S C 1 C 1 C S N 2 N 1 V FB M 5 V 01 V 02 N 1 N 2 N 2 N 1 V SS V FB M 7 M 6 V SS Circuit in blue can be added to double CMFB gain

44 End of Lecture 24