Design of Analog CMOS Integrated Circuits

Transcription

1 Design of Analog CMOS Integrated Circuits Behzad Razavi Professor of Electrical Engineering University of California, Los Angeles H Boston Burr Ridge, IL Dubuque, IA Madison, WI New York San Francisco St. Louis Bangkok Bogota Caracas Kuala Lumpur Lisbon London Madrid Mexico City Milan Montreal New Delhi Santiago Seoul Singapore Sydney Taipei Toronto

2 Contents About the Author Preface Acknowledgments vii ix xi 1 Introduction to Analog Design Why Analog? Why Integrated? Why CMOS? Why This Book? General Concepts Levels of Abstraction Robust Analog Design 7 2 Basic MOS Device Physics General Considerations MOSFET as a Switch MOSFET Structure MOS Symbols MOS I/V Characteristics Threshold Voltage Derivation of I/V Characteristics Second-Order Effects MOS Device Models MOS Device Layout MOS Device Capacitances MOS Small-Signal Model MOS SPICE modeis NMOS versus PMOS Devices Long-Channel versus Short-Channel Devices 38 xv

3 xvi Contents 3 Single-Stage Amplifiers Basic Concepts Common-Source Stage Common-Source Stage with Resistive Load CS Stage with Diode-Connected Load CS Stage with Current-Source Load CS Stage with Triode Load CS Stage with Source Degeneration Source Follower Common-Gate Stage Cascode Stage Folded Cascode Choice of Device Models 92 4 Differential Amplifiers Single-Ended and Differential Operation Basic Differential Pair Qualitative Analysis Quantitative Analysis Common-Mode Response Differential Pair with MOS Loads Gilbert Cell Passive and Active Current Mirrors Basic Current Mirrors Cascode Current Mirrors Active Current Mirrors Large-Signal Analysis Small-Signal Analysis Common-Mode Properties Frequency Response of Amplifiers General Considerations Miller Effect Association of Poles with Nodes Common-Source Stage Source Followers Common-Gate Stage Cascode Stage Differential Pair 187 Appendix A: Dual of Miller's Theorem 193

4 xvii 7 Noise Statistical Characteristics of Noise Noise Spectrum Amplitude Distribution Correlated and Uncorrelated Sources Types of Noise Thermal Noise Flicker Noise Representation of Noise in Circuits Noise in Single-Stage Amplifiers Common-Source Stage Common-Gate Stage Source Followers Cascode Stage Noise in Differential Pairs Noise Bandwidth Feedback General Considerations Properties of Feedback Circuits Types of Amplifiers Feedback Topologies Voltage-Voltage Feedback Current-Voltage Feedback Voltage-Current Feedback Current-Current Feedback Effect of Loading Two-Port Network Models Loading in Voltage-Voltage Feedback Loading in Current-Voltage Feedback Loading in Voltage-Current Feedback Loading in Current-Current Feedback Summary of Loading Effects Effect of Feedback on Noise Operational Amplifiers General Considerations Performance Parameters ' One-Stage Op Amps Two-Stage Op Amps Gain Boosting Comparison Common-Mode Feedback 314

5 Contents 9.7 Input Range Limitations Slew Rate Power Supply Rejection Noise in Op Amps Stability and Frequency Compensation General Considerations Multipole Systems «Phase Margin Frequency Compensation Compensation of Two-Stage Op Amps Slewing in Two-Stage Op Amps Other Compensation Techniques Bandgap References General Considerations Supply-Independent Biasing Temperature-Independent References Negative-TC Voltage Positive-TC Voltage Bandgap Reference PTAT Current Generation Constant-G m Biasing Speed and Noise Issues Case Study Introduction to Switched-Capacitor Circuits General Considerations Sampling Switches MOSFETS as Switches Speed Considerations Precision Considerations Charge Injection Cancellation Switched-Capacitor Amplifiers Unity-Gain Sampler/Buffer Noninverting Amplifier Precision Multiply-by-Two Circuit Switched-Capacitor Integrator Switched-Capacitor Common-Mode Feedback Nonlinearity and Mismatch Nonlinearity General Considerations 448

6 xix Nonlinearity of Differential Circuits Effect of Negative Feedback on Nonlinearity Capacitor Nonlinearity Linearization Techniques Mismatch Offset Cancellation Techniques Reduction of Noise by Offset Cancellation Alternative Definition of CMRR Oscillators General Considerations Ring Oscillators LC Oscillators Crossed-Coupled Oscillator Colpitts Oscillator One-Port Oscillators Voltage-Controlled Oscillators Tuning in Ring Oscillators Tuning in LC Oscillators Mathematical Model of VCOs Phase-Locked Loops Simple PLL Phase Detector Basic PLL Topology Dynamics of Simple PLL Charge-Pump PLLs Problem of Lock Acquisition Phase/Frequency Detector and Charge Pump Basic Charge-Pump PLL Nonideal Effects in PLLs PFD/CP Nonidealities Jitter in PLLs Delay-Locked Loops Applications Frequency Multiplication and Synthesis Skew Reduction Jitter Reduction Short-Channel Effects and Device Models Scaling Theory Short-Channel Effects 583

7 Contents Threshold Voltage Variation Mobility Degradation with Vertical Field Velocity Saturation Hot Carrier Effects Output Impedance Variation with Drain-Source Voltage MOS Device Models Level 1 Model Level 2 Model Level 3 Model BSIM Series Other Models Charge and Capacitance Modeling Temperature Dependence Process Corners Analog Design in a Digital World CMOS Processing Technology General Considerations Wafer Processing Photolithography Oxidation Ion Implantation Deposition and Etching Device Fabrication Active Devices Passive Devices Interconnects Latch-Up Layout and Packaging General Layout Considerations Design Rules Antenna Effect Analog Layout Techniques Multifinger Transistors Symmetry Reference Distribution Passive Devices Interconnects Substrate Coupling 660 Index 677