EECE488: Analog CMOS Integrated Circuit Design Set 7 Opamp Design

Save this PDF as:
 WORD  PNG  TXT  JPG

Size: px
Start display at page:

Download "EECE488: Analog CMOS Integrated Circuit Design Set 7 Opamp Design"

Transcription

1 EECE488: Analog CMOS Integrated Circuit Design Set 7 Opamp Design References: Analog Integrated Circuit Design by D. Johns and K. Martin and Design of Analog CMOS Integrated Circuits by B. Razavi All figures in this set of slides are taken from the above books Shahriar Mirabbasi Department of Electrical and Computer Engineering University of British Columbia 1

2 Gain Small-signal bandwidth Large-signal performance Output swing Input common-mode range Linearity Noise/offset Supply rejection General Considerations 2

3 One-Stage Op Amps 3

4 One-Stage Op Amp in Unity Gain Configuration 4

5 Cascode Op Amps 5

6 Unity Gain One Stage Cascode 6

7 Folded Cascode Op Amps 7

8 Folded Cascode Stages 8

9 Folded Cascode (cont.) 9

10 Folded Cascode (cont.) A v g m1 {[(g m 3 + g mb3 )r o3 (r o1 r o5 )] [(g m 7 + g mb 7 )r o7 r o9 ]} 10

11 Telescopic versus Folded Cascode 11

12 Example Folded-Cascode Op Amp 12

13 Single-Ended Output Cascode Op Amps 13

14 Triple Cascode A v app. (g m r o ) 3 /2 Limited Output Swing Complex biasing 14

15 Output Impedance Enhancement R = out A g r r 1 m2 o2 o1 15

16 Gain Boosting in Cascode Stage 16

17 Differential Gain Boosting 17

18 Differential Gain Boosting 18

19 Differential Gain Boosting 19

20 Two-Stage Op Amps 20

21 Single-Ended Output Two-Stage Op Amp 21

22 Two-Stage CMOS Opamp Popular opamp design approach A good example to review many important design concepts Output buffer is typically used to drive resistive loads For capacitive loads (typical case in CMOS) buffer is not required. C c V in A 1 A 2 1 V out Differential input stage Second gain stage Output buffer 22

23 Two-Stage CMOS Opamp Example 23

24 First Stage Differential to single-ended Gain of the Opamp Second Stage Common-source stage Output buffer is not required when driving capacitive loads 24

25 Gain of the Opamp Third Stage Source follower Typical gain: between 0.7 to1 Note: g o =1/r o and G L =1/R L g mb is body-effect conductance (is zero if source can be tied to substrate) 25

26 V bias Q5 300 Frequency Response v in+ v in Q Q2 v 1 C C v 2 A A2 A3 v out 150 Q3 Q4 i = g m1 v in C eq = C C ( 1 + A 2 ) 26

27 Frequency Response Simplifying assumptions: C C dominates Ignore Q 16 for the time being (it is used for lead compensation) Miller effect results in At midband frequencies 27

28 Overall gain (assuming A 3 1) Frequency Response which results in a unity-gain frequency of Note: ω ta is directly proportional to g m1 and inversely proportional to C C. 28

29 First-order model Frequency Response 20log( A 1 A 2 ) Gain 20 db/decade (db) ω ta g m1 C C 0 Freq ω p1 ω ta (log) ω p1 Phase (degrees) 0 Freq 90 ω ta (log)

30 Slew Rate Maximum rate of output change when input signal is large. V bias Q5 300 v in+ v in Q Q2 v 1 C C v i = g m1 v in A2 A3 v out Q3 Q4 All the bias current of Q5 goes either into Q1 or Q2. A

31 Slew Rate 31

32 Slew Rate Normally, the designer has not much control overω ta Slew-rate can be increased by increasing V eff1 This is one of the reasons for using p-channel input stage: higher slew-rate 32

33 Systematic Offset Voltage To ensure inherent (systematic) offset voltage does not exist, nominal current through Q7 should equal to that of Q6 when the differential input is zero. V bias Q5 300 I bias V DD Q6 300 Q1 Q2 V in V in+ Vout Q3 Q4 V SS Q7 33

34 Systematic Offset Voltage Avoid systematic offset by choosing: Found by noting and then setting 34

35 N-Channel versus P-Channel Input Stage Complimentary opamp can be designed with an n-channel input differential pair and p-channel second-stage Overall gain would be roughly the same in both designs P-channel Advantages Higher slew-rate: for fixed bias current, V eff is larger (assuming similar widths used for maximum gain) Higher frequency of operation: higher transconductance of second stage which results in higher unity-gain frequency Lower 1/f noise: holes less likely to be trapped; p-channel transistors have lower 1/f noise N-channel source follower is preferable (less voltage drop and higher g m ) N-channel Advantage Lower thermal noise thermal noise is lowered by high transconductance of first stage 35

36 Feedback and Opamp Compensation Y X ( s) = H ( s) 1+ βh ( s) Feedback systems may oscillate The following two are the oscillation conditions: βh ( jω) = 1 βh ( jω) =

37 Stable and Unstable Systems 37

38 Time-domain response of a feedback system 38

39 One-pole system H ( s) = A0 1+ s ω 0 Y X ( s) = A βa0 s 1+ ω 1+ βa 0 ( ) 0 S p ( β ) = ω 0 1+ A 0 Bode plot of the Loop gain 39

40 Multi-pole system ω > ω 0.1 p2 10 p1 Bode plot of the Loop gain 40

41 Phase Margin Loop Gain -20 db/decade (db) 20log ( LG( jω) ) 0 ω p 1 ω t Freq (log) GM (gain margin) Phase Loop Gain 0 ω p 1 ω t Freq (log) (degrees) PM (phase margin) 41

42 Phase Margin βh( ω 1 ) = 1 e j175 Y X ( s) = 11.5 β Closed loop frequency response 42

43 Phase Margin (Cont.) PM = βh( ωgx ) Phase Margin = 45 43

44 Phase Margin (Cont.) Phase Margin = 45 44

45 Phase Margin (Cont.) At PM = 60 o results in a small overshoot in the step response. If we increase PM, the system will be more stable but the time response slows down. 45

46 Frequency Compensation Push phase crossing point out Push gain crossing point in 46

47 Telescopic Opamp (single-ended) -example 47

48 Compensation (Cont.) Assume we need a phase margin of 45 o (usually inadequate) and other non-dominant poles are at high frequency. 48

49 Compensation of a two-stage opamp Miller Effect C eq = C E + (1+ A v 2 )C C f pe = 1 2πR out [C E + (1+ A v 2 )C C ] 49

50 Compensating Two-Stage Opamps V bias1 Q5 300 V DD Q6 300 Q1 Q2 V in V in+ V out2 V bias2 Q16 Cc Q3 Q4 Q7 50

51 Compensating Two-Stage Opamps v 1 R C C C g v R g v m1 in 1 C 1 m7 1 R 2 C 2 Q16 has V DS16 = 0 therefore it is hard in the triode region. Small signal analysis: without R C, a right-half plane zero occurs and worsens the phase-margin. 51

52 Compensating Two-Stage Opamps Using R C (through Q16) places zero at Zero moved to left-half plane to aid compensation Good practical choice is satisfied by letting 52

53 Design Procedure Design example: Find C C with R C =0 for a 55 o phase margin Arbitrarily choose C C =1pF and set R C =0 Using SPICE, find frequency ω t where a 125 phase shift exists, define gain as A Choose new C C soω t becomes unity-gain frequency of the loop gain, resulting in a 55 o phase margin. Achieved by setting C C =C C A Might need to iterate on C C a couple of times using SPICE 53

54 Next: Choose R C according to Design Procedure Increasingω t by about 20 percent, leaves zero near finalω t Check that gain continues to decrease at frequencies above the newω t Next: If phase margin is not adequate, increase C C while leaving R C constant. 54

55 Next: Replace R C by a transistor Design Procedure SPICE can be used for iteration to fine-tune the device dimensions and optimize the phase margin. 55

56 Process and Temperature Independence Can show non-dominant pole is roughly given by Recall zero given by If R C tracks inverse of g m7 then zero will trackω p2 : 56

57 Process and Temperature Independence Need to ensure V eff16 /V eff7 is independent of process and temperature variations V bias Q11 25 Q6 300 Q12 25 Q13 V a 25 V b Q16 V b C C 300 Q7 First set V eff13 =V eff7 which makes V a =V b 57

58 Process and Temperature Independence 58

59 Stable Transconductance Biasing 59

60 Stable Transconductance Biasing Transconductance of Q 13 (to the first order) is determined by geometric ratios only. Independent of power-supply voltages, process parameters, temperature, etc. For special case (W/L) 15 =4(W/L) 13 g m13 =1/R B Note that high-temperature will decrease mobility and hence increase effective gate-source voltages. Roughly 25% increase for 100 degree increase Requires a start-up circuit (might have all 0 currents) 60

Analysis and Design of Analog Integrated Circuits Lecture 20. Advanced Opamp Topologies (Part II)

Analysis and Design of Analog Integrated Circuits Lecture 20. Advanced Opamp Topologies (Part II) Analysis and Design of Analog Integrated Circuits Lecture 20 Advanced Opamp Topologies (Part II) Michael H. Perrott April 15, 2012 Copyright 2012 by Michael H. Perrott All rights reserved. Outline of Lecture

More information

Chapter 12 Opertational Amplifier Circuits

Chapter 12 Opertational Amplifier Circuits 1 Chapter 12 Opertational Amplifier Circuits Learning Objectives 1) The design and analysis of the two basic CMOS op-amp architectures: the two-stage circuit and the single-stage, folded cascode circuit.

More information

Analog Integrated Circuits Fundamental Building Blocks

Analog Integrated Circuits Fundamental Building Blocks Analog Integrated Circuits Fundamental Building Blocks Basic OTA/Opamp architectures Faculty of Electronics Telecommunications and Information Technology Gabor Csipkes Bases of Electronics Department Outline

More information

Design of High-Speed Op-Amps for Signal Processing

Design of High-Speed Op-Amps for Signal Processing Design of High-Speed Op-Amps for Signal Processing R. Jacob (Jake) Baker, PhD, PE Professor and Chair Boise State University 1910 University Dr. Boise, ID 83725-2075 jbaker@ieee.org Abstract - As CMOS

More information

A Compact Folded-cascode Operational Amplifier with Class-AB Output Stage

A Compact Folded-cascode Operational Amplifier with Class-AB Output Stage A Compact Folded-cascode Operational Amplifier with Class-AB Output Stage EEE 523 Advanced Analog Integrated Circuits Project Report Fuding Ge You are an engineer who is assigned the project to design

More information

Basic OpAmp Design and Compensation. Chapter 6

Basic OpAmp Design and Compensation. Chapter 6 Basic OpAmp Design and Compensation Chapter 6 6.1 OpAmp applications Typical applications of OpAmps in analog integrated circuits: (a) Amplification and filtering (b) Biasing and regulation (c) Switched-capacitor

More information

ECEN 474/704 Lab 8: Two-Stage Miller Operational Amplifier

ECEN 474/704 Lab 8: Two-Stage Miller Operational Amplifier ECEN 474/704 Lab 8: Two-Stage Miller Operational Amplifier Objective Design, simulate and test a two-stage operational amplifier Introduction Operational amplifiers (opamp) are essential components of

More information

INF3410 Fall Book Chapter 6: Basic Opamp Design and Compensation

INF3410 Fall Book Chapter 6: Basic Opamp Design and Compensation INF3410 Fall 2013 Compensation content Introduction Two Stage Opamps Compensation Slew Rate Systematic Offset Advanced Current Mirrors Operational Transconductance Amplifiers Current Mirror Opamps Folded

More information

Analysis and Design of Analog Integrated Circuits Lecture 18. Key Opamp Specifications

Analysis and Design of Analog Integrated Circuits Lecture 18. Key Opamp Specifications Analysis and Design of Analog Integrated Circuits Lecture 8 Key Opamp Specifications Michael H. Perrott April 8, 0 Copyright 0 by Michael H. Perrott All rights reserved. Recall: Key Specifications of Opamps

More information

CSE 577 Spring Insoo Kim, Kyusun Choi Mixed Signal CHIP Design Lab. Department of Computer Science & Engineering The Penn State University

CSE 577 Spring Insoo Kim, Kyusun Choi Mixed Signal CHIP Design Lab. Department of Computer Science & Engineering The Penn State University CSE 577 Spring 2011 Basic Amplifiers and Differential Amplifier, Kyusun Choi Mixed Signal CHIP Design Lab. Department of Computer Science & Engineering The Penn State University Don t let the computer

More information

Basic OpAmp Design and Compensation. Chapter 6

Basic OpAmp Design and Compensation. Chapter 6 Basic OpAmp Design and Compensation Chapter 6 6.1 OpAmp applications Typical applications of OpAmps in analog integrated circuits: (a) Amplification and filtering (b) Biasing and regulation (c) Switched-capacitor

More information

Chapter 5. Operational Amplifiers and Source Followers. 5.1 Operational Amplifier

Chapter 5. Operational Amplifiers and Source Followers. 5.1 Operational Amplifier Chapter 5 Operational Amplifiers and Source Followers 5.1 Operational Amplifier In single ended operation the output is measured with respect to a fixed potential, usually ground, whereas in double-ended

More information

ECEN 474/704 Lab 5: Frequency Response of Inverting Amplifiers

ECEN 474/704 Lab 5: Frequency Response of Inverting Amplifiers ECEN 474/704 Lab 5: Frequency Response of Inverting Amplifiers Objective Design, simulate and layout various inverting amplifiers. Introduction Inverting amplifiers are fundamental building blocks of electronic

More information

BUCK Converter Control Cookbook

BUCK Converter Control Cookbook BUCK Converter Control Cookbook Zach Zhang, Alpha & Omega Semiconductor, Inc. A Buck converter consists of the power stage and feedback control circuit. The power stage includes power switch and output

More information

University of Michigan, EECS413 Final project. A High Speed Operational Amplifier. 1. A High Speed Operational Amplifier

University of Michigan, EECS413 Final project. A High Speed Operational Amplifier. 1. A High Speed Operational Amplifier University of Michigan, EECS413 Final project. A High Speed Operational Amplifier. 1 A High Speed Operational Amplifier A. Halim El-Saadi, Mohammed El-Tanani, University of Michigan Abstract This paper

More information

A Unity Gain Fully-Differential 10bit and 40MSps Sample-And-Hold Amplifier in 0.18μm CMOS

A Unity Gain Fully-Differential 10bit and 40MSps Sample-And-Hold Amplifier in 0.18μm CMOS A Unity Gain Fully-Differential 0bit and 40MSps Sample-And-Hold Amplifier in 0.8μm CMOS Sanaz Haddadian, and Rahele Hedayati Abstract A 0bit, 40 MSps, sample and hold, implemented in 0.8-μm CMOS technology

More information

Lecture 240 Cascode Op Amps (3/28/10) Page 240-1

Lecture 240 Cascode Op Amps (3/28/10) Page 240-1 Lecture 240 Cascode Op Amps (3/28/10) Page 2401 LECTURE 240 CASCODE OP AMPS LECTURE ORGANIZATION Outline Lecture Organization Single Stage Cascode Op Amps Two Stage Cascode Op Amps Summary CMOS Analog

More information

Radivoje Đurić, 2015, Analogna Integrisana Kola 1

Radivoje Đurić, 2015, Analogna Integrisana Kola 1 OTA-output buffer 1 According to the types of loads, the driving capability of the output stages differs. For switched capacitor circuits which have high impedance capacitive loads, class A output stage

More information

DESIGN OF A FULLY DIFFERENTIAL HIGH-SPEED HIGH-PRECISION AMPLIFIER

DESIGN OF A FULLY DIFFERENTIAL HIGH-SPEED HIGH-PRECISION AMPLIFIER DESIGN OF A FULLY DIFFERENTIAL HIGH-SPEED HIGH-PRECISION AMPLIFIER Mayank Gupta mayank@ee.ucla.edu N. V. Girish envy@ee.ucla.edu Design I. Design II. University of California, Los Angeles EE215A Term Project

More information

Today s topic: frequency response. Chapter 4

Today s topic: frequency response. Chapter 4 Today s topic: frequency response Chapter 4 1 Small-signal analysis applies when transistors can be adequately characterized by their operating points and small linear changes about the points. The use

More information

Technology-Independent CMOS Op Amp in Minimum Channel Length

Technology-Independent CMOS Op Amp in Minimum Channel Length Technology-Independent CMOS Op Amp in Minimum Channel Length A Thesis Presented to The Academic Faculty by Susanta Sengupta In Partial Fulfillment of the Requirements for the Degree of Doctor of Philosophy

More information

6.976 High Speed Communication Circuits and Systems Lecture 5 High Speed, Broadband Amplifiers

6.976 High Speed Communication Circuits and Systems Lecture 5 High Speed, Broadband Amplifiers 6.976 High Speed Communication Circuits and Systems Lecture 5 High Speed, Broadband Amplifiers Michael Perrott Massachusetts Institute of Technology Copyright 2003 by Michael H. Perrott Broadband Communication

More information

Design of a Sample and Hold Circuit using Rail to Rail Low Voltage Compact Operational Amplifier and bootstrap Switching

Design of a Sample and Hold Circuit using Rail to Rail Low Voltage Compact Operational Amplifier and bootstrap Switching RESEARCH ARTICLE OPEN ACCESS Design of a Sample and Hold Circuit using Rail to Rail Low Voltage Compact Operational Amplifier and bootstrap Switching Annu Saini, Prity Yadav (M.Tech. Student, Department

More information

DESIGN HIGH SPEED, LOW NOISE, LOW POWER TWO STAGE CMOS OPERATIONAL AMPLIFIER. Himanshu Shekhar* 1, Amit Rajput 1

DESIGN HIGH SPEED, LOW NOISE, LOW POWER TWO STAGE CMOS OPERATIONAL AMPLIFIER. Himanshu Shekhar* 1, Amit Rajput 1 ISSN 2277-2685 IJESR/June 2014/ Vol-4/Issue-6/319-323 Himanshu Shekhar et al./ International Journal of Engineering & Science Research DESIGN HIGH SPEED, LOW NOISE, LOW POWER TWO STAGE CMOS OPERATIONAL

More information

Design of Low Voltage Low Power CMOS OP-AMP

Design of Low Voltage Low Power CMOS OP-AMP RESEARCH ARTICLE OPEN ACCESS Design of Low Voltage Low Power CMOS OP-AMP Shahid Khan, Prof. Sampath kumar V. Electronics & Communication department, JSSATE ABSTRACT Operational amplifiers are an integral

More information

Design and Layout of Two Stage High Bandwidth Operational Amplifier

Design and Layout of Two Stage High Bandwidth Operational Amplifier Design and Layout of Two Stage High Bandwidth Operational Amplifier Yasir Mahmood Qureshi Abstract This paper presents the design and layout of a two stage, high speed operational amplifiers using standard

More information

ECEN 5008: Analog IC Design. Final Exam

ECEN 5008: Analog IC Design. Final Exam ECEN 5008 Initials: 1/10 ECEN 5008: Analog IC Design Final Exam Spring 2004 Instructions: 1. Exam Policy: Time-limited, 150-minute exam. When the time is called, all work must stop. Put your initials on

More information

ANALYSIS AND DESIGN OF ANALOG INTEGRATED CIRCUITS

ANALYSIS AND DESIGN OF ANALOG INTEGRATED CIRCUITS ANALYSIS AND DESIGN OF ANALOG INTEGRATED CIRCUITS Fourth Edition PAUL R. GRAY University of California, Berkeley PAUL J. HURST University of California, Davis STEPHEN H. LEWIS University of California,

More information

System on a Chip. Prof. Dr. Michael Kraft

System on a Chip. Prof. Dr. Michael Kraft System on a Chip Prof. Dr. Michael Kraft Lecture 4: Filters Filters General Theory Continuous Time Filters Background Filters are used to separate signals in the frequency domain, e.g. remove noise, tune

More information

Low Power and Fast Transient High Swing CMOS Telescopic Operational Amplifier

Low Power and Fast Transient High Swing CMOS Telescopic Operational Amplifier RESEARCH ARTICLE OPEN ACCESS Low Power and Fast Transient High Swing CMOS Telescopic Operational Amplifier Akshay Kumar Kansal 1, Asst Prof. Gayatri Sakya 2 Electronics and Communication Department, 1,2

More information

High bandwidth low power operational amplifier design and compensation techniques

High bandwidth low power operational amplifier design and compensation techniques Graduate Theses and Dissertations Graduate College 2009 High bandwidth low power operational amplifier design and compensation techniques Vaibhav Kumar Iowa State University Follow this and additional

More information

Rail-To-Rail Output Op-Amp Design with Negative Miller Capacitance Compensation

Rail-To-Rail Output Op-Amp Design with Negative Miller Capacitance Compensation Rail-To-Rail Op-Amp Design with Negative Miller Capacitance Compensation Muhaned Zaidi, Ian Grout, Abu Khari bin A ain Abstract In this paper, a two-stage op-amp design is considered using both Miller

More information

A PSEUDO-CLASS-AB TELESCOPIC-CASCODE OPERATIONAL AMPLIFIER

A PSEUDO-CLASS-AB TELESCOPIC-CASCODE OPERATIONAL AMPLIFIER A PSEUDO-CLASS-AB TELESCOPIC-CASCODE OPERATIONAL AMPLIFIER M. Taherzadeh-Sani, R. Lotfi, and O. Shoaei ABSTRACT A novel class-ab architecture for single-stage operational amplifiers is presented. The structure

More information

ELECTRICAL CIRCUITS 6. OPERATIONAL AMPLIFIERS PART III DYNAMIC RESPONSE

ELECTRICAL CIRCUITS 6. OPERATIONAL AMPLIFIERS PART III DYNAMIC RESPONSE 77 ELECTRICAL CIRCUITS 6. PERATAL AMPLIIERS PART III DYNAMIC RESPNSE Introduction In the first 2 handouts on op-amps the focus was on DC for the ideal and non-ideal opamp. The perfect op-amp assumptions

More information

A Compact 2.4V Power-efficient Rail-to-rail Operational Amplifier. Strong inversion operation stops a proposed compact 3V power-efficient

A Compact 2.4V Power-efficient Rail-to-rail Operational Amplifier. Strong inversion operation stops a proposed compact 3V power-efficient A Compact 2.4V Power-efficient Rail-to-rail Operational Amplifier Abstract Strong inversion operation stops a proposed compact 3V power-efficient rail-to-rail Op-Amp from a lower total supply voltage.

More information

CHAPTER 9 FEEDBACK. NTUEE Electronics L.H. Lu 9-1

CHAPTER 9 FEEDBACK. NTUEE Electronics L.H. Lu 9-1 CHAPTER 9 FEEDBACK Chapter Outline 9.1 The General Feedback Structure 9.2 Some Properties of Negative Feedback 9.3 The Four Basic Feedback Topologies 9.4 The Feedback Voltage Amplifier (Series-Shunt) 9.5

More information

Lecture 030 ECE4430 Review III (1/9/04) Page 030-1

Lecture 030 ECE4430 Review III (1/9/04) Page 030-1 Lecture 030 ECE4430 Review III (1/9/04) Page 0301 LECTURE 030 ECE 4430 REVIEW III (READING: GHLM Chaps. 3 and 4) Objective The objective of this presentation is: 1.) Identify the prerequisite material

More information

Pole, zero and Bode plot

Pole, zero and Bode plot Pole, zero and Bode plot EC04 305 Lecture notes YESAREKEY December 12, 2007 Authored by: Ramesh.K Pole, zero and Bode plot EC04 305 Lecture notes A rational transfer function H (S) can be expressed as

More information

Current Supply Topology. CMOS Cascode Transconductance Amplifier. Basic topology. p-channel cascode current supply is an obvious solution

Current Supply Topology. CMOS Cascode Transconductance Amplifier. Basic topology. p-channel cascode current supply is an obvious solution CMOS Cascode Transconductance Amplifier Basic topology. Current Supply Topology p-channel cascode current supply is an obvious solution Current supply must have a very high source resistance r oc since

More information

Op-Amp Simulation Part II

Op-Amp Simulation Part II Op-Amp Simulation Part II EE/CS 5720/6720 This assignment continues the simulation and characterization of a simple operational amplifier. Turn in a copy of this assignment with answers in the appropriate

More information

Chapter 11. Differential Amplifier Circuits

Chapter 11. Differential Amplifier Circuits Chapter 11 Differential Amplifier Circuits 11.0 ntroduction Differential amplifier or diff-amp is a multi-transistor amplifier. t is the fundamental building block of analog circuit. t is virtually formed

More information

2.996/6.971 Biomedical Devices Design Laboratory Lecture 7: OpAmps

2.996/6.971 Biomedical Devices Design Laboratory Lecture 7: OpAmps 2.996/6.971 Biomedical Devices Design Laboratory Lecture 7: OpAmps Instructor: Dr. Hong Ma Oct. 3, 2007 Fundamental Circuit: Source and Load Sources Power supply Signal Generator Sensor Amplifier output

More information

Design and Simulation of an Operational Amplifier with High Gain and Bandwidth for Switched Capacitor Filters

Design and Simulation of an Operational Amplifier with High Gain and Bandwidth for Switched Capacitor Filters IOSR Journal of Electrical and Electronics Engineering (IOSR-JEEE) e-issn: 2278-1676,p-ISSN: 2320-3331, Volume 11, Issue 1 Ver. II (Jan. Feb. 2016), PP 47-53 www.iosrjournals.org Design and Simulation

More information

A Novel Design of Low Voltage,Wilson Current Mirror based Wideband Operational Transconductance Amplifier

A Novel Design of Low Voltage,Wilson Current Mirror based Wideband Operational Transconductance Amplifier A Novel Design of Low Voltage,Wilson Current Mirror based Wideband Operational Transconductance Amplifier Kehul A. Shah 1, N.M.Devashrayee 2 1(Associative Prof., Department of Electronics and Communication,

More information

Improving Amplifier Voltage Gain

Improving Amplifier Voltage Gain 15.1 Multistage ac-coupled Amplifiers 1077 TABLE 15.3 Three-Stage Amplifier Summary HAND ANALYSIS SPICE RESULTS Voltage gain 998 1010 Input signal range 92.7 V Input resistance 1 M 1M Output resistance

More information

An Improved Bandgap Reference (BGR) Circuit with Constant Voltage and Current Outputs

An Improved Bandgap Reference (BGR) Circuit with Constant Voltage and Current Outputs International Journal of Research in Engineering and Innovation Vol-1, Issue-6 (2017), 60-64 International Journal of Research in Engineering and Innovation (IJREI) journal home page: http://www.ijrei.com

More information

Design and implementation of two stage operational amplifier

Design and implementation of two stage operational amplifier Design and implementation of two stage operational amplifier Priyanka T 1, Dr. H S Aravind 2, Yatheesh Hg 3 1M.Tech student, Dept, of ECE JSSATE Bengaluru 2Professor and HOD, Dept, of ECE JSSATE Bengaluru

More information

Lecture 350 Low Voltage Op Amps (3/26/02) Page 350-1

Lecture 350 Low Voltage Op Amps (3/26/02) Page 350-1 Lecture 350 Low Voltage Op Amps (3/26/02) Page 3501 LECTURE 350 LOW VOLTAGE OP AMPS (READING: AH 415432) Objective The objective of this presentation is: 1.) How to design standard circuit blocks with

More information

Low Power Op-Amp Based on Weak Inversion with Miller-Cascoded Frequency Compensation

Low Power Op-Amp Based on Weak Inversion with Miller-Cascoded Frequency Compensation Low Power Op-Amp Based on Weak Inversion with Miller-Cascoded Frequency Compensation Maryam Borhani, Farhad Razaghian Abstract A design for a rail-to-rail input and output operational amplifier is introduced.

More information

A low voltage rail-to-rail operational amplifier with constant operation and improved process robustness

A low voltage rail-to-rail operational amplifier with constant operation and improved process robustness Graduate Theses and Dissertations Graduate College 2009 A low voltage rail-to-rail operational amplifier with constant operation and improved process robustness Rien Lerone Beal Iowa State University Follow

More information

PART. Maxim Integrated Products 1

PART. Maxim Integrated Products 1 - + 9-; Rev ; / Low-Cost, High-Slew-Rate, Rail-to-Rail I/O Op Amps in SC7 General Description The MAX9/MAX9/MAX9 single/dual/quad, low-cost CMOS op amps feature Rail-to-Rail input and output capability

More information

Lecture 20: Passive Mixers

Lecture 20: Passive Mixers EECS 142 Lecture 20: Passive Mixers Prof. Ali M. Niknejad University of California, Berkeley Copyright c 2005 by Ali M. Niknejad A. M. Niknejad University of California, Berkeley EECS 142 Lecture 20 p.

More information

DAT175: Topics in Electronic System Design

DAT175: Topics in Electronic System Design DAT175: Topics in Electronic System Design Analog Readout Circuitry for Hearing Aid in STM90nm 21 February 2010 Remzi Yagiz Mungan v1.10 1. Introduction In this project, the aim is to design an adjustable

More information

Chapter 13: Introduction to Switched- Capacitor Circuits

Chapter 13: Introduction to Switched- Capacitor Circuits Chapter 13: Introduction to Switched- Capacitor Circuits 13.1 General Considerations 13.2 Sampling Switches 13.3 Switched-Capacitor Amplifiers 13.4 Switched-Capacitor Integrator 13.5 Switched-Capacitor

More information

Operational Amplifier Bandwidth Extension Using Negative Capacitance Generation

Operational Amplifier Bandwidth Extension Using Negative Capacitance Generation Brigham Young University BYU ScholarsArchive All Theses and Dissertations 2006-07-06 Operational Amplifier Bandwidth Extension Using Negative Capacitance Generation Adrian P. Genz Brigham Young University

More information

Amplifier Frequency Response, Feedback, Oscillations; Op-Amp Block Diagram and Gain-Bandwidth Product

Amplifier Frequency Response, Feedback, Oscillations; Op-Amp Block Diagram and Gain-Bandwidth Product Amplifier Frequency Response, Feedback, Oscillations; Op-Amp Block Diagram and Gain-Bandwidth Product Physics116A,12/4/06 Draft Rev. 1, 12/12/06 D. Pellett 2 Negative Feedback and Voltage Amplifier AB

More information

Low-Noise Amplifiers

Low-Noise Amplifiers 007/Oct 4, 31 1 General Considerations Noise Figure Low-Noise Amplifiers Table 6.1 Typical LNA characteristics in heterodyne systems. NF IIP 3 db 10 dbm Gain 15 db Input and Output Impedance 50 Ω Input

More information

A high-speed CMOS current op amp for very low supply voltage operation

A high-speed CMOS current op amp for very low supply voltage operation Downloaded from orbit.dtu.dk on: Mar 31, 2018 A high-speed CMOS current op amp for very low supply voltage operation Bruun, Erik Published in: Proceedings of the IEEE International Symposium on Circuits

More information

University of Southern California School Of Engineering Department Of Electrical Engineering

University of Southern California School Of Engineering Department Of Electrical Engineering University of Southern California School Of Engineering Department Of Electrical Engineering EE 448: Homework Assignment #02 Fall, 2001 ( Assigned 09/10/01; Due 09/19/01) Choma Problem #05: n an attempt

More information

The Miller Approximation. CE Frequency Response. The exact analysis is worked out on pp of H&S.

The Miller Approximation. CE Frequency Response. The exact analysis is worked out on pp of H&S. CE Frequency Response The exact analysis is worked out on pp. 639-64 of H&S. The Miller Approximation Therefore, we consider the effect of C µ on the input node only V ---------- out V s = r g π m ------------------

More information

Design and Simulation of Low Dropout Regulator

Design and Simulation of Low Dropout Regulator Design and Simulation of Low Dropout Regulator Chaitra S Kumar 1, K Sujatha 2 1 MTech Student, Department of Electronics, BMSCE, Bangalore, India 2 Assistant Professor, Department of Electronics, BMSCE,

More information

Atypical op amp consists of a differential input stage,

Atypical op amp consists of a differential input stage, IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 33, NO. 6, JUNE 1998 915 Low-Voltage Class Buffers with Quiescent Current Control Fan You, S. H. K. Embabi, and Edgar Sánchez-Sinencio Abstract This paper presents

More information

Multistage Amplifiers

Multistage Amplifiers Multistage Amplifiers Single-stage transistor amplifiers are inadequate for meeting most design requirements for any of the four amplifier types (voltage, current, transconductance, and transresistance.)

More information

Microelectronic Devices and Circuits Lecture 22 - Diff-Amp Anal. III: Cascode, µa Outline Announcements DP:

Microelectronic Devices and Circuits Lecture 22 - Diff-Amp Anal. III: Cascode, µa Outline Announcements DP: 6.012 Microelectronic Devices and Circuits Lecture 22 DiffAmp Anal. III: Cascode, µa741 Outline Announcements DP: Discussion of Q13, Q13' impact. Gain expressions. Review Output Stages DC Offset of an

More information

Low Cost, General Purpose High Speed JFET Amplifier AD825

Low Cost, General Purpose High Speed JFET Amplifier AD825 a FEATURES High Speed 41 MHz, 3 db Bandwidth 125 V/ s Slew Rate 8 ns Settling Time Input Bias Current of 2 pa and Noise Current of 1 fa/ Hz Input Voltage Noise of 12 nv/ Hz Fully Specified Power Supplies:

More information

MCP6031/2/3/ µa, High Precision Op Amps. Features. Description. Applications. Design Aids. Package Types. Typical Application

MCP6031/2/3/ µa, High Precision Op Amps. Features. Description. Applications. Design Aids. Package Types. Typical Application 0.9 µa, High Precision Op Amps Features Rail-to-Rail Input and Output Low Offset Voltage: ±150 µv (maximum) Ultra Low Quiescent Current: 0.9 µa Wide Power Supply Voltage: 1.8V to 5.5V Gain Bandwidth Product:

More information

Lecture 3 Switched-Capacitor Circuits Trevor Caldwell

Lecture 3 Switched-Capacitor Circuits Trevor Caldwell Advanced Analog Circuits Lecture 3 Switched-Capacitor Circuits Trevor Caldwell trevor.caldwell@analog.com Lecture Plan Date Lecture (Wednesday 2-4pm) Reference Homework 2017-01-11 1 MOD1 & MOD2 ST 2, 3,

More information

A High-Gain, Low-Power CMOS Operational Amplifier Using Composite Cascode Stage in the Subthreshold Region

A High-Gain, Low-Power CMOS Operational Amplifier Using Composite Cascode Stage in the Subthreshold Region Brigham Young University BYU ScholarsArchive All Theses and Dissertations 2011-03-15 A High-Gain, Low-Power CMOS Operational Amplifier Using Composite Cascode Stage in the Subthreshold Region Rishi Pratap

More information

High Gain Low Power Operational Amplifier Design and Compensation Techniques

High Gain Low Power Operational Amplifier Design and Compensation Techniques Brigham Young University BYU ScholarsArchive All Theses and Dissertations 2007-02-14 High Gain Low Power Operational Amplifier Design and Compensation Techniques Lisha Li Brigham Young University - Provo

More information

Low voltage, low power, bulk-driven amplifier

Low voltage, low power, bulk-driven amplifier University of Arkansas, Fayetteville ScholarWorks@UARK Electrical Engineering Undergraduate Honors Theses Electrical Engineering 5-2009 Low voltage, low power, bulk-driven amplifier Shama Huda University

More information

Example #6 1. An amplifier with a nominal gain

Example #6 1. An amplifier with a nominal gain 1. An amplifier with a nominal gain A=1000 V/V exhibits a gain change of 10% as the operating temperature changes from 25 o C to 75 o C. If it is required to constrain the change to 0.1% by applying negative

More information

Single Supply, Rail to Rail Low Power FET-Input Op Amp AD820

Single Supply, Rail to Rail Low Power FET-Input Op Amp AD820 a FEATURES True Single Supply Operation Output Swings Rail-to-Rail Input Voltage Range Extends Below Ground Single Supply Capability from + V to + V Dual Supply Capability from. V to 8 V Excellent Load

More information

2. Single Stage OpAmps

2. Single Stage OpAmps /74 2. Single Stage OpAmps Francesc Serra Graells francesc.serra.graells@uab.cat Departament de Microelectrònica i Sistemes Electrònics Universitat Autònoma de Barcelona paco.serra@imb-cnm.csic.es Integrated

More information

Design of a Folded Cascode Operational Amplifier in a 1.2 Micron Silicon-Carbide CMOS Process

Design of a Folded Cascode Operational Amplifier in a 1.2 Micron Silicon-Carbide CMOS Process University of Arkansas, Fayetteville ScholarWorks@UARK Electrical Engineering Undergraduate Honors Theses Electrical Engineering 5-2017 Design of a Folded Cascode Operational Amplifier in a 1.2 Micron

More information

Low Dropout Voltage Regulator Operation and Performance Review

Low Dropout Voltage Regulator Operation and Performance Review Low Drop Voltage Regulator peration and Performance Review Eric Chen & Alex Leng ntroduction n today s power management systems, high power efficiency becomes necessary to maximize the lifetime of the

More information

Rail to rail CMOS complementary input stage with only one active differential pair at a time

Rail to rail CMOS complementary input stage with only one active differential pair at a time LETTER IEICE Electronics Express, Vol.11, No.12, 1 5 Rail to rail CMOS complementary input stage with only one active differential pair at a time Maria Rodanas Valero 1a), Alejandro Roman-Loera 2, Jaime

More information

Tuesday, February 1st, 9:15 12:00. Snorre Aunet Nanoelectronics group Department of Informatics University of Oslo

Tuesday, February 1st, 9:15 12:00. Snorre Aunet Nanoelectronics group Department of Informatics University of Oslo Bandgap references, sampling switches Tuesday, February 1st, 9:15 12:00 Snorre Aunet (sa@ifi.uio.no) Nanoelectronics group Department of Informatics University of Oslo Outline Tuesday, February 1st 11.11

More information

High Gain Amplifier Design for Switched-Capacitor Circuit Applications

High Gain Amplifier Design for Switched-Capacitor Circuit Applications IOSR Journal of VLSI and Signal Processing (IOSR-JVSP) Volume 7, Issue 5, Ver. I (Sep.-Oct. 2017), PP 62-68 e-issn: 2319 4200, p-issn No. : 2319 4197 www.iosrjournals.org High Gain Amplifier Design for

More information

Chapter 9: Operational Amplifiers

Chapter 9: Operational Amplifiers Chapter 9: Operational Amplifiers The Operational Amplifier (or op-amp) is the ideal, simple amplifier. It is an integrated circuit (IC). An IC contains many discrete components (resistors, capacitors,

More information

DESIGN AND VERIFICATION OF ANALOG PHASE LOCKED LOOP CIRCUIT

DESIGN AND VERIFICATION OF ANALOG PHASE LOCKED LOOP CIRCUIT DESIGN AND VERIFICATION OF ANALOG PHASE LOCKED LOOP CIRCUIT PRADEEP G CHAGASHETTI Mr. H.V. RAVISH ARADHYA Department of E&C Department of E&C R.V.COLLEGE of ENGINEERING R.V.COLLEGE of ENGINEERING Bangalore

More information

Common-Source Amplifiers

Common-Source Amplifiers Lab 2: Common-Source Amplifiers Introduction The common-source stage is the most basic amplifier stage encountered in CMOS analog circuits. Because of its very high input impedance, moderate-to-high gain,

More information

16 V, 1 MHz, CMOS Rail-to-Rail Input/Output Operational Amplifier ADA4665-2

16 V, 1 MHz, CMOS Rail-to-Rail Input/Output Operational Amplifier ADA4665-2 6 V, MHz, CMOS Rail-to-Rail Input/Output Operational Amplifier ADA4665-2 FEATURES Lower power at high voltage: 29 μa per amplifier typical Low input bias current: pa maximum Wide bandwidth:.2 MHz typical

More information

Gechstudentszone.wordpress.com

Gechstudentszone.wordpress.com 8.1 Operational Amplifier (Op-Amp) UNIT 8: Operational Amplifier An operational amplifier ("op-amp") is a DC-coupled high-gain electronic voltage amplifier with a differential input and, usually, a single-ended

More information

Unit 3: Integrated-circuit amplifiers (contd.)

Unit 3: Integrated-circuit amplifiers (contd.) Unit 3: Integrated-circuit amplifiers (contd.) COMMON-SOURCE AND COMMON-EMITTER AMPLIFIERS The Common-Source Circuit The most basic IC MOS amplifier is shown in fig.(1). The source of MOS transistor is

More information

Ultra Low-voltage Multiple-loop Feedback Switched-capacitor Filters

Ultra Low-voltage Multiple-loop Feedback Switched-capacitor Filters Ultra Low-voltage Multiple-loop Feedback Switched-capacitor Filters By Udhayasimha Puttamreddy Submitted in partial fulfilment of the requirements For the degree of Master of Applied Science At Dalhousie

More information

Constant Current Control for DC-DC Converters

Constant Current Control for DC-DC Converters APPLICATION NOTE AN:211 Constant Current Control for DC-DC Converters Contents Page Introduction 1 Theory of Operation 1 Power Limitations 2 Voltage Loop Stability 2 Current Control Example 7 Component

More information

ISSN:

ISSN: 468 Modeling and Design of a CMOS Low Drop-out (LDO) Voltage Regulator PRIYADARSHINI JAINAPUR 1, CHIRAG SHARMA 2 1 Department of E&CE, Nitte Meenakshi Institute of Technology, Yelahanka, Bangalore-560064,

More information

Design of Pipeline Analog to Digital Converter

Design of Pipeline Analog to Digital Converter Design of Pipeline Analog to Digital Converter Vivek Tripathi, Chandrajit Debnath, Rakesh Malik STMicroelectronics The pipeline analog-to-digital converter (ADC) architecture is the most popular topology

More information

Experiment 8 Frequency Response

Experiment 8 Frequency Response Experiment 8 Frequency Response W.T. Yeung, R.A. Cortina, and R.T. Howe UC Berkeley EE 105 Spring 2005 1.0 Objective This lab will introduce the student to frequency response of circuits. The student will

More information

Tradeoffs and Optimization in Analog CMOS Design

Tradeoffs and Optimization in Analog CMOS Design Tradeoffs and Optimization in Analog CMOS Design David M. Binkley University of North Carolina at Charlotte, USA A John Wiley & Sons, Ltd., Publication Contents Foreword Preface Acknowledgmerits List of

More information

856 Feedback Networks: Theory and Circuit Applications. Butterworth MFM response, 767 Butterworth response, 767

856 Feedback Networks: Theory and Circuit Applications. Butterworth MFM response, 767 Butterworth response, 767 Index I/O transfer admittance, 448 N stage cascade, 732, 734 S-parameter characterization, 226 ω max, 204 π-type, 148 π-type network model, 137 c-parameter, 151, 153 c-parameter matrix, 154 g-parameter

More information

LOW-VOLTAGE, CLASS AB AND HIGH SLEW-RATE TWO STAGE OPERATIONAL AMPLIFIERS. CARLOS FERNANDO NIEVA-LOZANO, B.Sc.E.E

LOW-VOLTAGE, CLASS AB AND HIGH SLEW-RATE TWO STAGE OPERATIONAL AMPLIFIERS. CARLOS FERNANDO NIEVA-LOZANO, B.Sc.E.E LOW-VOLTAGE, CLASS AB AND HIGH SLEW-RATE TWO STAGE OPERATIONAL AMPLIFIERS BY CARLOS FERNANDO NIEVA-LOZANO, B.Sc.E.E A thesis submitted to the Graduate School in partial fulfillment of the requirements

More information

IN RECENT years, low-dropout linear regulators (LDOs) are

IN RECENT years, low-dropout linear regulators (LDOs) are IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II: EXPRESS BRIEFS, VOL. 52, NO. 9, SEPTEMBER 2005 563 Design of Low-Power Analog Drivers Based on Slew-Rate Enhancement Circuits for CMOS Low-Dropout Regulators

More information

Constant-Gm, Rail-to-Rail Input Stage Operational Amplifier in 0.35μm CMOS

Constant-Gm, Rail-to-Rail Input Stage Operational Amplifier in 0.35μm CMOS 2011 International Conference on Network and Electronics Engineering IPCSIT vol.11 (2011) (2011) IACSIT Press, Singapore Constant-Gm, Rail-to-Rail Input Stage Operational Amplifier in 0.35μm CMOS Ali Hassanzadeh¹,

More information

Research Article Volume 6 Issue No. 12

Research Article Volume 6 Issue No. 12 ISSN XXXX XXXX 2016 IJESC Research Article Volume 6 Issue No. 12 A Fully-Integrated Low-Dropout Regulator with Full Spectrum Power Supply Rejection Muthya la. Manas a 1, G.Laxmi 2, G. Ah med Zees han 3

More information

Self-Biased PLL/DLL. ECG minute Final Project Presentation. Wenlan Wu Electrical and Computer Engineering University of Nevada Las Vegas

Self-Biased PLL/DLL. ECG minute Final Project Presentation. Wenlan Wu Electrical and Computer Engineering University of Nevada Las Vegas Self-Biased PLL/DLL ECG721 60-minute Final Project Presentation Wenlan Wu Electrical and Computer Engineering University of Nevada Las Vegas Outline Motivation Self-Biasing Technique Differential Buffer

More information

Due to the absence of internal nodes, inverter-based Gm-C filters [1,2] allow achieving bandwidths beyond what is possible

Due to the absence of internal nodes, inverter-based Gm-C filters [1,2] allow achieving bandwidths beyond what is possible A Forward-Body-Bias Tuned 450MHz Gm-C 3 rd -Order Low-Pass Filter in 28nm UTBB FD-SOI with >1dBVp IIP3 over a 0.7-to-1V Supply Joeri Lechevallier 1,2, Remko Struiksma 1, Hani Sherry 2, Andreia Cathelin

More information

CMOS Operational Amplifier

CMOS Operational Amplifier The George Washington University Department of Electrical and Computer Engineering Course: ECE218 Instructor: Mona E. Zaghloul Students: Shunping Wang Yiping (Neil) Tsai Data: 05/14/07 Introduction In

More information

Linear Regulators: Theory of Operation and Compensation

Linear Regulators: Theory of Operation and Compensation Linear Regulators: Theory of Operation and Compensation Introduction The explosive proliferation of battery powered equipment in the past decade has created unique requirements for a voltage regulator

More information

LOW SUPPLY VOLTAGE, LOW NOISE FULLY DIFFERENTIAL PROGRAMMABLE GAIN AMPLIFIERS

LOW SUPPLY VOLTAGE, LOW NOISE FULLY DIFFERENTIAL PROGRAMMABLE GAIN AMPLIFIERS LOW SUPPLY VOLTAGE, LOW NOISE FULLY DIFFERENTIAL PROGRAMMABLE GAIN AMPLIFIERS A. Pleteršek, D. Strle, J. Trontelj Microelectronic Laboratory University of Ljubljana, Tržaška 25, 61000 Ljubljana, Slovenia

More information