ANALYSIS AND DESIGN OF ANALOG INTEGRATED CIRCUITS

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1 ANALYSIS AND DESIGN OF ANALOG INTEGRATED CIRCUITS Fourth Edition PAUL R. GRAY University of California, Berkeley PAUL J. HURST University of California, Davis STEPHEN H. LEWIS University of California, Davis ROBERT G.MEYER University of California, Berkeley JOHN WILEY& SONS, INC. New York / Chichester / Weinheim / Brisbane / Singapore / Toronto
2 CHAPTER 1 Models for IntegratedCircuit Active Devices l 1.1 Introduction 1» 1.2 Depletion Region of a pn Junction DepletionRegion Capacitance Junction Breakdown LargeSignal Behavior of Bipolar Transistors LargeSignal Models in the ForwardActive Region Effects of Collector Voltage on LargeSignal Characteristics in the ForwardActive Region Saturation and Inverse Active Regions Transistor Breakdown Voltages Dependence of Transistor Currcnt Gain ß F on Operating Conditions SmallSignal Models of Bipolar Transistors Transconductance BaseCharging Capacitance Input Resistance Output Resistance Basic SmallSignal Model of the Bipolar Transistor CollectorBase Resistance Parasitic Elements in the SmallSignal Model Specification of Transistor Frequency Response Large Signal Behavior of MetalOxideSemiconductor FieldEffect Transistors Transfer Characteristics of MOS Devices Comparison of Operating Regions of Bipolar and MOS Transistors Decomposition of GateSource Voltage Threshold Temperature Dependence MOS Device Voltage Limitations SmallSignal Models of the MOS Transistors Transconductance Intrinsic GateSource and GateDrain Capacitance Input Resistance Output Resistance Basic SmallSignal Model of the MOS Transistor Body Transconductance Parasitic Elements in the SmallSignal Model MOS Transistor Frequency Response ShortChannel Effects in MOS Transistors Velocity Saturation from the Horizontal Field Transconductance and Transition Frequency Mobility Degradation from the Vertical Field Weak Inversion in MOS Transistors Drain Current in Weak Inversion Transconductance and Transition Frequency in Weak Inversion Substrate Current Flow in MOS Transistors 71 A.l.l Summary of ActiveDevice Parameters 73 x
3 xi CHAPTER 2 Bipolar, MOS, and BiCMOS IntegratedCircuit Technology Introduction Basic Processes in IntegratedCircuit Fabrication Electrical Resistivity of Silicon SolidState Diffusion Electrical Properties of Diffused Layers Photolithography Epitaxial Growth Ion Implantation Local Oxidation Polysilicon Deposition HighVoltage Bipolar IntegratedCircuit Fabrication Advanced Bipolar IntegratedCircuit Fabrication Active Devices in Bipolar Analog Integrated Circuits IntegratedCircuit npn Transistor IntegratedCircuit pnp Transistors Passive Components in Bipolar Integrated Circuits Diffused Resistors Epitaxial and Epitaxial Pinch Resistors IntegratedCircuit Capacitors Zener Diodes Junction Diodes Modifications to the Basic Bipolar Process Dielectric Isolation Compatible Processing for HighPerformance Active Devices HighPerformance Passive Components MOS IntegratedCircuit Fabrication Active Devices in MOS Integrated Circuits nchannel Transistors pchanncl Transistors Depletion Devices Bipolar Transistors Passive Components in MOS Technology Resistors Capacitors in MOS Technology Latchup in CMOS Technology BiCMOS Technology Heterojunction Bipolar Transistors Interconnect Delay Economics of IntegratedCircuit Fabrication Yield Considerations in IntegratedCircuit Fabrication Cost Considerations in IntegratedCircuit Fabrication Packaging Considerations for Integrated Circuits Maximum Power Dissipation Reliability Considerations in IntegratedCircuit Packaging 162 A.2.1 SPICE ModelParameter Files 163 CHAPTER 3 SingleTransistor and MultipleTransistor Amplifiers Device Model Selection for Approximate Analysis of Analog Circuits TwoPort Modeling of Amplifiers Basic SingleTransistor Amplifier Stages CommonEmitter Configuration CommonSourcc Configuration CommonBase Configuration CommonGate Configuration 186
4 xii Contents CommonBase and CommonGate Configurations with Finite r CommonB ase and CommonGate Input Resistance CommonBase and CommonGate Output Resistance CommonCollector Configuration (Emitter Folio wer) CommonDrain Configuration (Source Fdllower) CommonErrTitter Amplifier with Emitter Degeneration CommonSource Amplifier with Source Degeneration MultipleTransistor Amplifier Stages The CCCE, CCCC, and Darlington Configurations The Cascode Configuration The Bipolar Cascode The MOS Cascode The Active Cascode The Super Source Follower Differential Pairs The de Transfer Characteristic of an EmitterCoupled Pair The de Transfer Characteristic with Emitter Degeneration The de Transfer Characteristic of a SourceCoupled Pair Introduction to the SmallSignal Analysis of Differential Amplifiers SmallSignal Characteristics of Balanccd Differential Amplifiers Device Mismatch Effects in Differential Amplifiers Input Offset Voltage and Current Input Offset Voltage of the EmitterCouplcd Pair Offset Voltage of the EmitterCoupled Pair: Approximate Analysis Offset Voltage Drift in the EmitterCoupled Pair Input Offset Current of the EmitterCoupled Pair Input Offset Voltage of the SourceCoupled Pair Offset Voltage of the SourceCoupled Pair: Approximate Analysis Offset Voltage Drift in the SourceCoupled Pair SmallSignal Characteristics of Unbalanced Differential Amplifiers 238 A.3.1 Elementary Statistics and the Gaussian Distribution 246 CHAPTER 4 Current Mirrors, Active Loads, and References Introduction Current Mirrors General Properties Simple Current Mirror Bipolar MOS Simple Current Mirror with Beta Helper Bipolar MOS Simple Current Mirror with Degeneration Bipolar MOS Cascode Current Mirror Bipolar MOS Wilson Current Mirror Bipolar MOS Active Loads Motivation CommonEmitter/ComrnonSource Amplifier with Complementary Load CommonEmitter/CommonSource Amplifier with Depletion Load 282
5 xiii CommonEmitter/CommonSource Amplifier with DiodeConnected Load Differential Pair with CurrentMirror Load LargeSignal Analysis SmallSignal Analysis CommonMode Rejection Ratio 293, 4.4 Voltage and Current References LowCurrent Biasing Bipolar Widlar Current Source MOS Widlar Current Source Bipolar Peaking Current Source MOS Peaking Current Source SupplyInsensitive Biasing Widlar Current Sources Current Sources Using Other Voltage Standards Seif Biasing TemperatureInsensitive Biasing BandGapReferenced Bias Circuits in Bipolar Technology BandGapReferenced Bias Circuits in CMOS Technology 323 A.4.1 Matching Considerations in Current Mirrors 327 A Bipolar 327 A.4.1.2MOS 329 A.4.2 Input Offset Voltage of Differential Pair with Active Load 332 A Bipolar 332 A MOS 334 CHAPTER 5 Output Stages Introduction The Emitter Folio wer As an Output Stage Transfer Characteristics of the EmitterFollower Power Output and Efficiency EmitterFollower Drive Requirements SmallSignal Properties of the Emitter Follower The Source Follower As an Output Stage Transfer Characteristics of the Source Follower Distortion in the Source Follower Class B PushPull Output Stage Transfer Characteristic of the Class B Stage Power Output and Efficiency of the Class B Stage Practical Realizations of Class B Complementary Output Stages All«/?«Class B Output Stage QuasiComplementary Output Stages Overload Protection CMOS Class AB Output Stages CommonDrain Configuration CommonSource Configuration with Error Amplifiers Alternative Configurations Combined CommonDrain CommonSource Configuration Combined CommonDrain CommonSource Configuration with High Swing Parallel CommonSource Configuration 394 CHAPTER 6 Operational Amplifiers with SingleEnded Outputs Applications of Operational Amplifiers 405
6 XIV Contents Basic Feedback Concepts Inverting Amplifier Noninverting Amplifier Differential Amplifier Nonlinear Analog Operations Integrator, Differentiator Internal Amplifiers SwitchedCapacitor Amplifier SwitchedCapacitor Integrator Deviations from Ideality in Real Operational Amplifiers Input Bias Current Input Offset Current Input Offset Voltage CommonMode Input Range CommonMode Rejection Ratio (CMRR) PowerSupply Rejection Ratio (PSRR) Input Resistance Output Resistance Frequency Response OperationalAmplifier Equivalent Circuit Basic TwoStage MOS Operational Amplifiers Input Resistance, Output Resistance, and OpenCircuit Voltage Gain Output Swing Input Offset Voltage CommonMode Rejection Ratio CommonMode Input Range PowerSupply Rejection Ratio (PSRR) Effect of Overdrive Voltages Layout Considerations TwoStage MOS Operational Amplifiers with Cascodes MOS TelescopicCascode Operational Amplifiers MOS FoldedCascode Operational Amplifiers MOS ActiveCascode Operational Amplifiers Bipolar Operational Amplifiers The de Analysis of the 741 Operational Amplifier SmallSignal Analysis of the 741 Operational Amplifier Input Offset Voltage, Input Offset Current, and CommonMode Rejection Ratio of the Design Considerations for Bipolar Monolithic Operational Amplifiers Design of LowDrift Operational Amplifiers Design of LowInputCurrent Operational Amplifiers 476 CHAPTER 7 Frequency Response of Integrated Circuits Introduction SingleStage Amplifiers SingleStage Voltage Amplifiers and The Miller Effect The Bipolar Differential Amplifier: Differential Mode Gain The MOS Differential Amplifier: Differential Mode Gain Frequency Response of the CommonMode Gain for a Differential Amplifier Frequency Response of Voltage Buffers Frequency Response of the Emitter Follower Frequency Response of the Source Follower Frequency Response of Current Buffers CommonBaseAmplifier Frequency Response CommonGateAmplifier Frequency Response 515
7 xv 7.3 Multistage Amplifier Frequency Response DominantPolc Approximation ZeroValue Time Constant Analysis Cascode VoltageAmplifier Frequency Response Cascode Frequency Response 525» Frequency Response of a Current «Mirror Loading a Differential Pair ShortCircuit Time Constants Analysis of the Frequency Response of the 741 Op Amp HighFrequency Equivaient Circuit of the Calculation of the 3dB Frequency of the Nondominant Poles of the Relation Between Frequency Response and Time Response 542 CHAPTER 8 Feedback Ideal Feedback Equation Gain Sensitivity Effect of Negative Feedback on Distortion Feedback Configurations SeriesShunt Feedback ShuntShunt Feedback ShuntSeries Feedback SeriesSeries Feedback Practical Configurations and the Effect of Loading ShuntShunt Feedback SeriesSeries Feedback SeriesShunt Feedback ShuntSeries Feedback Summary SingleStage Feedback Local Series Feedback Local Shunt Feedback The Voltage Regulator as a Feedback Circuit Feedback Circuit Analysis Using Return Ratio ClosedLoop Gain Using Return Ratio ClosedLoop Impedance Formula Using Return Ratio Summary ReturnRatio Analysis Modeling Input and Output Ports in Feedback Circuits 613 CHAPTER 9 Frequency Response and Stability of Feedback Amplifiers Introduction Relation Between Gain and Bandwidth in Feedback Amplifiers Instability and the Nyquist Criterion Compensation Theory of Compensation Methods of Compensation TwoStage MOS Amplifier Compensation Compensation of SingleStage CMOS OP Amps Nested Miller Compensation RootLocus Techniques Root Locus for a ThreePole Transfer Function Rules for RootLocus Construction Root Locus for DominantPolc Compensation Root Locus for FecdbackZero Compensation Slew Rate Origin of SlewRate Limitations Methods of Improving SlewRate 684
8 xvi Contents Improving SlewRate in Bipolar Op Amps Improving SlewRate in MOS Op Amps Effect of SlewRate Limitations on LargeSignal Sinusoidal Performance 690 A.9.1 Analysis in Terms of ReturnRatio Parameters 691 A.9.2 Roots of a Quadratic Equation 692 CHAPTER 10 Nonlinear Analog Circuits Introduction Precision Rectification Analog Multipliers Employing the Bipolar Transistor The EmitterCoupled Pair as a Simple Multiplier The de Analysis of the Gilbert Multiplier Cell The Gilbert Cell as an Analog Multiplier A Complete Analog Multiplier The Gilbert Multiplier Cell as a Balanced Modulator and Phase Dectector PhaseLocked Loops (PLL) PhaseLocked Loop Concepts The PhaseLocked Loop in the Locked Condition IntegratedCircuit PhaseLocked Loops Analysis of the 560B Monolithic PhaseLocked Loop Nonlinear Function Symbols 743 CHAPTER 11 Noise in Integrated Circuits Introduction Sources of Noise Shot Noise Thermal Noise Flicker Noise (l/f Noise) Burst Noise (Popcorn Noise) Avalanche Noise Noise Models of IntegratedCircuit Components Junction Diode Bipolar Transistor MOS Transistor Resistors Capacitors and Inductors Circuit Noise Calculations Bipolar Transistor Noise Performance Equivalent Input Noise and the Minimum Detectable Signal Equivalent Input Noise Generators Bipolar Transistor Noise Generators MOS Transistor Noise Generators Effect of Feedback on Noise Performance Effect of Ideal Feedback on Noise Performance Effect of Practical Feedback on Noise Performance Noise Performance of Other Transistor Configurations CommonBase Stage Noise Performance EmitterFollower Noise Performance DifferentialPair Noise Performance Noise in Operational Ampliners Noise Bandwidth Noise Figure and Noise Temperature Noise Figure Noise Temperature 802
9 xvii CHAPTER 12 Fully Differential Operational Amplifiers Introduction Properties of Fully Differential Amplifiers SmallSignal Models for Balanced Differential Amplifiers CommonMode Feedback CommonMode Feedback at Low Frequencies Stability and Compensation Considerations in a CMFB Loop CMFB Circuits CMFB Using Resistive Divider and Amplifier CMFB Using Two Differential Pairs CMFB Using Transistors in the Triode Region SwitchedCapacitor CMFB Fully Differential Op Amps A Fully Differential TwoStage Op Amp Fully Differential Telescopic Cascode Op Amp Fully Differential FoldedCascode Op Amp A Differential Op Amp with Two Differential Input Stages Neutralization Unbalanced Fully Differential Circuits Bandwidth of the CMFB Loop 856 Index 865
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