ANALYSIS AND DESIGN OF ANALOG INTEGRATED CIRCUITS

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1 ANALYSIS AND DESIGN OF ANALOG INTEGRATED CIRCUITS Fourth Edition PAUL R. GRAY University of California, Berkeley PAUL J. HURST University of California, Davis STEPHEN H. LEWIS University of California, Davis ROBERT G.MEYER University of California, Berkeley JOHN WILEY& SONS, INC. New York / Chichester / Weinheim / Brisbane / Singapore / Toronto

2 CHAPTER 1 Models for Integrated-Circuit Active Devices l 1.1 Introduction 1» 1.2 Depletion Region of a pn Junction Depletion-Region Capacitance Junction Breakdown Large-Signal Behavior of Bipolar Transistors Large-Signal Models in the Forward-Active Region Effects of Collector Voltage on Large-Signal Characteristics in the Forward-Active Region Saturation and Inverse Active Regions Transistor Breakdown Voltages Dependence of Transistor Currcnt Gain ß F on Operating Conditions Small-Signal Models of Bipolar Transistors Transconductance Base-Charging Capacitance Input Resistance Output Resistance Basic Small-Signal Model of the Bipolar Transistor Collector-Base Resistance Parasitic Elements in the Small-Signal Model Specification of Transistor Frequency Response Large Signal Behavior of Metal-Oxide-Semiconductor Field-Effect Transistors Transfer Characteristics of MOS Devices Comparison of Operating Regions of Bipolar and MOS Transistors Decomposition of Gate-Source Voltage Threshold Temperature Dependence MOS Device Voltage Limitations Small-Signal Models of the MOS Transistors Transconductance Intrinsic Gate-Source and Gate-Drain Capacitance Input Resistance Output Resistance Basic Small-Signal Model of the MOS Transistor Body Transconductance Parasitic Elements in the Small-Signal Model MOS Transistor Frequency Response Short-Channel Effects in MOS Transistors Velocity Saturation from the Horizontal Field Transconductance and Transition Frequency Mobility Degradation from the Vertical Field Weak Inversion in MOS Transistors Drain Current in Weak Inversion Transconductance and Transition Frequency in Weak Inversion Substrate Current Flow in MOS Transistors 71 A.l.l Summary of Active-Device Parameters 73 x

3 xi CHAPTER 2 Bipolar, MOS, and BiCMOS Integrated-Circuit Technology Introduction Basic Processes in Integrated-Circuit Fabrication Electrical Resistivity of Silicon Solid-State Diffusion Electrical Properties of Diffused Layers Photolithography Epitaxial Growth Ion Implantation Local Oxidation Polysilicon Deposition High-Voltage Bipolar Integrated-Circuit Fabrication Advanced Bipolar Integrated-Circuit Fabrication Active Devices in Bipolar Analog Integrated Circuits Integrated-Circuit npn Transistor Integrated-Circuit pnp Transistors Passive Components in Bipolar Integrated Circuits Diffused Resistors Epitaxial and Epitaxial Pinch Resistors Integrated-Circuit Capacitors Zener Diodes Junction Diodes Modifications to the Basic Bipolar Process Dielectric Isolation Compatible Processing for High-Performance Active Devices High-Performance Passive Components MOS Integrated-Circuit Fabrication Active Devices in MOS Integrated Circuits n-channel Transistors p-channcl Transistors Depletion Devices Bipolar Transistors Passive Components in MOS Technology Resistors Capacitors in MOS Technology Latchup in CMOS Technology BiCMOS Technology Heterojunction Bipolar Transistors Interconnect Delay Economics of Integrated-Circuit Fabrication Yield Considerations in Integrated-Circuit Fabrication Cost Considerations in Integrated-Circuit Fabrication Packaging Considerations for Integrated Circuits Maximum Power Dissipation Reliability Considerations in Integrated-Circuit Packaging 162 A.2.1 SPICE Model-Parameter Files 163 CHAPTER 3 Single-Transistor and Multiple-Transistor Amplifiers Device Model Selection for Approximate Analysis of Analog Circuits Two-Port Modeling of Amplifiers Basic Single-Transistor Amplifier Stages Common-Emitter Configuration Common-Sourcc Configuration Common-Base Configuration Common-Gate Configuration 186

4 xii Contents Common-Base and Common-Gate Configurations with Finite r Common-B ase and Common-Gate Input Resistance Common-Base and Common-Gate Output Resistance Common-Collector Configuration (Emitter Folio wer) Common-Drain Configuration (Source Fdllower) Common-ErrTitter Amplifier with Emitter Degeneration Common-Source Amplifier with Source Degeneration Multiple-Transistor Amplifier Stages The CC-CE, CC-CC, and Darlington Configurations The Cascode Configuration The Bipolar Cascode The MOS Cascode The Active Cascode The Super Source Follower Differential Pairs The de Transfer Characteristic of an Emitter-Coupled Pair The de Transfer Characteristic with Emitter Degeneration The de Transfer Characteristic of a Source-Coupled Pair Introduction to the Small-Signal Analysis of Differential Amplifiers Small-Signal Characteristics of Balanccd Differential Amplifiers Device Mismatch Effects in Differential Amplifiers Input Offset Voltage and Current Input Offset Voltage of the Emitter-Couplcd Pair Offset Voltage of the Emitter-Coupled Pair: Approximate Analysis Offset Voltage Drift in the Emitter-Coupled Pair Input Offset Current of the Emitter-Coupled Pair Input Offset Voltage of the Source-Coupled Pair Offset Voltage of the Source-Coupled Pair: Approximate Analysis Offset Voltage Drift in the Source-Coupled Pair Small-Signal Characteristics of Unbalanced Differential Amplifiers 238 A.3.1 Elementary Statistics and the Gaussian Distribution 246 CHAPTER 4 Current Mirrors, Active Loads, and References Introduction Current Mirrors General Properties Simple Current Mirror Bipolar MOS Simple Current Mirror with Beta Helper Bipolar MOS Simple Current Mirror with Degeneration Bipolar MOS Cascode Current Mirror Bipolar MOS Wilson Current Mirror Bipolar MOS Active Loads Motivation Common-Emitter/Comrnon-Source Amplifier with Complementary Load Common-Emitter/Common-Source Amplifier with Depletion Load 282

5 xiii Common-Emitter/Common-Source Amplifier with Diode-Connected Load Differential Pair with Current-Mirror Load Large-Signal Analysis Small-Signal Analysis Common-Mode Rejection Ratio 293, 4.4 Voltage and Current References Low-Current Biasing Bipolar Widlar Current Source MOS Widlar Current Source Bipolar Peaking Current Source MOS Peaking Current Source Supply-Insensitive Biasing Widlar Current Sources Current Sources Using Other Voltage Standards Seif Biasing Temperature-Insensitive Biasing Band-Gap-Referenced Bias Circuits in Bipolar Technology Band-Gap-Referenced Bias Circuits in CMOS Technology 323 A.4.1 Matching Considerations in Current Mirrors 327 A Bipolar 327 A.4.1.2MOS 329 A.4.2 Input Offset Voltage of Differential Pair with Active Load 332 A Bipolar 332 A MOS 334 CHAPTER 5 Output Stages Introduction The Emitter Folio wer As an Output Stage Transfer Characteristics of the Emitter-Follower Power Output and Efficiency Emitter-Follower Drive Requirements Small-Signal Properties of the Emitter Follower The Source Follower As an Output Stage Transfer Characteristics of the Source Follower Distortion in the Source Follower Class B Push-Pull Output Stage Transfer Characteristic of the Class B Stage Power Output and Efficiency of the Class B Stage Practical Realizations of Class B Complementary Output Stages All-«/?«Class B Output Stage Quasi-Complementary Output Stages Overload Protection CMOS Class AB Output Stages Common-Drain Configuration Common-Source Configuration with Error Amplifiers Alternative Configurations Combined Common-Drain Common-Source Configuration Combined Common-Drain Common-Source Configuration with High Swing Parallel Common-Source Configuration 394 CHAPTER 6 Operational Amplifiers with Single-Ended Outputs Applications of Operational Amplifiers 405

6 XIV Contents Basic Feedback Concepts Inverting Amplifier Noninverting Amplifier Differential Amplifier Nonlinear Analog Operations Integrator, Differentiator Internal Amplifiers Switched-Capacitor Amplifier Switched-Capacitor Integrator Deviations from Ideality in Real Operational Amplifiers Input Bias Current Input Offset Current Input Offset Voltage Common-Mode Input Range Common-Mode Rejection Ratio (CMRR) Power-Supply Rejection Ratio (PSRR) Input Resistance Output Resistance Frequency Response Operational-Amplifier Equivalent Circuit Basic Two-Stage MOS Operational Amplifiers Input Resistance, Output Resistance, and Open-Circuit Voltage Gain Output Swing Input Offset Voltage Common-Mode Rejection Ratio Common-Mode Input Range Power-Supply Rejection Ratio (PSRR) Effect of Overdrive Voltages Layout Considerations Two-Stage MOS Operational Amplifiers with Cascodes MOS Telescopic-Cascode Operational Amplifiers MOS Folded-Cascode Operational Amplifiers MOS Active-Cascode Operational Amplifiers Bipolar Operational Amplifiers The de Analysis of the 741 Operational Amplifier Small-Signal Analysis of the 741 Operational Amplifier Input Offset Voltage, Input Offset Current, and Common-Mode Rejection Ratio of the Design Considerations for Bipolar Monolithic Operational Amplifiers Design of Low-Drift Operational Amplifiers Design of Low-Input-Current Operational Amplifiers 476 CHAPTER 7 Frequency Response of Integrated Circuits Introduction Single-Stage Amplifiers Single-Stage Voltage Amplifiers and The Miller Effect The Bipolar Differential Amplifier: Differential- Mode Gain The MOS Differential Amplifier: Differential- Mode Gain Frequency Response of the Common-Mode Gain for a Differential Amplifier Frequency Response of Voltage Buffers Frequency Response of the Emitter Follower Frequency Response of the Source Follower Frequency Response of Current Buffers Common-Base-Amplifier Frequency Response Common-Gate-Amplifier Frequency Response 515

7 xv 7.3 Multistage Amplifier Frequency Response Dominant-Polc Approximation Zero-Value Time Constant Analysis Cascode Voltage-Amplifier Frequency Response Cascode Frequency Response 525» Frequency Response of a Current «Mirror Loading a Differential Pair Short-Circuit Time Constants Analysis of the Frequency Response of the 741 Op Amp High-Frequency Equivaient Circuit of the Calculation of the -3-dB Frequency of the Nondominant Poles of the Relation Between Frequency Response and Time Response 542 CHAPTER 8 Feedback Ideal Feedback Equation Gain Sensitivity Effect of Negative Feedback on Distortion Feedback Configurations Series-Shunt Feedback Shunt-Shunt Feedback Shunt-Series Feedback Series-Series Feedback Practical Configurations and the Effect of Loading Shunt-Shunt Feedback Series-Series Feedback Series-Shunt Feedback Shunt-Series Feedback Summary Single-Stage Feedback Local Series Feedback Local Shunt Feedback The Voltage Regulator as a Feedback Circuit Feedback Circuit Analysis Using Return Ratio Closed-Loop Gain Using Return Ratio Closed-Loop Impedance Formula Using Return Ratio Summary Return-Ratio Analysis Modeling Input and Output Ports in Feedback Circuits 613 CHAPTER 9 Frequency Response and Stability of Feedback Amplifiers Introduction Relation Between Gain and Bandwidth in Feedback Amplifiers Instability and the Nyquist Criterion Compensation Theory of Compensation Methods of Compensation Two-Stage MOS Amplifier Compensation Compensation of Single-Stage CMOS OP Amps Nested Miller Compensation Root-Locus Techniques Root Locus for a Three-Pole Transfer Function Rules for Root-Locus Construction Root Locus for Dominant-Polc Compensation Root Locus for Fecdback-Zero Compensation Slew Rate Origin of Slew-Rate Limitations Methods of Improving Slew-Rate 684

8 xvi Contents Improving Slew-Rate in Bipolar Op Amps Improving Slew-Rate in MOS Op Amps Effect of Slew-Rate Limitations on Large-Signal Sinusoidal Performance 690 A.9.1 Analysis in Terms of Return-Ratio Parameters 691 A.9.2 Roots of a Quadratic Equation 692 CHAPTER 10 Nonlinear Analog Circuits Introduction Precision Rectification Analog Multipliers Employing the Bipolar Transistor The Emitter-Coupled Pair as a Simple Multiplier The de Analysis of the Gilbert Multiplier Cell The Gilbert Cell as an Analog Multiplier A Complete Analog Multiplier The Gilbert Multiplier Cell as a Balanced Modulator and Phase Dectector Phase-Locked Loops (PLL) Phase-Locked Loop Concepts The Phase-Locked Loop in the Locked Condition Integrated-Circuit Phase-Locked Loops Analysis of the 560B Monolithic Phase-Locked Loop Nonlinear Function Symbols 743 CHAPTER 11 Noise in Integrated Circuits Introduction Sources of Noise Shot Noise Thermal Noise Flicker Noise (l/f Noise) Burst Noise (Popcorn Noise) Avalanche Noise Noise Models of Integrated-Circuit Components Junction Diode Bipolar Transistor MOS Transistor Resistors Capacitors and Inductors Circuit Noise Calculations Bipolar Transistor Noise Performance Equivalent Input Noise and the Minimum Detectable Signal Equivalent Input Noise Generators Bipolar Transistor Noise Generators MOS Transistor Noise Generators Effect of Feedback on Noise Performance Effect of Ideal Feedback on Noise Performance Effect of Practical Feedback on Noise Performance Noise Performance of Other Transistor Configurations Common-Base Stage Noise Performance Emitter-Follower Noise Performance Differential-Pair Noise Performance Noise in Operational Ampliners Noise Bandwidth Noise Figure and Noise Temperature Noise Figure Noise Temperature 802

9 xvii CHAPTER 12 Fully Differential Operational Amplifiers Introduction Properties of Fully Differential Amplifiers Small-Signal Models for Balanced Differential Amplifiers Common-Mode Feedback Common-Mode Feedback at Low Frequencies Stability and Compensation Considerations in a CMFB Loop CMFB Circuits CMFB Using Resistive Divider and Amplifier CMFB Using Two Differential Pairs CMFB Using Transistors in the Triode Region Switched-Capacitor CMFB Fully Differential Op Amps A Fully Differential Two-Stage Op Amp Fully Differential Telescopic Cascode Op Amp Fully Differential Folded-Cascode Op Amp A Differential Op Amp with Two Differential Input Stages Neutralization Unbalanced Fully Differential Circuits Bandwidth of the CMFB Loop 856 Index 865

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