Operational Amplifiers

Transcription

1 CHAPTER 9 Operational Amplifiers Analog IC Analysis and Design 9- Chih-Cheng Hsieh

2 Outline. General Consideration. One-Stage Op Amps / Two-Stage Op Amps 3. Gain Boosting 4. Common-Mode Feedback 5. Input Range / Slew Rate 6. Power Supply Rejection / Noise in Op Amps Analog IC Analysis and Design 9- Chih-Cheng Hsieh

3 General Consideration Operational amplifiers (OP amps) are in general part of many analog and mixed-signal systems ranging from DC bias generation to high speed amplification or filtering. Ideal characteristics Very high voltage gain (several hundred thousand). A high open-loop gain is necessary to suppress nonlinearity. High input impedance. Low output impedance. Other considerations Speed. Output voltage swings. Power dissipation. 3

4 Closed-Loop Application The open loop gain of an op amp determines the precision of the feedback system employing the op amp. Vout A R R A V R R R in A R R R R Relative gain error is represented as to get ( R / R ) 0 If A 0 V out R R R V R R A in R R R A / To achieve a gain error less than %, we must have A > 000. With open-loop implementation using common source gain stage. It is extremely difficult to guarantee an error less than %. The variations in the μ n,p and t ox of the transistor and the value of the resistor typically yield an error greater than 0%. R A A R 4

5 OP Properties The small signal bandwidth is usually defined as the unity-gain frequency, f u. Large signal bandwidth OP amps must operate with large transient signals. Nonlinear phenomena make it difficult to characterize the speed by merely small-signal properties such as the open-loop response. Output swings Most systems employing op amps require large voltage swings to accommodate a wide range of signal amplitudes. The need for large output swings has made fully differential op amps quite popular roughly doubling the swing. The maximum voltage swing trades with device size and bias currents and hence speed. 5

6 OP Properties Linearity Open loop op amps suffer from substantial nonlinearity. The issue of nonlinearity is tackled by two approaches Using fully differential implementations to suppress even-order harmonics. Allowing sufficient open-loop gain such that the closed-loop feedback system achieves adequate linearity. Noise and offset The input noise and offset of op amps determine the minimum signal level that can be processed with reasonable quality. Supply rejection Fully differential topologies are preferred. 6

7 Outline. General Consideration. One-Stage Op Amps / Two-Stage Op Amps 3. Gain Boosting 4. Common-Mode Feedback 5. Input Range / Slew Rate 6. Power Supply Rejection / Noise in Op Amps Analog IC Analysis and Design 9-7 Chih-Cheng Hsieh

8 One Stage Op Amps The small-signal, low frequency gain is The bandwidth is usually determined by the load capacitance C L. The circuit suffers from noise contributions of M -M 4, input devices + load devices. g mn ( ron rop ) Differential cascode op amps The small-signal, low frequency gain is High gain at the cost of output swing and additional poles. These configurations are also called telescopic cascode op amps. g mn ( g mn r ON g r mp OP ) 8

9 Telescopic Op Amplifiers x The output swing = V V V V V V, V ODj = V ov of M j. Difficulty in shorting their inputs and outputs, e.g., to be as a unity-gain buffer. For V X V DD OD OD3 CSS OD5 OD7 V V b GS 4 out X TH out b TH 4 V V V V V V b TH 4 out b GS 4 TH V V V V ( V V ) V V V max min TH 4 GS4 TH TH OV 4 TH Maximize the output swing by minimizing the V ov of M 4 but always less than V TH. 9 V V V V

10 Folded Cascode Circuits To alleviate the drawbacks of telescopic cascode op amps. Av gm R out V in I SS SS / ID3 The maximum output voltage swing (each side) I V V V V ( V V ) V V ( V V V V ) OD3 OD5 swing DD OD7 OD9 p p DD OD3 OD5 OD7 OD9 0

11 Folded Cascode Op Amp - Half Circuit Conversion gain lower than that of telescopic OP PMOS input differential pair exhibits a lower transconductance. Lower resistance at node X. The conversion gain in general lower than that of telescopic architecture. R ( g g ) r r, R ( g g ) r ( r r ) OP m7 mb7 O7 O9 ON m3 mb3 O3 O O5 R R R, A G R out OP ON v m out A g {( g g ) r ( r r ) ( g g ) r r } v m m3 mb3 O3 O O5 m7 mb7 O7 O9 r r r, G g X O5 O m m

12 N-input Folded Cascode Op Amps C C C C C tot GS 3 SB3 DB GD Ctot C C C C R / g r r / g Non-dominant pole frequency is determined by GS 3 SB3 DB GD GD5 DB5 tot m3 O5 O m3 A folded-cascode op amp may use NMOS input and PMOS cascode transistors Higher gain. At the cost of lowering the pole at the folding point. M3 suffers from a lower g m and M5 contributes substantial capacitance. C tot C C C C C C C C GS 3 SB3 DB GD GD5 DB5

13 Comparison to Telescopic Summary for folded cascode OP in comparison to telescopic OP Advantage : wider swing, the input and output can be shorted together, the choice of the input common-mode level is easier. Disadvantage : Higher power, lower voltage gain, lower pole frequency. 3

14 Cascode OP Amps / Single-Ended Cascode OP using wide swing current mirror. For single-ended OP It provides only half the output voltage swing. It contains a mirror pole at node X, thus limiting the speed of feedback systems employing such an amplifier. Triple Cascode AV g 3 mro V V V V, X DD GS 5 GS 7 V out(max) V DD VGS 5 VGS 7 VTH 6, 4

15 Two-Stage OP Amps A two-stage configuration isolates the gain and swing requirement. The first stage provides a high gain. The second stage provides large swing. The overall gain is comparable to that of a cascode op amp, but the swing is equal to V DD VOD5,6 V OD7,8 5 A g r r V m, O, O3,4 A g V m5,6 O5,6 O7,8 r r

16 Two-Stage OP Amps + Cascode Two stage op amp employing cascode AV g m, gm3,4 gmb3,4 ro 3,4r O, gm5,6 gmb5,6 ro 5,6r O7,8 g r r m9,0 O9,0 O, 6

17 Outline. General Consideration. One-Stage Op Amps / Two-Stage Op Amps 3. Gain Boosting 4. Common-Mode Feedback 5. Input Range / Slew Rate 6. Power Supply Rejection / Noise in Op Amps Analog IC Analysis and Design 9-7 Chih-Cheng Hsieh

18 Gain Boosting Increasing the output impedance by feedback. R g out m O O The small signal voltage produced across r O is proportional to the output current. V gs = V b V ro. M in current voltage feedback. r Gain boosting in cascode stage (Regulated Cascode) r R g r r out m O O Forces V x to be equal to V b, such that voltage variations at the drain of M affect V x to a lesser extent. For small signal operation, V b is set to zero. R A g r r out m O O 8

19 Gain Boosting in Cascode Stage The overall voltage gain is equal to A g v g r r g r m m O O m3 O3 The gain is similar to that of a triple cascode. Consider the output swing V x = V GS3 V out(min) = V OD + V GS3 For simple cascode, V out(min) = V OD + V OD The auxiliary amplifier limits the output swing. 9

20 Gain Boosting in Cascode Stage The minimum level at the drain of M3 is equal to V out(min) = V OD3 + V GS5 + V ISS If nodes X and Y are sensed by a PMOS pair, the minimum value of V X and V Y is not dictated by the gain-boosting amplifier. In this case, V out(min) = V OD, + V OD3,4 + V ISS Folded-cascode as aux amplifier 0

21 Gain Boosting / Signal Path & Load For maximum output swings, A must employ an NMOS input differential pair. A can employ a PMOS input differential pair. The gain boosting amplifier introduces its own poles. In a g-b op amp, most of the signal directly flows through the cascode devices to the output. Only a small error component is processed by the g-b amplifier.

22 Performance Comparison Gain Output Swing Speed Power Dissipation Noise Telescopic Medium Medium Highest Low Low Folded- Cascode Medium Medium High Medium Medium Two-Stage High Highest Low Medium Low Gain- Boosted High Medium Medium High Medium

23 Outline. General Consideration. One-Stage Op Amps / Two-Stage Op Amps 3. Gain Boosting 4. Common-Mode Feedback 5. Input Range / Slew Rate 6. Power Supply Rejection / Noise in Op Amps Analog IC Analysis and Design 9-3 Chih-Cheng Hsieh

24 Common Mode Feedback Advantages of differential architecture Higher noise immunity. Higher output swing. No mirror poles, thus achieving a higher closed-loop speed. High-gain differential circuits require common-mode feedback (CMFB). For differential negative feedback, we short the inputs and outputs. In this case, V o,cm = V DD I SS R D / 4

25 High-Gain DP with I/O Shorted For high gain DP with active load, assume I D = I D = I SS / with I/O shorted. The output CM levels depends on how close I D3 and I D4 are to I SS /. If the drain currents of M 3 and M 4 in the saturation region are slightly greater than I SS /, both M 3 and M 4 must enter the triode region, I D (M 3, M 4 ) fall to I SS /. if I D3,4 < I SS /, then both V X and V Y must drop, M 5 enters the triode region. In high gain amplifiers, the I of I P and I N must flow through the intrinsic r o of the amplifier, creating an output voltage change of ( I P -I N )( R P R N ). The voltage error may be large, thus driving the p-type or n-type current source into the triode region. 5

26 Conceptual Topology of CM Feedback The output common mode level is quite sensitive to device properties and mismatches and it can not be stabilized by means of differential feedback. The task of common mode feedback Sensing the output CM level, comparison with a reference, and returning the error to the amplifier s bias network. Sense the output common mode level by a voltage divider V ( RV R V ) / ( R R ) ( V V ) / if R R out, CM out out out out R and R must be much greater than the output impedance of the op amp so as to avoid lowering the open loop gain large area and capacitance. 6

27 Common Mode Feedback Topology To eliminate the resistive loading, we can interpose source followers between each output and its corresponding resistor. R and R or I and I must be large enough to ensure that M 7 or M 8 is not starved when a large differential swing appears at the output, i.e., I ( V V ) ( R R ), I I I, I I I 0 X out out X D7 D7 X Otherwise, I D7 drops to 0 and V out,cm no longer be the true output CM level. The differential output swing is limited. V V V with CMFB V V V out,min GS 7 I out,min OD3 OD5 7 without CMFB

28 CM Sensing with Triode MOSFET Identical transistors M7 and M8 operate in deep triode region, introducing a total resistance between P and ground equal to R tot R on7 R on8 C n ox W L V V C V V C V V V out TH n R tot is a function of V out + V out but independent of V out V out. If the outputs rise together, then R tot drops. The use of M 7 and M 8 limits the output voltage swings. V out,min = V TH7,8 If V out drops from the equilibrium CM level to one V TH above ground and V out rises by the same amount, then M 7 enters the saturation region. ox W L 8 out TH n ox W L out out TH

29 Sensing / Controlling Output CM Level We employ a simple amplifier to detect the V of V out,cm and V REF, applying the result to the NMOS current sources with negative feedback. If V out, CM VE ID3, ID4 Vout, The feedback can be applied to the PMOS current sources as well. The feedback may control only a fraction of the I source to allow optimization of the settling behavior, i.e., the I source can be decomposed into two parallel devices, one biased at a constant I and the other driven by the error amplifier. In a folded-cascode op amp, the CM feedback may control the tail current of the input differential pair. If I, I V 9 CM V out, CM D D out, CM

30 CMFB Using Triode Devices The output CM voltage is directly converted to a resistance or a current, prohibiting comparison with a reference voltage. R on7 R on8 adjusts the bias current of M 5 and M 6. The output CM level sets R on7 R on8 such that I D5 and I D6 exactly balance I D9 and I D0. Assuming I D9 = I D0 = I D, we must have Vb VGS 5 Vb VGS 5 ID Ron 7 Ron 8, Ron 7 Ron 8 ID Vb VGS 5 ID, V V V W ID W Vb VGS 5 ncox Vout Vout V TH ncox L L out out TH 7,8 7,8 Disadvantages The value of the output CM level is a function of device parameters. The voltage drops across R on7 R on8 limits the output voltage swings. M 7 and M 8 are usually quite wide devices large capacitance at the output. V out,cm is somewhat sensitive to the value of V b. 30

31 Modification of CMFB Define V b by a current mirror arrangement such that I D9 tracks I and V REF. Suppose W / L 5 W / L 9 W / L 6 W / L 7 W / L 8 Thus I D9 = I only if V out,cm = V REF. The circuit produces an output CM level equal to a reference but it requires no resistors in sensing V out,cm. In practice, since V DS5 V DS9, channel length modulation results in a finite error. 3

32 Suppress Error Due to r O Transistors M 7 and M 8 reproduce at the drain of M 5 a voltage equal to the source voltage of M and M. V DS5 = V DS9 3

33 DP using Diode-Connected Loads Differential pair with diode connected load The output CM level, V DD - V GS3,4 is relatively well-defined, but the voltage gain is quite low. For differential changes at V out and V out, node P is virtual ground and the gain can be expressed as A v gm, ro, ro 3, 4 RF For common mode levels, M 3 and M 4 operate as diode-connected devices. Fully differential two stage op amps require two CMFB networks. 33

34 Outline. General Consideration. One-Stage Op Amps / Two-Stage Op Amps 3. Gain Boosting 4. Common-Mode Feedback 5. Input Range / Slew Rate 6. Power Supply Rejection / Noise in Op Amps Analog IC Analysis and Design 9-34 Chih-Cheng Hsieh

35 Input Range Limitations V in,min Vout,min VGS, V ISS The input CM level may need to vary over a wide range in some applications. The voltage swings may be limited by the input differential pair rather than the output cascode branch. If V out < V in,min, I SS enters the triode region and the transconductance of the differential pair decreases. The limitation can be overcome if the transconductance can somewhat be restored. 35

36 Extension of Input CM Range Incorporate both NMOS and PMOS DPs such that when one is dead, the other is alive. The variation of the overall g m of the two pairs as the input CM level changes. Many properties of the circuit, including gain, speed, and noise vary. For minimizing input transconductance variation Ref R. Hogervost et al, A Compact Power Efficient 3-V CMOS Rail-to-Rail Input/Output Operational Amplifier for VLSI Cell Libraries, JSSC, pp , Dec

37 Slew Rate Op amps used in feedback circuits exhibit a large-signal behavior called slewing. Linear system vanishes during slewing. Consider a simple RC network ( V out V The slope of the step response is proportional to the final value of the output. Linear System : If we double the input amplitude, the output signal level must double at every point. 37 dv dt V exp out 0 0 exp t / RC t

38 Step Response of Linear OP Amp Assume the op amp is linear V in V out R R R AV out Rout Vout R R V out C L s Both the low-frequency gain and the time constant are divided by The step response is given by A t Vout ( t) V 0 exp u(t) AR RoutCL R R AR / R R Linear Settling : the slope is proportional to the final value (exponential response). If V V R out R () s 38 R out in out L R R AR / R R A AR R C s AR R R /

39 Slewing in an OP Amp Circuit The step response of the circuit begins to deviate from linear response as the input amplitude increases. The response to sufficiently small inputs follows the exponential curve, but with large input steps, the output displays a linear ramp having a constant slope. Under this condition, the op amp experiences slewing and call the slope of the ramp the slew rate. 39

40 Slewing During Transition Assume that R + R is quite large. If V in experiences a change of ΔV, I D increases by g m ΔV/. The total small-signal I out = g m ΔV. I out will charge C L, but as V out rises, so does V X, V of V G and V G, hence I out. If ΔV is so large that M absorbs all of I SS, M is turned off, generating a ramp output with a slope equal to I SS /C L (feedback is broken). (neglect I of R, R ) V X V in, M turns on, and the circuit returns to linear operation. 40

41 Slewing During Transition Large signal speed is limited by the slew rate because the current available to charge and discharge the dominant capacitor in the circuit is small. The input-output relationship during slewing is nonlinear. To amplify a sinusoid V o sin ω o t, its slew rate must exceed V o ω o. 4

42 Feedback Amplifier Example V DD V Both the low-frequency gain and the time constant of the circuit have decreased by a factor of A v C C C Unity step response in C C C A Vout v Vout Rout 4 V out CC C C V / / ( ) out A Av AvC C C v ( s) V C C C in A R s C C C R s / A v out C C C C out v C C C C / A t CC R Vout ( t) V exp u( t), Av C C C C s v out 0 C C C C Av A g r r, v m, O O4 R r r, V out O O4 X CV out C C V V C V A, P in out v C C

43 Feedback Amplifier Slewing Positive & Negative Slewing V DD V DD ISSt ISSt Vout ( t) positive step, Vout ( t) negative step CC CC C C C C 43

44 Slewing in Telescopic Op Amp When a large differential input is applied, M or M turns off. V out and V out appear as ramps with slopes equal to V out - V out exhibits a slew rate equal to I SS /C L. ISS / C L 44

45 Slewing in Folded Cascode Op Amp I SS I P PMOS current sources I P. The current that charges / discharges C L is equal to I SS. Slew rate ~ I SS / C L. The SR is independent of I P if If ISS IP,then during slewing M 3 turns off, and V X falls to a low level such that M and the tail current source enters the triode region. 45 I P I SS

46 Clamp Circuit to Limit Swings The difference between I SS and I P now flows through M or M, requiring only enough drop in V X or V Y to turn on one of these transistors. M and M clamp the two diodes directly to VDD. The equilibrium value of V X and V Y is usually higher than V DD -V THN, M and M are off during smallsignal operation. Trade-offs encountered in increasing the slew rate Slew rate I SS (W/L) Power dissipation C in If the device currents and widths scale together, g m r o of each transistor and hence the openloop gain of the op amp remain constant. 46

47 Outline. General Consideration. One-Stage Op Amps / Two-Stage Op Amps 3. Gain Boosting 4. Common-Mode Feedback 5. Input Range / Slew Rate 6. Power Supply Rejection / Noise in Op Amps Analog IC Analysis and Design 9-47 Chih-Cheng Hsieh

48 Power Supply Rejection PSRR A v, input output A v V, DD output A, g ( r r ) v input output mn OP ON A v, V output DD OP amps are often applied from noisy lines and must therefore reject the noise adequately. If the circuit is perfectly symmetric, V out = V X. The diode connected device clamps node X to V DD, thus V out ~= V DD. The gain from V DD to V out is close to unity. The power supply rejection ratio PSRR ~ g mn (r OP r ON ) 48

49 Noise in Op Amps Change the gate voltage for each transistor by a small amount and predict the effect at the output. At relatively low frequencies, the cascode devices contribute negligible noise. M-M and M7-M8 are the primary noises sources. The input-referred noise voltage per unitbandwidth is given by (7-8, p.6, 39) Similar to fully-differential amp. V n 4kT 3g m, g 3g m7,8 m, K WL C f WL C f g, N ox K 7,8 P ox g m7,8 m, 49

50 Noise in a Folded-Cascode Op Amp At relatively low frequencies, the cascode devices contribute negligible noise. M -M, M 7 -M 8, M 9 -M 0 are potentially significant noise sources. Consider thermal noise only, we first refer the noise of M7-M8 and M9-M0 to the output V n, out M 7,8 V n, out M 9,0 4kT 3gm 4kT 3gm Adding the contribution of M -M, we obtain 7,8 9,0 m7,8 Larger than telescopic amp. g g R out m9,0 R out V n,int gm7,8 gm 8kT 3gm, 3gm, 3gm 9,0, 50

51 Noise in a Two Stage OP Amp The noise current of M 5 and M 7 flows through r O5 r O7, the input referred noise contribution of M 5 -M 8 is n 4 m5 m7 O5 O7 M 58 3 gm ro ro 3 gm5 ro 5 ro 7 V kt g g r r 6kT g g 3 g r r g m5 m7 m O O3 m5 The noise due to M -M 4 is equal to V n M4 4kT 3 g m g g m m3 It follows that V n, tot 6kT g m5 gm7 g m gm3 3 g m gm5 ro ro 3 The noise from M5~M8 is negligible, it s divided by gain of first stage. 5