CHAPTER 3. Instrumentation Amplifier (IA) Background. 3.1 Introduction. 3.2 Instrumentation Amplifier Architecture and Configurations

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1 CHAPTER 3 Instrumentation Amplifier (IA) Background 3.1 Introduction The IAs are key circuits in many sensor readout systems where, there is a need to amplify small differential signals in the presence of large common mode noise. Some of the applications include automotive transducers, industrial process control, linear position sensing, and bio-potential acquisition systems. The IA is intended for precise low-level signal amplification where, low noise, high input resistance and accurate close loop gain are required. The characteristics such as the input-referred noise, offset performance, frequency response as well as CMRR of the front-end data acquisition system are determined in the IA. Different types of IA in the sensor signal conditioning system can provide accurate readout with respect to individual sensors properties and applications. 3.2 Instrumentation Amplifier Architecture and Configurations A quality IA should exhibit very small power dissipation, small size, high bandwidth and high rejection to the common-mode signals from the sensors. IA architecture arrangement can be broadly classified into resistive-based or capacitive-based IAs. The capacitive couplings in IA with capacitor feedback are examples of power efficient capacitive-based IA. They need only a single input pair to provide floating signal sensing. The examples of the resistive-based IA include the traditional 3 op-amp IA, 2 op-amp IA, and the current feedback IA which is also known as the differential difference amplifier (DDA). Resistive- IA has the advantage of being less sensitive to capacitive parasitics. In addition, gain setting is flexible with external resistive components Conventional Three/Two Op-amp IA with Resistive Feedback The conventional 3 op-amp topology of IA is shown in Figure 3.1(a), whereas a 2 op-amp IA, shown in Figure 3.1(b), can be used to provide high input resistance. In the 3 op-amp topology, two op-amps are used to implement floating gain input stage and offer high input resistance, followed by a third stage configured as a differential amplifier (normally set to 19

2 Figure 3.1 Conventional resistive-feedback instrumentation amplifiers (a) The conventional 3 opamp resistive feedback IA (b) The 2 op-amp resistive feedback IA. unity gain) [14] [15]. The first gain stage provides unity common-mode gain and majority of the differential gain whereas the second stage provides unity or small differential-mode gain and all of the common-mode rejection. The overall gain of IA is given as (3.1) with R 3 = R 2, R 5 = R 7 and R 4 = R 6. If differential amplifier is set to unity gain, the overall gain can be adjusted by means of one resistor R 1. The traditional 3 op-amp configuration needs highly matched resistors (R 4 to R 7 ) to achieve high CMRR. As the output resistance of the differential stage should be low to drive the resistors of the instrumentation amplifier network, this ends in large current consumption and power drain in the operational amplifiers [16]. This is adverse in low power design. In resistive feedback, the CMRR is critically dependent on the degree of matching of the resistors. Hence, any mismatch in resistor values will degrade the CMRR of the IA circuit [17]. Most of the times a high pass filter is added at the input of the 3 opamp IA to reduce the dc offset, due to that CMRR gets further reduced. This is due to need of matched capacitors and resistors. For high CMRR applications, trimming is used, but it increases the cost substantially. 20

3 The 2 op-amp version of IA (Fig. 2.1b) can offer higher input resistance. The expression for voltage gain becomes with R 1 = R 3 and R 2 = R 4 as (3.2) The gain adjustment if required would be done by two trimmed resistors. The input resistance offered at two input terminals will not be identical. In addition, it suffers from degradation of CMRR with poor resistor matching. Bandwidth will also reduce with increasing gain Current Feedback IA The current sensing is used in current feedback IA to achieve a high CMRR. Conventional resistive feedback IA including three op-amps IA requires precisely matched resistors to achieve high CMRR. The current feedback IA gives high CMRR performance over a wider bandwidth than conventional designs. The main advantage of this technique is that the bandwidth is relatively independent of the closed loop gain. This improves the frequency response and also results in more loop gain available at higher frequencies to reduce distortion and improve accuracy. Higher CMRR can be achieved, by employing both isolation and balancing techniques in the feedback loop. The basic functional block diagram of current feedback IA [24] is presented as shown in Fig The two unity gain buffers on input side guarantee the high input impedance of IA. The current in resistor R g can be given as (3.3) Figure 3.2. Block diagram of IA with current feedback 21

4 On output side, equation can be written as (3.4) (3.5) The input circuit behaves as a transconductance amplifier and output circuit as a transimpedance amplifier. If the current in input branch is mirrored into the output ( I 1 = I g = I 2 =I s ), we get (3.6) This is the usual expression for output voltage of an IA. It is important to note that, unlike the classical three op-amp circuit, there is no global feedback (output to input) and there is only one high impedance node that simplifies the frequency compensation. In addition, the CMRR and the gain do not depend on matching of resistor values. The resistor count is also reduced which saves chip area. A typical current feedback IA consists of an input transconductance amplifier, an output transconductance amplifier, and one or two high gain feedback loops using a single/double ended differential amplifier and resistor-feedback network. If a single feedback loop is applied around both transconductance amplifiers, the IA may be classified as either direct or indirect current feedback Direct Current Feedback IA The direct current feedback IA and indirect current feedback IA can be distinguished. The schematic of direct current feedback IA is sketched in Fig The MOSFETs M 1, M 2 and resistor R 1 form input transconductance amplifier with transconductance of 1/R 1. While another transconductance amplifier formed by MOSFETs M 3, M 4 and resistor R 2 with a transconductance of 1/R 2, provides feedback from output. The gain of IA is given by (3.7) 22

5 Figure 3.3. Direct current feedback IA Where G 1 is transconductor formed by M 1, M 2 and R 1 and G 2 the transconductor formed by M 3, M 4 and R 2. The MOSFETs M 1 and M 2 are always biased at the same drain current I s, while M 3 and M 4 carry a current dependant on input signal. The biased current difference in the same branch can become a source of nonlinearity. The cascading of two transconductors in the same branch decreases the input common mode voltage range and increases minimum supply voltage. The only advantage of direct current feedback IA is reduced current dissipation. Hence, the direct current feedback IA is often used in biomedical low power applications [38] Indirect Current Feedback IA The Indirect current feedback IA has been widely used in analog circuits such as voltage comparator with floating inputs, level shifter, voltage inverter without external resistors and analog front end circuits for biomedical applications [38]. It is known as indirect current feedback because the output voltage is not directly fed back to the input transconductor, but to the input of a second stage feedback transconductor (Fig 3.4) as compared to the direct current feedback method. Here the MOSFETs M 1, M 2 and M 3, M 4 carry a signal dependant drain currents thus eliminating source of nonlinearity. The minimum supply voltage and input common mode voltage range also get increased as the two transconductors form different branches. 23

6 Figure 3.4. Indirect current feedback IA The input common mode voltage and reference common mode voltage are independent of each other. However, the current consumption gets increased as compared to direct current feedback. The working of indirect current feedback IA can be explained from Fig The drain current from two degenerated differential pairs (M 1 -M 4 ) are added together at load current sources. The amplifier A 1 corrects any imbalance in these currents by applying feedback to the gate of M 4. If R 1 is equal to R 2 then any imbalance in M 1 and M 2 due to differential input signal applied will be corrected by identical differential voltage between gates of M 3 and M 4. The circuit then behaves as a unity gain IA. The CMRR now depends on the mismatches in the output impedances of the current sources I 1 -I 4. In monolithic techniques, these output impedances of the current sources can made extremely high, so even mismatches have minimal effect on common mode performance. The circuit can make to have higher gain by adjusting R 1 and R 2. With increase in gain, CMRR gets improved but the circuit becomes slow and noisy and also DC errors get multiplied. The mismatches in input stage operating currents are forced to flow through the resistors R 1 and R 2 causing much larger output referred errors. Still the improvement in common mode rejection makes indirect current feedback attractive above gains of A conceptual solution, which has been realized in many different forms, is the use of voltage to current (V to I) converter as a feedback element. The V to I converter serves to exactly balance the drain currents of M 1 and M 2. The later MOSFET pair (M 3 -M 4 ) always 24

7 Figure 3.5. Simplified schematic of local current feedback IA with current mirror load in input transconductor operate at equal currents introducing no non-linearties. The consequence of this is that the input differential voltage forced across the gain-setting resistor R 1. The topology of indirect current feedback IA is modified using two isolated local feedback loops, one around input transconductor and other around output transconductor as shown in Fig Here current balancing as well as isolation technique is employed. Each local loop contains a smaller number of internal parasitic poles and thus this topology offers higher operating bandwidth for a given current consumption [39]. Due to this, the local current feedback IA is implemented with a current mirror load in the input transconductor. The signals applied to the input of the amplifier unbalance the current in input MOSFETs (M i1, M i2 ), thereby unbalancing the inputs of amplifier A. The amplifier A is a balanced output differential voltage amplifier. The outputs of amplifier A drive each of the two pairs of current sources I 1, I 3, and I 2, I 4 in the direction which tends to equalize the drain currents of M i1 and M i2. When the drain currents of M i1 and M i2 are restored to balance, their gate-source voltages also get balanced. Thus any differential signal voltage applied to input must appear across the resistor R 1, implying that M i1 and M i2 will act as the buffers. The currents in M i1 and M i2 have been balanced by loop controlling I 1 and I 2, hence the difference between I 1 and I 2 gets duplicated through R 1. 25

8 (3.8) As I 3 and I 4 are slaved to the input imbalance, the proper output signal is generated when amplifier B drives the MOSFETs M o1 and M o2 to balance its own inputs. The amplifier B is high gain unbalanced differential voltage amplifier. The potential between output and reference terminal is translated across the resistor R 2 just as the input signal was translated across R 1. As the overall output voltage is taken across the output terminal and reference terminal, when the amplifier B is at balance, the output voltage is related to I 3 and I 4 by, (3.9) As I 3 and I 4 are slaved to I 1 and I 2, the currents through R 1 and R 2 will be identical and (3.8) and (3.9) can be combined as, (3.10) This result is the basis of overall instrumentation amplifier function. Thus input difference signal is reproduced at the output with a gain determined by the ratio of resistors R 2 and R 1. The balanced differential nature of input stage makes IA immune to common mode signals. The amplifier input impedance is made artificially high with the help of feedback. The input overloads involve only amplifier A, hence output amplifier-settling time is no longer a problem. Therefore, it is possible to over compensate the output amplifier for bandwidth control without disturbing the input amplifier. 3.3 IA Parameters Most commonly used signal conditioning circuit for bio impedance imaging is instrumentation amplifier (IA). The basic requirements of IA are as follows [3]: 1) The physiological process to be examined should not be influenced by the amplifier (or system). 2) The amplifier should have good quality signal conditioning, which means the weaker input signal in presence of strong common mode noise should not be degraded after the amplification process. Hence, low noise, low offset, high CMRR, and high gain for the amplifier are very crucial. 3) The amplifier needs great immunity against supply voltage variation in context of measuring minute input signal under continuous fluctuation of environmental noise. 26

9 4) In imaging of cancer biomarkers, a differential alternating current is applied through a pair of surface electrodes to the body tissue and resulting voltages are picked up by another electrode pair and further processed. To detect minute affection in the body tissue, the high frequency alternating current operation is required. Hence, IA should have high bandwidth. 5) The amplifier should have good ESD (electrostatic discharge) protection as well as other safety precautions against damages due to high input voltages Common Mode Rejection Ratio (CMRR) An important characteristic of IA is its ability to suppress undesired disturbances that might be amplified along desired signal. Even if the two inputs of IA are match, the unwanted signals such as 50 Hz noise or hum pick up would appear as common to both inputs. The practical effectiveness of rejecting the common signals depend on the degree of matching between the two input devices of IA. The ability of IA to reject common mode signals is expressed by CMRR as, the ratio of differential gain to the common mode gain. Ideally, the common mode gain is expected to be zero, thus CMRR ideally equals infinity Input Common Mode Range (ICMR) Most of the bio-medical systems employing IAs require large voltage swing to accommodate a wide range of signal amplitude. The ICMR of IA is the range of common mode input voltage over which the MOSFETs associated with the input differential pair remain in saturation region. The lower limit of ICMR occurs when common mode input voltage forces either of the main devices into the triode region. The upper limit occurs when the common mode input voltage forces either load or tail current source devices in to the triode region. The input referred noise of the IA is limited by ICMR Bandwidth In many applications, the IA must operate with large transient signals. The great varieties of biological parameters to be processed require a wide range of physiological signals to be acquired by detection devices. The physiological signals have low voltage levels in common but their frequency values can range to tens of MHz. Thus, the biomedical read out circuitry must be able to extract and process the wide band signals. 27

10 3.3.4 Power Consumption and Area of Chip The power consumption is the amount of quiescent power consumed by IA in order to operate properly. In modern bio-medical systems, monitoring of bio-potential signals is a crucial and important part. The recordings of these signals are inconvenient and uncomfortable for patients due to need to be connected to a stationary and bulky instrument. Thus, there is a growing demand for small size, low power and portable signal acquisition systems. The area of the chip depends directly on power consumption of the circuit. Low power consumption thus is required to reduce battery size, extend operating hours and minimize heat dissipation. 3.4 Scheme of Proposed IA The block diagram of proposed IA employing indirect current feedback, current balancing and isolation technique is presented in Fig The design of IA is intended for wide band, low power, portable, and for eliminating low frequency offsets (line noise) of the signal coupled to the human body [37]. The block diagram of the proposed IA resembles with current feedback IA shown in Fig The input stage is a differential transconductance amplifier with moderate gain and serving as buffers. This transconductance amplifier is loaded with a current mirror load instead of resistor load. The current mirror load provides large local loop gain due to its high impedance at output node. This gives a benefit to stability and high bandwidth operation due to reduction of parasitic poles around loop. The second stage in a block diagram is a balanced differential amplifier acting as a sensing amplifier. As the majority of gain is provided by first stage in the input loop, this stage can be a single stage with low gain. Thus, this stage can be implemented with diode-connected load to provide low gain. The majority of common mode noise will be eliminated by the first and second stage of proposed IA. The output voltage of this stage will be fed to the transconductance and transimpedance amplifier to balance their drain currents, such that input and output voltages are forced across the resistors deciding gain of IA. 28

11 Balanced Differential Amplifier Differential Transimpedance Amplifier Telescopic cascode Opamp Source follower (Level shifter) V out V i+ V i- Differential Transconductance Amplifier G M Figure 3.6. Block diagram of proposed IA C A differential transimpedance amplifier precedes the balanced differential amplifier, which is just similar to the input transconductance amplifier. This stage is required of low gain as majority of gain in output loop is provided by preceding stage a cascode op-amp. Hence, the diode-connected load can load this stage. The high gain amplifier B is realized as a single ended cascode op-amp. This amplifier balances the drain currents of the MOSFETs in transimpedance stage, thus forcing output voltage to fall across the resistor R 2. The source follower is used as a level shifter to eliminate the DC voltage level available at the output. Another transconductance amplifier with capacitor is added in feedback from output to the cascode op-amp to filter out the low frequency noise. The cutoff frequency of this high pass filter is set by transconductance G M and capacitance C. To conclude, this chapter explored different topologies of IA, the advantages and disadvantages over each other. The study clearly indicated that the indirect current feedback topology is suitable for the application considered here of EIT. The only difficulty is about matching of the devices during layout which lead to high CMRR with high bandwidth. The scheme of proposed IA includes G m -C high pass filter to suppress low frequency noise emerging from sources like line supply. ***** 29