Low Cost Instrumentation Amplifier AD622
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1 a FEATURES Easy to Use Low Cost Solution Higher Performance than Two or Three Op Amp Design Unity Gain with No External Resistor Optional Gains with One External Resistor (Gain Range 2 to ) Wide Power Supply Range ( 2.6 V to V) Available in 8-Lead PDIP and SOIC Low Power,. ma max Supply Current GOOD DC PERFORMANCE.% Gain Accuracy (G = ) 2 V max Input Offset Voltage. V/ C max Input Offset Drift na max Input Bias Current 66 db min Common-Mode Rejection Ratio (G = ) NOISE 2 nv/ khz Input Voltage Noise.6 V p-p Noise (. Hz to Hz, G = ) EXCELLENT AC CHARACTERISTICS 8 khz Bandwidth (G = ) s Settling Time G =.2 V/ s Slew Rate APPLICATIONS Transducer Interface Low Cost Thermocouple Amplifier Industrial Process Controls Difference Amplifier Low Cost Data Acquisition Low Cost Instrumentation Amplifier CONNECTION DIAGRAM IN +IN OUTPUT PRODUCT DESCRIPTION The is a low cost, moderately accurate instrumentation amplifier that requires only one external resistor to set any gain between 2 and,. Or for a gain of, no external resistor is required. The is a complete difference or subtracter amplifier system while providing superior linearity and commonmode rejection by incorporating precision laser trimmed resistors. The replaces low cost, discrete, two or three op amp instrumentation amplifier designs and offers good commonmode rejection, superior linearity, temperature stability, reliability, and board area consumption. The low cost of the eliminates the need to design discrete instrumentation amplifiers to meet stringent cost targets. While providing a lower cost solution, it also provides performance and space improvements. REF Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 96, Norwood, MA , U.S.A. Tel: 78/ World Wide Web Site: Fax: 78/ Analog Devices, Inc., 999
2 SPECIFICATIONS +2 C, V S = V, and R L = 2 k unless otherwise noted) Model Conditions Min Typ Max Units GAIN G = + (. k/ ) Gain Range Gain Error V OUT = ± V G =.. % G =.2. % G =.2. % G =.2. % Nonlinearity, V OUT = ± V G = R L = kω ppm G = R L = 2 kω ppm Gain vs. Temperature Gain = ppm/ C Gain > ppm/ C VOLTAGE OFFSET (Total RTI Error = V OSI + V OSO /G) Input Offset, V OSI V S = ± V to ± V 6 2 µv Average TC V S = ± V to ± V. µv/ C Output Offset, V OSO V S = ± V to ± V 6 µv Average TC V S = ± V to ± V µv/ C Offset Referred to the Input vs. Supply (PSR) V S = ± V to ± V G = 8 db G = 9 2 db G = 4 db G = 4 db INPUT CURRENT Input Bias Current 2.. na Average TC 3. pa/ C Input Offset Current.7 2. na Average TC 2. pa/ C INPUT Input Impedance Differential 2 GΩ pf Common-Mode 2 GΩ pf Input Voltage Range 2 V S = ± 2.6 V to ± V V Over Temperature V V S = ± V to ± 8 V V Over Temperature V Common-Mode Rejection Ratio DC to 6 Hz with kω Source Imbalance V CM = V to ± V G = db G = db G = 3 8 db G = 3 8 db OUTPUT Output Swing R L = kω, V S = ± 2.6 V to ± V +..2 V Over Temperature V V S = ± V to ± 8 V V Over Temperature +.6. V Short Current Circuit ± 8 ma 2
3 Model Conditions Min Typ Max Units DYNAMIC RESPONSE Small Signal 3 db Bandwidth G = khz G = 8 khz G = 2 khz G = 2 khz Slew Rate.2 V/µs Settling Time to.% V Step G = µs NOISE Voltage Noise, khz Total RTI Noise = (e 2 ni ) + (e no / G)2 Input, Voltage Noise, e ni 2 nv/ Hz Output, Voltage Noise, e no 72 nv/ Hz RTI,. Hz to Hz G = 4. µv p-p G =.6 µv p-p G =.3 µv p-p Current Noise f = khz fa/ Hz. Hz to Hz pa p-p REFERENCE INPUT R IN 2 kω I IN V IN+, V REF = + +6 µa Voltage Range V Gain to Output ±. POWER SUPPLY Operating Range 3 ± 2.6 ± 8 V Quiescent Current V S = ± 2.6 V to ± 8 V.9.3 ma Over Temperature.. ma TEMPERATURE RANGE For Specified Performance 4 to +8 C NOTES Does not include effects of external resistor. 2 One input grounded. G =. 3 This is defined as the same supply range that is used to specify PSR. Specifications subject to change without notice. 3
4 ABSOLUTE MAXIMUM RATINGS Supply Voltage ± 8 V Internal Power Dissipation mw Input Voltage (Common Mode) ±V S Differential Input Voltage ± 2 V Output Short Circuit Duration Indefinite Storage Temperature Range (N, R) C to +2 C Operating Temperature Range A C to +8 C Lead Temperature Range (Soldering seconds) C NOTES Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Specification is for device in free air: 8-Lead Plastic Package: θ JA = 9 C/Watt 8-Lead SOIC Package: θ JA = C/Watt ORDERING GUIDE Temperature Package Model Range Option* AN 4 C to +8 C N-8 AR 4 C to +8 C SO-8 AR-REEL 4 C to +8 C 3" Reel AR-REEL7 4 C to +8 C 7" Reel *N = Plastic DIP, SO = Small Outline. CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4 V readily accumulate on the human body and test equipment and can discharge without detection. Although the features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE Typical Characteristics (@ +2 C, V S = V, R L = 2 k, unless otherwise noted) 4 SAMPLE SIZE = 9 4 SAMPLE SIZE = 383 PERCENTAGE OF UNITS 3 2 PERCENTAGE OF UNITS OUTPUT OFFSET VOLTAGE mv COMMON-MODE REJECTION RATIO db Figure. Typical Distribution of Output Offset Voltage Figure 2. Typical Distribution of Common-Mode Rejection 4
5 Typical Characteristics +2 C, V S = V, R L = 2 k, unless otherwise noted) G = INPUT OFFSET VOLTAGE V.. CMR db G = G = G = WARM-UP TIME Minutes Figure 3. Change in Input Offset Voltage vs. Warm-Up Time. k k k M Figure 6. CMR vs. Frequency, RTI, Zero to kω Source Imbalance 8 6 VOLTAGE NOISE nv/ Hz GAIN = GAIN =,, GAIN = POSITIVE PSR db G = G = G = GAIN = BW LIMIT 4 G = k k k Figure 4. Voltage Noise Spectral Density vs. Frequency, (G = ). k k k M Figure 7a. Positive PSR vs. Frequency, RTI (G = ) 8 6 CURRENT NOISE fa/ Hz NEGATIVE PSR db G = G = G = G =. k k k M Figure. Current Noise Spectral Density vs. Frequency Figure 7b. Negative PSR vs. Frequency, RTI (G = )
6 Typical Characteristics +2 C, V S = V, R L = 2 k, unless otherwise noted) GAIN V/V SETTLING TIME s k k k M M GAIN Figure 8. Gain vs. Frequency Figure. Settling Time to.% vs. Gain, for a V Step 3 OUTPUT VOLTAGE SWING Volts p-p 2 V S = V G = ø 9 % µv 2V k k LOAD RESISTANCE Figure 9. Output Voltage Swing vs. Load Resistance Figure 2. Gain Nonlinearity, G =, R L = kω (2 µv = 2 ppm) 2 INPUT 2V p-p k.% k.% k T k.% V OUT SETTLING TIME s TO.% k.% k.% G=.% G= G= G=..62k 2 OUTPUT STEP SIZE Volts Figure. Settling Time vs. Step Size (G = ) Figure 3. Settling Time Test Circuit 6
7 THEORY OF OPERATION The is a monolithic instrumentation amplifier based on a modification of the classic three op-amp approach. Absolute value trimming allows the user to program gain accurately (to.% at G = ) with only one resistor. Monolithic construction and laser wafer trimming allow the tight matching and tracking of circuit components, thus insuring its performance. The input transistors Q and Q2 provide a single differentialpair bipolar input for high precision. Feedback through the Q-A-R loop and the Q2-A2-R2 loop maintains constant collector current of the input devices Q, Q2 thereby impressing the input voltage across the external gain-setting resistor. This creates a differential gain from the inputs to the A/A2 outputs given by G = (R + R2)/ +. The unity-gain subtracter A3 removes any common-mode signal, yielding a single-ended output referred to the REF pin potential. The value of also determines the transconductance of the preamp stage. As is reduced for larger gains, the transconductance increases asymptotically to that of the input transistors. This has three important advantages: (a) Open-loop gain is boosted for increasing programmed gain, thus reducing gainrelated errors. (b) The gain-bandwidth product (determined by C, C2 and the preamp transconductance) increases with programmed gain, thus optimizing frequency response. (c) The input voltage noise is reduced to a value of 2 nv/ Hz, determined mainly by the collector current and base resistance of the input devices. The internal gain resistors, R and R2, are trimmed to an absolute value of 2.2 kω, allowing the gain to be programmed accurately with a single external resistor. Make vs. Buy: A Typical Application Error Budget The offers a cost and performance advantages over discrete two op-amp instrumentation amplifier designs along with smaller size and less components. In a typical application shown in Figure 4, a gain of is required to receive and amplify a 2 ma signal from the AD694 current transmitter. The current is converted to a voltage in a Ω shunt. In applications where transmission is over long distances, line impedance can be significant so that differential voltage measurement is essential. Where there is no connection between the ground returns of transmitter and receiver, there must be a dc path from each input to ground, implemented in this case using two kω resistors. The error budget detailed in Table I shows how to calculate the effect various error sources have on circuit accuracy. The provides greater accuracy at lower cost. The higher cost of the homebrew circuit is dominated in this case by the matched resistor network. One could also realize a homebrew design using cheaper discrete resistors which would be either trimmed or hand selected to give high common-mode rejection. This level of common-mode rejection would however degrade significantly over temperature due to the drift mismatch of the discrete resistors. Note that for the homebrew circuit, the LT3 specification for noise has been multiplied by 2. This is because a two opamp type instrumentation amplifier has two op amps at its inputs, both contributing to the overall noise. /2 LT3 AD694 2mA TRANSMITTER R L2 2mA R L2 k k.62k REFERENCE V IN k k /2 LT3 9k * k * k * 9k * *.% RESISTOR MATCH, ppm/ C TRACKING 2 ma Current Loop with Ω Shunt Impedance Monolithic Instrumentation Amplifier, G = Figure 4. Make vs. Buy Homebrew In Amp, G = 7
8 Table I. Make vs. Buy Error Budget Total Error Total Error in ppm in ppm Circuit Homebrew Circuit Relative to V FS Relative to V FS Error Source Calculation Calculation Homebrew ABSOLUTE ACCURACY at T A = +2 C Total RTI Offset Voltage, µv 2 µv + µv/ 8 µv Input Offset Current, na 2. na kω na kω 2. CMR, db 86 db ppm. V (.% Match. V)/ V 2 Total Absolute Error DRIFT TO +8 C Gain Drift, ppm/ C ( ppm + ppm) 6 C ( ppm)/ C 6 C 33 3 Total RTI Offset Voltage, µv/ C (2 µv/ C + µv/ C/) 6 C 9 µv/ C 2 6 C 2 8 Input Offset Current, pa/ C 2 pa/ C kω 6 C pa/ C kω 6 C Total Drift Error RESOLUTION Gain Nonlinearity, ppm of Full Scale ppm 2 ppm 2 Typ. Hz Hz Voltage Noise, µv p-p.6 µv p-p. µv p-p Total Resolution Error Grand Total Error GAIN SELECTION The s gain is resistor programmed by, or more precisely, by whatever impedance appears between Pins and 8. The is designed to offer gains as close as possible to popular integer values using standard % resistors. Table II shows required values of for various gains. Note that for G =, the pins are unconnected ( = ). For any arbitrary gain can be calculated by using the formula =. kω G To minimize gain error avoid high parasitic resistance in series with, and to minimize gain drift, should have a low TC less than ppm/ C for the best performance. Table II. Required Values of Gain Resistors Desired % Std Table Calculated Gain Value of, Gain 2. k k k k k k k
9 INPUT AND OUTPUT OFFSET VOLTAGE The low errors of the are attributed to two sources, input and output errors. The output error is divided by G when referred to the input. In practice, the input errors dominate at high gains and the output errors dominate at low gains. The total V OS for a given gain is calculated as: Total Error RTI = input error + (output error/g) Total Error RTO = (input error G) + output error REFERENCE TERMINAL The reference terminal potential defines the zero output voltage and is especially useful when the load does not share a precise ground with the rest of the system. It provides a direct means of injecting a precise offset to the output, with an allowable range of 2 V within the supply voltages. Parasitic resistance should be kept to a minimum for optimum CMR. INPUT PROTECTION The features 4 Ω of series thin film resistance at its inputs, and will safely withstand input overloads of up to ± 2 V or ± 6 ma for up to an hour. This is true for all gains and power on and off, which is particularly important since the signal source and amplifier may be powered separately. For continuous input overload, the current should not exceed 6 ma (I IN V IN /4 Ω). For input overloads beyond the supplies, clamping the inputs to the supplies (using a diode such as an IN448) will reduce the required resistance, yielding lower noise. RF INTERFERENCE The circuit of Figure is recommended for series inamps and provides good RFI suppression at the expense of reducing the (differential) bandwidth. In addition, this RC input network also provides additional input overload protection (see input protection section). Resistors R and R2 were selected to be high enough in value to isolate the circuit s input from capacitors C C3, but without significantly increasing the circuit s noise. IN +IN R 4.2k % C3.47 F R2 4.2k % C pf % C2 pf % 3 LOCATE C C3 AS CLOSE TO THE INPUT PINS AS POSSIBLE F.33 F 4 7. F. F 6 V OUT Figure. RFI Suppression Circuit for Series In-Amps R/R2 and C/C2 form a bridge circuit whose output appears across the in-amp s input pins. Any mismatch between the C/ R and C2/R2 time constant will unbalance the bridge and reduce common-mode rejection. C3 insures that any RF signals are common mode (the same on both in-amp inputs) and are not applied differentially. This low pass network has a 3 db BW equal to: /(2π (R + R2) (C3 + C + C2)). Using a C3 value of.47 µf as shown, the 3 db signal BW of this circuit is approximately 4 Hz. When operating at a gain of, the typical dc offset shift over a frequency range of Hz to 2 MHz will be less than. µv RTI and the circuit s RF signal rejection will be better than 7 db. At a gain of, the dc offset shift is well below mv RTI and RF rejection better than 7 db. The 3 db signal bandwidth of this circuit may be increased to 9 Hz by reducing resistors R and R2 to 2.2 kω. The performance is similar to that using 4 kω resistors, except that the circuitry preceding the in-amp must drive a lower impedance load. This circuit should be built using a PC board with a ground plane on both sides. All component leads should be made as short as possible. Resistors R and R2 can be common % metal film units but capacitors C and C2 need to be ± % tolerance devices to avoid degrading the circuit s common-mode rejection. Either the traditional % silver micas, miniature size micas, or the new Panasonic ± 2% PPS film capacitors are recommended. 9
10 GROUNDING Since the output voltage is developed with respect to the potential on the reference terminal, it can solve many grounding problems by simply tying the REF pin to the appropriate local ground. The REF pin should however be tied to a low impedance point for optimal CMR. The use of ground planes is recommended to minimize the impedance of ground returns (and hence the size of dc errors). In order to isolate low level analog signals from a noisy digital environment, many data-acquisition components have separate analog and digital ground returns (Figure 6). All ground pins from mixed signal components such as analog to digital converters should be returned through the high quality analog ground plane. Maximum isolation between analog and digital is achieved by connecting the ground planes back at the supplies. The digital return currents from the ADC which flow in the analog ground plane will in general have a negligible effect on noise performance. GROUND RETURNS FOR INPUT BIAS CURRENTS Input bias currents are those currents necessary to bias the input transistors of an amplifier. There must be a direct return path for these currents; therefore when amplifying floating input sources such as transformers, or ac-coupled sources, there must be a dc path from each input to ground as shown in Figure 7. Refer to the Instrumentation Amplifier Application Guide (free from Analog Devices) for more information regarding in amp applications. INPUT +INPUT REFERENCE LOAD V OUT TO POWER SUPPLY GROUND ANALOG P.S. +V V C DIGITAL P.S. C +V Figure 7a. Ground Returns for Bias Currents with Transformer Coupled Inputs. F. F. F V DD AGND DGND V DD GND 2 V IN AD PROCESSOR V IN 2 Figure 6. Basic Grounding Practice INPUT +INPUT REFERENCE LOAD V OUT TO POWER SUPPLY GROUND Figure 7b. Ground Returns for Bias Currents with Thermocouple Inputs INPUT V OUT LOAD +INPUT REFERENCE k k TO POWER SUPPLY GROUND Figure 7c. Ground Returns for Bias Currents with AC Coupled Inputs
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a FEATURES Enhanced Replacement for LF1 and TL1 DC Performance: A max Quiescent Current 1 pa max Bias Current, Warmed Up (AD8C) V max Offset Voltage (AD8C) V/ C max Drift (AD8C) V p-p Noise,.1 Hz to 1
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1.2 V Precision Low Noise Shunt Voltage Reference FEATURES Precision 1.200 V Voltage Reference Ultracompact 3 mm 3 mm SOT-23 Package No External Capacitor Required Low Output Noise: 4 V p-p (0.1 Hz to
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High Common-Mode Voltage, Programmable Gain Difference Amplifier FEATURES High common-mode input voltage range ±2 V at VS = ± V Gain range. to Operating temperature range: 4 C to ±8 C Supply voltage range
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a FEATURES Four High Performance VCAs in a Single Package.2% THD No External Trimming 12 db Gain Range.7 db Gain Matching (Unity Gain) Class A or AB Operation APPLICATIONS Remote, Automatic, or Computer
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Zero Drift, Unidirectional Current Shunt Monitor FEATURES High common-mode voltage range 4 V to 8 V operating.3 V to +85 V survival Buffered output voltage Gain = 6 V/V Wide operating temperature range:
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Single Supply, MicroPower INSTRUMENTATION AMPLIFIER FEATURES LOW QUIESCENT CURRENT: µa WIDE POWER SUPPLY RANGE Single Supply:. to Dual Supply:.9/. to ± COMMON-MODE RANGE TO (). RAIL-TO-RAIL OUTPUT SWING
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www.burr-brown.com/databook/.html Dual FET-Input, Low Distortion OPERATIONAL AMPLIFIER FEATURES LOW DISTORTION:.3% at khz LOW NOISE: nv/ Hz HIGH SLEW RATE: 25V/µs WIDE GAIN-BANDWIDTH: MHz UNITY-GAIN STABLE
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Precision Instrumentation Amplifier AD54 FEATURES Low noise: 0.3 μv p-p at 0. Hz to 0 Hz Low nonlinearity: 0.003% (G = ) High CMRR: 0 db (G = 000) Low offset voltage: 50 μv Low offset voltage drift: 0.5
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General Description The is a variable-gain precision instrumentation amplifier that combines Rail-to-Rail single-supply operation, outstanding precision specifications, and a high gain bandwidth. This
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INA9 INA9 INA9 Precision, Low Power INSTRUMENTATION AMPLIFIERS FEATURES LOW OFFSET VOLTAGE: µv max LOW DRIFT:.µV/ C max LOW INPUT BIAS CURRENT: na max HIGH CMR: db min INPUTS PROTECTED TO ±V WIDE SUPPLY
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a FEATURES Enhanced Replacement for LF441 and TL61 DC Performance: 2 A max Quiescent Current 1 pa max Bias Current, Warmed Up (AD48C) 2 V max Offset Voltage (AD48C) 2 V/ C max Drift (AD48C) 2 V p-p Noise,.1
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FEATURES ±4 V human body model (HBM) ESD High common-mode voltage range V to +6 V operating 3 V to +68 V survival Buffered output voltage Wide operating temperature range 8-Lead SOIC: 4 C to + C Excellent
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a FEATURES High Linearity 0.01% max at 10 khz FS 0.05% max at 100 khz FS 0.2% max at 500 khz FS Output TTL/CMOS Compatible V/F or F/V Conversion 6 Decade Dynamic Range Voltage or Current Input Reliable
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INA Precision Gain= DIFFERENTIAL AMPLIFIER FEATURES ACCURATE GAIN: ±.% max HIGH COMMON-MODE REJECTION: 8dB min NONLINEARITY:.% max EASY TO USE PLASTIC 8-PIN DIP, SO-8 SOIC PACKAGES APPLICATIONS G = DIFFERENTIAL
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Single-Supply, Low Cost Instrumentation Amplifier FEATURES Gain set with resistor Gain = 5 to Inputs Voltage range to 5 mv below negative rail 5 na maximum input bias current 3 nv/ Hz, RTI noise @ khz
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a FEATURES 2 ma of Output Current 9 Load SFDR 54 dbc @ MHz Differential Gain Error.4%, f = 4.43 MHz Differential Phase Error.6, f = 4.43 MHz Maintains Video Specifications Driving Eight Parallel 75 Loads.2%
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a FEATURES High Common-Mode Rejection DC: 100 db typ 60 Hz: 100 db typ 20 khz: 70 db typ 40 khz: 62 db typ Low Distortion: 0.001% typ Fast Slew Rate: 9.5 V/ s typ Wide Bandwidth: 3 MHz typ Low Cost Complements
More informationHigh Voltage, Bidirectional Current Shunt Monitor AD8210
High Voltage, Bidirectional Current Shunt Monitor FEATURES ±4 V HBM ESD High common-mode voltage range 2 V to +65 V operating 5 V to +68 V survival Buffered output voltage 5 ma output drive capability
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Zero Drift, Bidirectional Current Shunt Monitor FEATURES High common-mode voltage range 4 V to 8 V operating.3 V to 85 V survival Buffered output voltage Gain = 2 V/V Wide operating temperature range:
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a FEATURES Excellent Video Performance Differential Gain and Phase Error of.% and. High Speed MHz db Bandwidth (G = +) V/ s Slew Rate ns Settling Time to.% Low Power ma Max Power Supply Current High Output
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Ultralow Input Bias Current Operational Amplifier AD59 FEATURES Ultralow input bias current 60 fa maximum (AD59L) 250 fa maximum (AD59J) Input bias current guaranteed over the common-mode voltage range
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a FEATURES High Speed 50 MHz Unity Gain Stable Operation 300 V/ms Slew Rate 120 ns Settling Time Drives Unlimited Capacitive Loads Excellent Video Performance 0.04% Differential Gain @ 4.4 MHz 0.198 Differential
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FEATURES Ideal for current shunt applications High common-mode voltage range 2 V to +65 V operating 25 V to +75 V survival Gain = 50 V/V Wide operating temperature range: 40 C to +125 C for Y and W grade
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a FEATURES Single Chip Construction Very High Speed Settling to 1/2 AD565A: 250 ns max AD566A: 350 ns max Full-Scale Switching Time: 30 ns Guaranteed for Operation with 12 V (565A) Supplies, with 12 V
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Low Cost Low Power Instrumentation Amplifier FEATURES Easy to use Gain set with one external resistor (Gain range to,) Wide power supply range (±2.3 V to ±8 V) Higher performance than 3 op amp IA designs
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a FEATURES High Speed: MHz Unity Gain Bandwidth 3 V/ s Slew Rate 7 ns Settling Time to.% Low Power: 7. ma Max Power Supply Current Per Amp Easy to Use: Drives Unlimited Capacitive Loads ma Min Output Current
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a FEATURES DC Performance 400 A max Quiescent Current 10 pa max Bias Current, Warmed Up (AD648B) 1 V max Offset Voltage (AD648B) 10 V/ C max Drift (AD648B) 2 V p-p Noise, 0.1 Hz to 10 Hz AC Performance
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Precision Instrumentation Amplifier FEATURES Easy to use Available in space-saving MSOP Gain set with external resistor (gain range to ) Wide power supply range: ±2.3 V to ±8 V Temperature range for specified
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a FEATURES AC PERFORMAE Gain Bandwidth Product: 8 MHz (Gain = 2) Fast Settling: ns to.1% for a V Step Slew Rate: 375 V/ s Stable at Gains of 2 or Greater Full Power Bandwidth: 6. MHz for V p-p DC PERFORMAE
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a FEATURES Low Cost Three Video Amplifiers in One Package Optimized for Driving Cables in Video Systems Excellent Video Specifications (R L = 15 ) Gain Flatness.1 db to 5 MHz.3% Differential Gain Error.6
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a FEATURES Low Offset Voltage: 50 V max Very Low Offset Voltage Drift: 0.3 V/ C max Low Noise: 0.12 V p-p (0.1 Hz to 10 Hz) Excellent Output Drive: 10 V at 50 ma Capacitive Load Stability: to 1 F Gain
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a FEATURES User Programmed Gains of 1 to 10,000 Low Gain Error: 0.02% max Low Gain TC: 5 ppm/ C max Low Nonlinearity: 0.001% max Low Offset Voltage: 25 V Low Noise 4 nv/ Hz (at 1 khz) RTI Gain Bandwidth
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